[LLVMdev] Atomic operations: minimal or maximal?

Andrew Lenharth andrewl at lenharth.org
Mon Mar 3 11:50:22 PST 2008

Looking through the various architectures, it seems that the minimal
approach to atomic intrinsics isn't necessarily the best.

If we assume CAS and atomic add, then we can implement atomic N, where
n is some other operation with a loop.  however, for the ll/sc
architectures, this will lower into a double loop (the outer loop of
load-op-CAS and the CAS loop.  On such archs, the atomic op can be
done as one loop.  To generate the best code, we would have to
recognize loops that equated to atomic N, and raise them to a more
efficient implementation.  The alternative is to implement atomic N
for all the Ns in gcc's atomic ops, and let all the ll/sc archs
generate efficient code easily, and just lower to a loop for x86,
sparc, and ia64.

Which is a long way to ask, what do people think design wise?  Should
we have a large set of atomic ops that most platforms support natively
and the couple that don't can easily lower, or have a minimal set and
try to raise the lowered gcc atomic ops to efficient code on archs
that support ll/sc (essentially trying to recognize the ld, op, CAS
loops during codegen).


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