[LLVMdev] Backend for the ZPU - a stack based / zero operand CPU

Øyvind Harboe oyvind.harboe at zylin.com
Sun Jun 22 11:16:03 PDT 2008

 On Fri, 20 Jun 2008, [ISO-8859-1] ?yvind Harboe wrote:
>> The ZPU has two instructions that I'd also like to use. These instructions
>> can push a value from deeper down on the stack and also pop a value
>> from the stack and store them deeper down on the stack.
> Sounds like the Intel X87 floating point stack, which we support.

GCC does as well. Supporting floating point is a different game
than "normal" instructions since it interferes with frame pointers, etc.

>> The ZPU needs relaxation. Immediate values and
>> pc/sp relative references have variable lengths.
>> Does llvm support ?nstruction relaxation?
> Yes, many targets (e.g. arm, mips, ppc) have branch offset restrictions.

I wrote the relaxation support in gas + the GCC linker. Do I need to
reimplement it somehow?

Basically the ZPU's assembler instruction supports 32 bit offsets
and it is the linker chooses another assembler instruction w/smaller

> LLVM doesn't provide an assembler, you should use GAS.

Do I have to use GAS + the GCC linker?

Does llvm offer an alternative? (Just curious).

Øyvind Harboe
ARM7 ARM9 XScale Cortex
JTAG debugger and flash programmer

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