[LLVMdev] Backend for the ZPU - a stack based / zero operand CPU

Øyvind Harboe oyvind.harboe at zylin.com
Thu Jun 19 14:30:47 PDT 2008

Hi all,

Zylin has implemented the world smallest 32 bit CPU with
a GCC backend. (I shall stand corrected if anyone claims
& proves otherwise :-)

Implementing a GCC backend for a zero operand/stack based
architecture proved pretty tricky, but I'm quite pleased with
the resulting code. I did make alterations to the architecture
to make it fit GCC without sacrificing CPU size.

I have been following llvm.org from a distance, since I finished
the GCC backend a couple of years back and there has not
really been a reason to build a new compiler for the ZPU.

My llvm.org knowledge is ... shallow ... but I'm hoping that
someone would find the time & pity to answer my questions:

Q: Is a stack based / zero operand CPU and llvm a good match? (GCC

Q: Should I expect better code density / performance from llvm than GCC for
said architecture?

Q: Can llvm help move global data into flash(i.e. determine that global C
variables are in fact constants)?

The ZPU would probably be most effective in highly space constrained
applications(kBytes of code/data), such that it would fit entirely onto
an FPGA/CPLD. It has very high code density (~80% of ARM Thumb)

Overview of architecture(documentation is definitely the weak side of
the ZPU):


The ZPU is now hosted at:


Øyvind Harboe
ARM7 ARM9 XScale Cortex
JTAG debugger and flash programmer

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