[LLVMdev] i1 promotion issue (again)

[Duncan Sands]

Hi,

> Moreover, Cell SPU has to custom lower truncates in a specific way to  
> preserve register uniformity (scalar and vector representation is one  
> and the same, or, put another way, the scalar and vector registers  
> are the same register.) Consequently, I can't trap (truncate  
> (setcc ...)) patterns easily because the truncate is being custom  
> lowered. Hence, DAGCombiner isn't doing me much good.

during type legalization custom lowering is only called for nodes
with illegal types.  Since the truncate in question (i32 -> i8)
only uses legal types, the CellSPU custom lowering code will not
be called on it during type legalization.  When type legalization
is done, the DAG combiner runs.  This should clean things up,
removing any pointless truncate-extend stuff.  As this point the
operation legalizer runs, and any remaining truncate nodes will be
custom lowered.  So I don't see why there should be a problem.

Ciao,

Duncan.