[LLVMdev] i1 promotion issue (again)

Scott Michel scottm at aero.org
Fri Dec 12 17:52:10 PST 2008


ComputeNumSignBits() is never called.

Moreover, Cell SPU has to custom lower truncates in a specific way to  
preserve register uniformity (scalar and vector representation is one  
and the same, or, put another way, the scalar and vector registers  
are the same register.) Consequently, I can't trap (truncate  
(setcc ...)) patterns easily because the truncate is being custom  
lowered. Hence, DAGCombiner isn't doing me much good.


-scooter

On Dec 12, 2008, at 1:13 PM, Eli Friedman wrote:

> On Fri, Dec 12, 2008 at 12:42 PM, Duncan Sands <baldrick at free.fr>  
> wrote:
>> Hi Eli,
>>
>>> Have you tried implementing computeMaskedBitsForTargetNode for your
>>> setcc nodes?  If you have, I think DAGCombiner should take care  
>>> of the
>>> necessary simplification.
>>
>> he doesn't need to: the DAG combiner knows all about SetCC values,
>> and should simplify this already.
>
> Oh, this is ISD::SETCC?  SelectionDAG::ComputeNumSignBits doesn't
> currently know how to handle it, but that should be easy to fix.
>
> -Eli
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