tilmann.scheller at googlemail.com
Mon Apr 7 02:11:10 PDT 2008
On Mon, Apr 7, 2008 at 5:56 AM, Vania Joloboff <vania.joloboff at inria.fr> wrote:
> We do dynamic binary translation. We are in a similar situation to qemu
> except we are SystemC / TLM compliant for hardware and bus models. Our
> current technology is somewhat like qemu, we translate the binary into
> "semantic ops", which are pre-compiled at build time, like qemu. Then we
> execute that code. The difference is that we extensively use partial
> evaluation to translate each binary instruction into one specialized op. We
> do not intend to use LLVM at the basic block level. Our initial idea is
> similar to what you call super-block, but also to carry the LLVM compilation
> in a separate thread, so that we can use the now available quad-core PC's
> without slowing down the on-going execution. In fact similar to what we did
> a few years ago with the Java VM,
> but on a separate computer because we did not have even dual-core at the
Sounds great, maybe pre-compiling to LLVM IR is an option for you too?
(at least to get an initial working system)
I would be curious to see the performance results of a system with the
properties you mentioned (optimization at super-block level,
compilation on a different core) and IMO using LLVM for such a system
would be a great choice.
Is there any public information about your emulation system? E.g. a
paper or a web site?
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