[LLVMdev] Supporting pre-allocated registers in LLVM

nkavv at physics.auth.gr nkavv at physics.auth.gr
Fri Oct 5 04:23:49 PDT 2007


> > 1. I can see the standard algorithms (bigblock, linearscan -- good
> > choice for
> > the JIT and for general use as well, and the other algorithms). Is
> > it possible
> > to pre-allocate registers in your linearscan (or in another
> > allocation engine)
> > for specific source-level or (better) intermediate code (bitcode)
> > level
> > variables?
>
> Yes that's done at instruction selection time. If you specify an
> instruction definition must go to a physical register, the selector
> and scheduler will take care of it. Same for instructions that require
> its operands that must be in fixed registers.

You mean a temporary defined in an instruction. OK, that is what i basically
need here. Is it guaranteed to "live" in the physical register for the entire
program (or at least for a single function, which would trivially work for
single-function programs)?

> > 2. Which are the new register allocation algorithms currently under
> > design? Do
> > they support preallocation of registers (it is different to "fixing"
> > a register
> > in GCC parlance)?
>
> I know of a number of allocators in development. They are not yet made
> available to the public yet. Perhaps their authors can chime in.

Fernando has a lot of work going on, and his UCLA page looks very interesting.
Fernando, is your SSA-based regalloc usable as of now; is it in an SVN repo?
Further, do you allow register "fixing" (in the sense of pre-allocated a
register for its entire lifetime, or for the entire program)?


Kind regards
Nikolaos Kavvadias





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