[LLVMdev] 2.0 Pre-release tarballs online
emil at cs.rmit.edu.au
Tue May 22 00:56:21 PDT 2007
On Thu, May 17, 2007 at 11:55:37PM -0700, Chris Lattner wrote:
> On Fri, 18 May 2007, Emil Mikulic wrote:
> > CPU: Intel(R) Pentium(R) 4 CPU 3.00GHz (3000.12-MHz 686-class CPU)
> > Origin = "GenuineIntel" Id = 0xf34 Stepping = 4
> > Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,C
> > MOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE>
> > Features2=0x441d<SSE3,RSVD2,MON,DS_CPL,CNTX-ID,<b14>>
> > Looks like 1, 2, _and_ 3 are supported.
> > <b14> is xTPR (Send Task Priority Messages)
> Okay, this is probably some stack alignment issue or something. Can you
> please file a bug? This is not a 2.0 blocker, but we want to track it.
Sure thing: http://llvm.org/bugs/show_bug.cgi?id=1438
Sorry if I got the product / category / whatever wrong.
Bugzilla always confuses me. =(
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