[LLVMdev] instruction writing two successive registers

[Florian Brandner]

hi,

the architecture that we are compiling for has a special vector shuffle
instruction, which writes two successive registers (Rn and Rn+1).

i have defined intrinsics to generate the instruction, and a special
register class for the register pairs. in addition i have two EXTRACT
operations which allow to access either the first or second subregister
of a pair (using moves). the pair register class is used only for this
purpose and may not occur in other operations.

this works fine. except for the extra moves generated by the EXTRACT,
which can not be eliminated by coalescing, due to the differing register
classes.

here is a small example:

// Pn is a register pair
// 'a' and 'b' are regular registers
Pn = shuffle(x, y)
a = extract_lo(Pn)  // which is a = Rn,
b = extract_hi(Pn)  // which is b = Rn+1

here it would be nice to assign 'a' to the first subregister of Pn (Rn),
and b to the second (Rn+1).

instead of using the pair register class, i also thought about adding a
register constraint - something like TIED_TO_NEXT.

can anyone give me an advise how to handle this special instruction?

thank you,
florian