[LLVMdev] PR400 - alignment for LD/ST

[Christopher Lamb]

On Mar 30, 2007, at 12:30 PM, Devang Patel wrote:

>
> On Mar 30, 2007, at 10:29 AM, Christopher Lamb wrote:
>
>>> 1) Update LLVM LD/ST instructions to maintain alignment information
>>
>> Is this referring to the language itself, i.e. the bytecode/ 
>> assembly format and associated readers/writers? If so this is  
>> probably the portion that it's most likely I could help with.
>>
>
> Yes.

For the assembly format I assume that it would be a simple optional  
comma delimited alignment parameter at the end of the instruction,  
such as:

%tmp5 = load i32* %tmp4, align 4
store i32 %val, i32* %tmp3, align 4

Has the format for the extension of the load/store bytecode been  
determined? This would need to be applied to both normal and volatile  
load/store instructions, and I see three options.

1. Add the ability to encode optional arguments on any load/store and  
volatile variants. This is general, but I can see why it could be bad  
given how frequent load/stores tend to be. Perhaps this is why pseudo  
ops were chosen for the volatile versions?

2. Create pseudo opcodes for the permutations of volatility and  
alignment. This will consume 4 more opcodes, but it would not bloat  
the bytecode when natural alignment is used.

3. Create pseudo ops for 'attributed' load/store instructions. These  
instructions contain a set of optional attributes encoded in some  
way. The current volatile load/store instructions could be subsumed  
by these instructions.

I'm leaning away from 1, but unsure whether 2 or 3 is better.

Thanks
--
Christopher Lamb



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