[LLVMdev] VirtRegMap GLIBCXX assert

David A. Greene greened at obbligato.org
Tue Jul 10 11:57:37 PDT 2007


The following code in VirtRegMap.cpp is asserting in the C++ library
because back() is called on an empty container:

  /// addLastUse - Add the last use information of all stack slots whose
  /// values are available in the specific register.
  void addLastUse(unsigned PhysReg, MachineInstr *Use) {
    std::multimap<unsigned, int>::iterator I =
      PhysRegsAvailable.lower_bound(PhysReg);
    while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
      int Slot = I->second;
      I++;

      std::map<int, SSInfo>::iterator II = SpillSlotsAvailable.find(Slot);
      assert(II != SpillSlotsAvailable.end() && "Slot not available!");
      unsigned Val = II->second.first;
      assert((Val >> 1) == PhysReg && "Bidirectional map mismatch!");
      // This can be true if there are multiple uses of the same register.
      if (II->second.second.back() != Use)  <========== assert here
        II->second.second.push_back(Use);
    }
  }

This happens when llvm-gcc tries to build libgcc.

An obvious fix is to change the line to:

      if (II->second.second.empty() || II->second.second.back() != Use)

Is this a proper fix?  Is there some assumption that II->second.second should 
NOT be empty at this point?  In other words, is this a simple oversight bug or 
is there some deeper flaw in the program logic that gets exposed here?

                                                   -Dave



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