[LLVMdev] Inserting an assembly instruction in the calling sequence of the powerpc target

[Nicolas Geoffray]

Hi Crhis,

Chris Lattner wrote:
> The basic approach you want to take:
> 1. Introduce a new target-specific dag node to represent "SETCR", which
>     takes a single register operand (in this case, CR6).
>   
That I did. I introduced the creqv instruction in PPCInstrInfo.td and
inserted a SETCR in the PPCISD::NodeType enum, file PPCSelLowering.h.
> 2. At call lowering time, flag this into the call sequence.
>   
I'm still confused on how flags operate into the call sequence. I tried
to do :

  if (isVarArg)
    {
      InFlag = DAG.getNode(PPCISD::SETCR, MVT::i32,
                                DAG.getRegister(PPC::CR6, MVT::i32));
    }

in PPCISelLowering.cpp after the copy-to-reg sequence (line 1462 in 
llvm-cvs), but it does not
work (I always get wrong assertions)
> 3. At ISel time, turn this into creq reg,reg,reg
>
>   
If I understand correctly, all I have to do for this is to add in 
PPCISelDagToDag.cpp::Select a switch case where:

  case PPCISD::SETCR : {
    SDOperand InFlag = N->getOperand(0);
    return CurDAG->getTargetNode(PPC::CREQV, MVT::i32, InFlag, InFlag);
  }

>> 2) Test the target in the code when needed
>>   if (os == linux && ppc32) then...
>>   else if (os == linux && ppc64) then ...
>>   else if (os == darwin && ppc32) then ...
>>   else if (os == darwin && ppc64) then ...
>>     
>
> This is inefficient :)
>   
>
> There is already a subtarget.  In the call lowering code, just do 
> something like:
>
> if (!PPCSubTarget->isDarwin())
>    ... insert creq here ...
>
>   
OK, that's what I meant with my second proposition.
> -Chris
>
>   
Thx,
Nicolas