[LLVMdev] a pseudo instruction

Chris Lattner sabre at nondot.org
Fri Feb 2 09:25:01 PST 2007

On Fri, 2 Feb 2007, Seung Jae Lee wrote:
> I'd like to implement "reg" instruction on my new architecture. This is 
> kinda pseudo instruction do not generate hardware directly but make 
> hardware to be generated indirectly.
> If I code a simple function like this:
> On the assembly mnemonics, it should be shown as follows:

The canonical way to do this is to add a new target-specific llvm 
intrinsic.  This is the way that the X86 and PPC backends support all the 
SSE/Altivec instructions.  Take a look at include/llvm/Intrinsic* for some 



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