[LLVMdev] PR400 - alignment for LD/ST
christopher.lamb at gmail.com
Mon Apr 2 16:07:36 PDT 2007
On Apr 2, 2007, at 5:01 PM, Devang Patel wrote:
> On Apr 2, 2007, at 2:12 PM, Chris Lattner wrote:
>> Devang, do you have any thoughts on this or idea of how it would
>> impact a
> When you say "load is multiple of 4 bytes away from a 8-byte aligned
> it is not clear whether it is 16-byte aligned or not. However, "load
> is 4 bytes
> away from a 8-byte aligned data" is clear - it is aligned at 12-byte
> and not
> However, that means, for loops this becomes "load is N bytes away
> from a 8-byte aligned data" where N is dependent on IV.
So in the loop case analysis of the IV is necessary to determine the
Would the form for the loops require that the offset be tracked as a
multiple of the IV stride?
Would the IV stride analysis normally be performed in the front end
(and thus end up in the BC)?
If this is the the case then I'd take Chris's suggestion of the
<align, offs> pair, as it is clear in the static offset case and the
actual alignment could be deduced, along with an <align, stride>
pair for the IV case. This the previous meaning of simply <align>
would be equivalent to <align, stride> where align == stride.
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