[LLVMdev] how to declare that two registers must be different

[Vladimir Prus]

Rafael Espíndola wrote:

>>     "The destination register shall not be the same as the operand
>>     register Rm. R15 shall not be used as an operand or as the
>>     destination register."
> 
> The ARM ARM has this "Operand restriction" on MUL:
> Specifying the same register for <Rd> and <Rm> has UNPEDICTABLE results.
> 
>> Then, for the load and store multiple instructions, LDM and STM, the R15
>> should not be used as the base register.  Neither should R15 be the
>> destination for an MCR, Move to Co-processor register from Register.
>>
>> These are some examples, hopefully enough to alter the regalloc
>> interface to cope.
> 
> Restrictions of the form cannot be register Rx can be solved by
> creating a register class without Rx. The problem is the "must not be
> the same" restriction.

Is it allowed now to have overlapping register classes? It was not allowed
last time I tried (admittedly long ago).

- Volodya