[LLVMdev] best way to implement complex addressing modes
rafael.espindola at gmail.com
Wed Sep 6 11:36:49 PDT 2006
The ARM has some very powerful and complex addressing modes. For
example, the data processing instructions (and, orr, add, ..) have an
addressing mode that has 11 options (imm, reg, and 9 reg + some
I am considering 3 ways to implement this:
1) define one instruction that has an ARM specific addressing mode
that covers all 11 possibilities.
2) define 11 instructions.
3) a mix of the two
I believe that implementation 1 would be the most elegant one. It
would have a one to one correspondence with the ARM Architecture
For two to work it would be necessary to write custom select code to
use the more uncommon addressing options.
For three I could use the multiclass feature to implement add_ri and
add_rr. The add_ri instruction would use a custom addressing mode for
the second operand.
Currently I am planning to implement 3 because it looks like to be the
easiest to implement.
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