[LLVMdev] Intel vs. AT&T Assembly.
sabre at nondot.org
Mon May 1 09:05:56 PDT 2006
On Mon, 1 May 2006, Ralph Corderoy wrote:
>> The LLVM X86 backend started out emitting intel mode for use with GAS
>> and it's "intel syntax mode" (which does use registers with %'s).
>> Unfortunately GAS has (or commonly available versions have) a number
>> of bugs in intel syntax mode (e.g. you can't define a function named
>> 'dword'), so we switched to using AT&T syntax.
> Ah, OK. The current gas manual says Intel register operands are
> undelimeted, i.e. no `%'. Perhaps they've changed.
Though it really doesn't matter, IIRC, this was to work around bugs in
GAS. In particular (again, as I recall, could be wrong), GAS accepted
registers either with or without % prefixes. If you used % prefixes, it
avoided some class of bug that I don't remember any longer. If you dig
into the CVS history, looking at the commit that added the % prefixes,
it will probably explain in further detail.
In any case, I committed a patch to remove the %'s from register names in
>> Intel syntax mode was retained because it's nicer to read :), and
>> because it may be useful in the future. As Jeff says, patches are
>> welcome to make it do something useful, e.g. be assemblable with MASM
>> or NASM.
> NASM might be the nicer target since it's GNU LGPL and runs on multiple
> OS. Its home page is broken at the moment, but the manual pages work.
That's fine with me. The instructions are in true intel mode now, the
hard part will be to get the pseudo ops to match what the assembler
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