[LLVMdev] a target must have floating point support?

[duraid at octopus.com.au]

> The assert is at TargetLowering.cpp:138.
>
> Why is FP required?

There's no particularly fundamental reason - while LLVM specifies a modest
set of FP capabilities...

> Most ARMs don't have an FPU. Should I add a fake
> register class for MVT::f64?

...nothing will break if you just pretend f64 fits in your integer
registers so long as you don't go anywhere near FP in your code. So just:

addRegisterClass(MVT::f64, <your chosen integer reg class>)

Also, if you *do* want to support (software) FP you should do that anyway,
then just lower FP operations to library calls and/or custom LLVM
sequences operating on your integer representation of floats.

HTH,

   Duraid