[LLVMdev] floating point exception and SSE2 instructions

Simon Burton simon at arrowtheory.com
Wed Apr 19 16:09:30 PDT 2006

On Wed, 19 Apr 2006 19:28:34 +0100
Simon Burton <simon at arrowtheory.com> wrote:

> >From what I remember, this is a bug in debian libc:
> some floating point flags are set incorrectly causing SIGFPE.
> Can't find the bug report ATM.

Oh, it just showed up on numpy-discussion:

#include <fenv.h>
void feclearexcept(int ex)

This function should clear the specified exception status bits in the
FPU status register.
For CPUs with SSE support it should also clear the MXCSR status register

The problem is that feclearexcept() clears the status control bits also,
causing future floating-point errors to generate interrupts which will
lead to a SIGFPE signal which terminates the program (unless caught by a
SIGFPE handler).

Is there a way I can disable SSE instruction generation in LLVM ?


Simon Burton, B.Sc.
Licensed PO Box 8066
ANU Canberra 2601
Ph. 61 02 6249 6940

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