[LLVMdev] LiveIntervals, replace register with representative register?

Alkis Evlogimenos evlogimenos at gmail.com
Wed Sep 7 09:34:42 PDT 2005

On Wed, 2005-09-07 at 15:09 +0800, Tzu-Chien Chiu wrote:
> I don't understand the following code snippet in LiveIntervalAnalysis.cpp.
> Why changing the type of the opreand from a virtual register to a
> machine register? The register number (reg) is still a virtual
> register index (>1024).
> bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
>   // perform a final pass over the instructions and compute spill
>   // weights, coalesce virtual registers and remove identity moves
>   ...
>         for (unsigned i = 0; i < mii->getNumOperands(); ++i) {
>           const MachineOperand& mop = mii->getOperand(i);
>           if (mop.isRegister() && mop.getReg() &&
>               MRegisterInfo::isVirtualRegister(mop.getReg())) {
>             // replace register with representative register
>             unsigned reg = rep(mop.getReg());
>             mii->SetMachineOperandReg(i, reg);
>             LiveInterval &RegInt = getInterval(reg);
>             RegInt.weight +=
>               (mop.isUse() + mop.isDef()) * pow(10.0F, (int)loopDepth);

After joining intervals some moves are unecessary. If for example this
instruction was in the code:

mov %reg1024, %reg1045

and intervals for reg1024 and reg1045 were joined, only one register
needs to be present in the pre register-allocation machine code. So all
references to reg1024 and reg1045 are replaced with a reference to their
representative register (found using a union find algorithm). Note that
the representative register could be a real register if we ever joined
an interval of a real register with one of a virtual register (and this
real register will be the representative register of the set of
intervals joined together).



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