[LLVMdev] LiveIntervals, replace register with representative register?

Chris Lattner sabre at nondot.org
Wed Sep 7 10:39:06 PDT 2005

On Wed, 7 Sep 2005, Tzu-Chien Chiu wrote:

> I don't understand the following code snippet in LiveIntervalAnalysis.cpp.
> Why changing the type of the opreand from a virtual register to a
> machine register? The register number (reg) is still a virtual
> register index (>1024).

This code isn't actually replacing the virtual register with a physreg. 
As you noticed, it replaces it with a different virtual register.  As part 
of coallescing, the code uses union-find to find a single representative 
register for all merged live ranges.  This code just makes sure that all 
of the merged live ranges are rewritten to use a single virtual register 
(the representative).

After this is done, the "spiller" (in CodeGen/VirtRegMap.*) rewrites to 
virtual registers to use physregs and/or spilled values.


> bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
>  // perform a final pass over the instructions and compute spill
>  // weights, coalesce virtual registers and remove identity moves
>  ...
>        for (unsigned i = 0; i < mii->getNumOperands(); ++i) {
>          const MachineOperand& mop = mii->getOperand(i);
>          if (mop.isRegister() && mop.getReg() &&
>              MRegisterInfo::isVirtualRegister(mop.getReg())) {
>            // replace register with representative register
>            unsigned reg = rep(mop.getReg());
>            mii->SetMachineOperandReg(i, reg);
>            LiveInterval &RegInt = getInterval(reg);
>            RegInt.weight +=
>              (mop.isUse() + mop.isDef()) * pow(10.0F, (int)loopDepth);



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