Random sampling profiling (Was: [LLVMdev] Cloning BasicBlock)

[Andrew Lenharth]

On Tue, 2005-11-22 at 23:19 -0800, Sandra Johnson wrote:
> Hello Andrew ,
> Yes , I have missed the phi node since my paths merge together. I'll
> try this out.
> I am implementing a timer based profiling scheme and hope your code
> will be useful 
> for me. Please send me a copy of your code. 

I have commited an Arnold and Ryder style random sampling framework
(check out lib/Transforms/Instrumentation/RSProfiling.cpp).  Two of the
methods use a global counter to choose when to profiler.  It is quite
possible that this framework does exactly what you want.

I will be cleaning up the code and adding some docs in the next few
days.

Andrew Lenharth


> Andrew Lenharth <andrewl at lenharth.org> wrote: 
>         On Tue, 2005-11-22 at 09:12 -0800, Sandra Johnson wrote:
>         > Hi ,
>         > I am trying to clone a BasicBlock. I want both to co-exist
>         and I have
>         > introduced
>         > a conditional branch to the original or the cloned BB. 
>         
>         I have a pass I haven't commited that does just this. Well, it
>         does so
>         to implement Arnold and Ryder style profiling. I can send you
>         a copy of
>         that if you want (I hope to commit it soon once it is c!
>         leaned up some).
>         Your best bet is to run reg2mem, which removes most live
>         values by
>         placing them in memory. the only live values that remain after
>         that
>         pass are the allocas for the old registers and values from
>         loads in the
>         predecessors of phi nodes to those phi nodes. This makes it
>         much easier
>         to maintain SSA form (as there is only one type of simple live
>         value you
>         have to worry about). It is also possible to remove the phi
>         nodes
>         completely with a bit more transform, but that wasn't
>         desirable in my
>         case, so I didn't, but you could easily extend the pass to do
>         so.
>         
>         (just for reference, my code clones all BB in a function and
>         the CFG,
>         then takes backedges and interconnects the backedges of the
>         original and
>         cloned versions, adding conditional branches at those join
>         points.)
>         
>         Andrew Lenharth
>         
>         > I tried mapping the original instruction and the clone as
>         below :
>         > Instruction *NewInst = II->clone();
>         > if (II->hasName())> NewInst->setName(II->getName());
>         > NewBB->getInstList().push_back(NewInst);
>         > ValueMap[II] = NewInst; 
>         > what I got from this is ,
>         > --> eventhough I have set the same name , a new name is set
>         > for the clone.
>         > original :
>         > %CS1 = call fastcc int %add( int %tmp.5, int %
>         > tmp.6 ) ; [#uses=1]
>         > clone :
>         > %CS11 = call fastcc int %add( int %tmp.5, int %
>         > tmp.6 ) ; [#uses=1]
>         > --> the verifier gives the following error
>         > Instruction does not dominate all uses!
>         > &n! bsp; for the original instruction.
>         > Is it possible to have the instructions in the clone to have
>         the same
>         > name 
>         > as the original BB ?
>         > Is it possible to make the uses of the original instruction
>         to be the 
>         > uses of the cloned instruction at the same time ? 
>         > What makes the above error ?
>         > Is it because of SSA ? 
>         > 
>         > 
>         > Thanks in advance! for any help,
>         > Sandra
>         > 
>         > 
>         > 
>         >
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