[LLVMdev] Cloning BasicBlock

[Sandra Johnson]

  Hi ,
  I am trying to clone a BasicBlock. I want both to co-exist and I have introduced
  a conditional branch to the original or the cloned BB. 
  I tried mapping the original instruction and the clone as below :
    Instruction *NewInst = II->clone();
    if (II->hasName())
       NewInst->setName(II->getName());
    NewBB->getInstList().push_back(NewInst);
    ValueMap[II] = NewInst; 
  what I got from this is ,
             --> eventhough I have set the same name , a new name is set for the clone.
                    original :
                      %CS1 = call fastcc int %add( int %tmp.5, int %tmp.6 ) ; <int> [#uses=1]
                   clone :
                       %CS11 = call fastcc int %add( int %tmp.5, int %tmp.6 ) ; <int> [#uses=1]
               --> the verifier gives the following error
                              Instruction does not dominate all uses!
                    for the original instruction.
  Is it possible to have the instructions in the clone to have the same name 
  as the original BB ?
  Is it possible to make the uses of the original instruction to be the 
  uses of the cloned instruction at the same time ? 
  What makes the above error ?
  Is it because of SSA ? 
   
   
  Thanks in advance for any help,
  Sandra
   
   


		
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