[LLVMdev] Re: LLVM to SUIF-MACH VM binary

Chris Lattner sabre at nondot.org
Wed Jan 19 08:15:45 PST 2005


On Wed, 19 Jan 2005, John Cortes wrote:
> Sample from SUIF disassembler (done by someone else):
> 	lda	$vr10.p32 <- main.A
> 	cvt	$vr11.p32 <- $vr10.p32
> 	add	$vr12.p32 <- $vr11.p32,$vr9.s32
> 	lod	$vr13.s32 <- 0($vr12.p32)
> 	cvt	$vr8.s32 <- $vr13.s32
> 	mul	$vr6.s32 <- $vr7.s32,$vr8.s32
> 	ldc	$vr15.s32 <- 5
> 	ldc	$vr18.s32 <- 1
> 	add	$vr17.s32 <- main.i,$vr18.s32
> ********************
>
> So I guess it is RISK.  Lots of virtual registers, so I guess allocation 
> isn't a big problem.  So you think the C-backend code should be able to 
> output into SUIFvm bytecode?  I'm going to look at the main SUIF site for 
> documentation for generating the bytecode, since the MACHINE-SUIF site seems 
> to be lacking.

Is it "lots" or "infinite"?  If it's "lots" you'll still have to do 
register allocation.  If not, use a special purpose pass (like the C 
writer does) would make sense.

-Chris

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