[LLVMdev] The live interval of write-only registers
sabre at nondot.org
Thu Dec 15 14:07:59 PST 2005
On Tue, 13 Dec 2005, Tzu-Chien Chiu wrote:
> 2005/12/13, Chris Lattner <sabre at nondot.org>:
>>> In my ISA, some registers are write-only. These registers serve as
>>> output ports, writing to these registers will output the values to an
>>> external device. They cannot be read. So their live intervals should
>>> not be joined with any other registers.
>> Ok. Since they are not really registers in the sense that LLVM is used
>> to, I wouldn't suggest even exposing them as registers. You may as well
>> just tell LLVM they are immediates or something, and have the asm printer
>> print them however you like. As an example, the X86 has I/O ports which
>> can be read and written to. These are not thought of as registers, but
>> they have the same property. They are accessed with in/out instructions,
>> not with "register writes".
> If the output register is represented by an immediate operand or
> belongs to a different register class, the following sequence:
> add %reg1024, %reg1025, %reg1026
> out %o1, %reg1024
> // out is an intrinsic, there is no such machine instruction
> // o1 is a write-only output register, mapping to a physical output port
> cannot be changed to:
> add %o1, %reg1025, %reg1026
> because LiveIntervals::joinIntervalsInMachineBB() requires one of the
> operands of a 'move' instruction (the 'out' intrinsic in this example)
> to be a virtual register and both must be in the same register class.
I see, you're right. To do this, you'd need an "out" form of add, and
have the instruction selector match it. You may not want yet-another form
for each instruction.
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