[LLVMdev] Operand constraints
ghost at cs.msu.su
Thu Jul 1 04:34:01 PDT 2004
Vladimir Prus wrote:
> On my target, the multiplication can involve all general purpose registers,
> but there's are still some restrictions: the first and the second operand
> as well as the result must be in different registers, and neither register
> can be gr7. How can I enforce this restriction on the register allocator?
And the other side of the question is now to inform register allocator that
mul instruction clobbers gr7? I see some support for getting "implicit
operands" in MachineInstr.cpp, but the only method which can set them:
is marked as SPARC-specific and is not documented.
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