<div dir="ltr">When reverting a patch, please include why it is being reverted in the commit message.<div><br clear="all"><div><div dir="ltr" class="gmail_signature" data-smartmail="gmail_signature">~Craig</div></div><br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Dec 20, 2021 at 10:14 AM Shivam Gupta via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><br>
Author: Shivam Gupta<br>
Date: 2021-12-20T21:43:40+05:30<br>
New Revision: eb66f0662ad9dd78166ee912611308d301f513a2<br>
<br>
URL: <a href="https://github.com/llvm/llvm-project/commit/eb66f0662ad9dd78166ee912611308d301f513a2" rel="noreferrer" target="_blank">https://github.com/llvm/llvm-project/commit/eb66f0662ad9dd78166ee912611308d301f513a2</a><br>
DIFF: <a href="https://github.com/llvm/llvm-project/commit/eb66f0662ad9dd78166ee912611308d301f513a2.diff" rel="noreferrer" target="_blank">https://github.com/llvm/llvm-project/commit/eb66f0662ad9dd78166ee912611308d301f513a2.diff</a><br>
<br>
LOG: Revert "[DAGCombiner] Avoid combining adjacent stores at -O0 to improve debug experience"<br>
<br>
This reverts commit 731bde1ed30fcd8474ea6b88c3a9fc3072d2dca4.<br>
<br>
Added: <br>
<br>
<br>
Modified: <br>
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>
<br>
Removed: <br>
    llvm/test/CodeGen/RISCV/optnone-store-no-combine.ll<br>
<br>
<br>
################################################################################<br>
diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>
index 067ad819e0d26..8055eb9a82d64 100644<br>
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>
@@ -18395,8 +18395,8 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {<br>
   if (StoreSDNode *ST1 = dyn_cast<StoreSDNode>(Chain)) {<br>
     if (ST->isUnindexed() && ST->isSimple() &&<br>
         ST1->isUnindexed() && ST1->isSimple()) {<br>
-      if (OptLevel != CodeGenOpt::None && ST1->getBasePtr() == Ptr &&<br>
-          ST1->getValue() == Value && ST->getMemoryVT() == ST1->getMemoryVT() &&<br>
+      if (ST1->getBasePtr() == Ptr && ST1->getValue() == Value &&<br>
+          ST->getMemoryVT() == ST1->getMemoryVT() &&<br>
           ST->getAddressSpace() == ST1->getAddressSpace()) {<br>
         // If this is a store followed by a store with the same value to the<br>
         // same location, then the store is dead/noop.<br>
<br>
diff  --git a/llvm/test/CodeGen/RISCV/optnone-store-no-combine.ll b/llvm/test/CodeGen/RISCV/optnone-store-no-combine.ll<br>
deleted file mode 100644<br>
index 9648fdbfd0b04..0000000000000<br>
--- a/llvm/test/CodeGen/RISCV/optnone-store-no-combine.ll<br>
+++ /dev/null<br>
@@ -1,17 +0,0 @@<br>
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py<br>
-; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s<br>
-<br>
-; This test case makes sure that the same store will not get optimize out by DAGCombiner<br>
-; and verify that codegen has those stores in it. It will help to improve debug experience.<br>
-<br>
-define dso_local void @foo(i32* %p) noinline nounwind optnone {<br>
-; CHECK-LABEL: foo:<br>
-; CHECK:       # %bb.0:<br>
-; CHECK-NEXT:    li a1, 8<br>
-; CHECK-NEXT:    sw a1, 0(a0)<br>
-; CHECK-NEXT:    sw a1, 0(a0)<br>
-; CHECK-NEXT:    ret<br>
-  store i32 8, i32* %p, align 4<br>
-  store i32 8, i32* %p, align 4<br>
-  ret void<br>
-}<br>
<br>
<br>
<br>
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</blockquote></div>