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<div class="moz-cite-prefix">On 8/27/20 11:54 AM, Nikita Popov via
llvm-commits wrote:<br>
</div>
<blockquote type="cite"
cite="mid:CAF+90c_a1+71bg==AQ1_XFWFTMvf7-Yjq8VFHvcf01iE8eND0w@mail.gmail.com">
<meta http-equiv="content-type" content="text/html; charset=UTF-8">
<div dir="ltr">
<div class="gmail_quote">
<div dir="ltr" class="gmail_attr">On Thu, Aug 27, 2020 at 5:47
PM Roman Lebedev via llvm-commits <<a
href="mailto:llvm-commits@lists.llvm.org"
moz-do-not-send="true">llvm-commits@lists.llvm.org</a>>
wrote:<br>
</div>
<blockquote class="gmail_quote" style="margin:0px 0px 0px
0.8ex;border-left:1px solid
rgb(204,204,204);padding-left:1ex"><br>
Author: Roman Lebedev<br>
Date: 2020-08-27T18:47:04+03:00<br>
New Revision: 6102310d814ad73eab60a88b21dd70874f7a056f<br>
<br>
URL: <a
href="https://github.com/llvm/llvm-project/commit/6102310d814ad73eab60a88b21dd70874f7a056f"
rel="noreferrer" target="_blank" moz-do-not-send="true">https://github.com/llvm/llvm-project/commit/6102310d814ad73eab60a88b21dd70874f7a056f</a><br>
DIFF: <a
href="https://github.com/llvm/llvm-project/commit/6102310d814ad73eab60a88b21dd70874f7a056f.diff"
rel="noreferrer" target="_blank" moz-do-not-send="true">https://github.com/llvm/llvm-project/commit/6102310d814ad73eab60a88b21dd70874f7a056f.diff</a><br>
<br>
LOG: [InstSimplify][EarlyCSE] Try to CSE PHI nodes in the
same basic block<br>
<br>
Apparently, we don't do this, neither in EarlyCSE, nor in
InstSimplify,<br>
nor in (old) GVN, but do in NewGVN and SimplifyCFG of all
places..<br>
<br>
While i could teach EarlyCSE how to hash PHI nodes,<br>
we can't really do much (anything?) even if we find two
identical<br>
PHI nodes in different basic blocks, same-BB case is the
interesting one,<br>
and if we teach InstSimplify about it (which is what i
wanted originally,<br>
<a href="https://reviews.llvm.org/D86530" rel="noreferrer"
target="_blank" moz-do-not-send="true">https://reviews.llvm.org/D86530</a>),
we get EarlyCSE support for free.<br>
<br>
So i would think this is pretty uncontroversial.<br>
<br>
On vanilla llvm test-suite + RawSpeed, this has the
following effects:<br>
```<br>
| statistic name |
baseline | proposed | Δ | % | \|%\| |<br>
|----------------------------------------------------|-----------|-----------|-------:|---------:|---------:|<br>
| instsimplify.NumPHICSE | 0
| 23779 | 23779 | 0.00% | 0.00% |<br>
| asm-printer.EmittedInsts |
7942328 | 7942392 | 64 | 0.00% | 0.00% |<br>
| assembler.ObjectBytes |
273069192 | 273084704 | 15512 | 0.01% | 0.01% |<br>
| correlated-value-propagation.NumPhis |
18412 | 18539 | 127 | 0.69% | 0.69% |<br>
| early-cse.NumCSE |
2183283 | 2183227 | -56 | 0.00% | 0.00% |<br>
| early-cse.NumSimplify |
550105 | 542090 | -8015 | -1.46% | 1.46% |<br>
| instcombine.NumAggregateReconstructionsSimplified | 73
| 4506 | 4433 | 6072.60% | 6072.60% |<br>
| instcombine.NumCombined |
3640264 | 3664769 | 24505 | 0.67% | 0.67% |<br>
| instcombine.NumDeadInst |
1778193 | 1783183 | 4990 | 0.28% | 0.28% |<br>
| instcount.NumCallInst |
1758401 | 1758799 | 398 | 0.02% | 0.02% |<br>
| instcount.NumInvokeInst |
59478 | 59502 | 24 | 0.04% | 0.04% |<br>
| instcount.NumPHIInst |
330557 | 330533 | -24 | -0.01% | 0.01% |<br>
| instcount.TotalInsts |
8831952 | 8832286 | 334 | 0.00% | 0.00% |<br>
| simplifycfg.NumInvokes | 4300
| 4410 | 110 | 2.56% | 2.56% |<br>
| simplifycfg.NumSimpl |
1019808 | 999607 | -20201 | -1.98% | 1.98% |<br>
```<br>
I.e. it fires ~24k times, causes +110 (+2.56%) more `invoke`
-> `call`<br>
transforms, and counter-intuitively results in *more*
instructions total.<br>
<br>
That being said, the PHI count doesn't decrease that much,<br>
and looking at some examples, it seems at least some of them<br>
were previously getting PHI CSE'd in SimplifyCFG of all
places..<br>
<br>
I'm adjusting `Instruction::isIdenticalToWhenDefined()` at
the same time.<br>
As a comment in `InstCombinerImpl::visitPHINode()` already
stated,<br>
there are no guarantees on the ordering of the operands of a
PHI node,<br>
so if we just naively compare them, we may false-negatively
say that<br>
the nodes are not equal when the only difference is operand
order,<br>
which is especially important since the fold is in
InstSimplify,<br>
so we can't rely on InstCombine sorting them beforehand.<br>
<br>
Fixing this for the general case is costly (geomean +0.02%),<br>
and does not appear to catch anything in test-suite, but for<br>
the same-BB case, it's trivial, so let's fix at least that.<br>
<br>
As per <a
href="http://llvm-compile-time-tracker.com/compare.php?from=04879086b44348cad600a0a1ccbe1f7776cc3cf9&to=82bdedb888b945df1e9f130dd3ac4dd3c96e2925&stat=instructions"
rel="noreferrer" target="_blank" moz-do-not-send="true">http://llvm-compile-time-tracker.com/compare.php?from=04879086b44348cad600a0a1ccbe1f7776cc3cf9&to=82bdedb888b945df1e9f130dd3ac4dd3c96e2925&stat=instructions</a><br>
this appears to cause geomean +0.03% compile time increase
(regression),<br>
but geomean -0.01%..-0.04% code size decrease (improvement).<br>
</blockquote>
<div><br>
</div>
<div>This transform seems to be breaking some new ground for
InstSimplify, in that it can now simplify to instructions
that are not def-use "reachable" from the root instruction.
I'm a bit uncomfortable with this as a general direction.
Would we lose out much transformation power if we did this
in InstCombine only instead?<br>
</div>
<div><br>
</div>
<div>Calling SimplifyInstruction on phi nodes is a very common
pattern, and pretty much all of those uses have a comment
above them that specifically says that the simplification
call is being made to reduce the phi to a common operand.
It's not immediately clear that PHI CSE is desired and/or
safe in all those cases.<br>
</div>
</div>
</div>
</blockquote>
+1 to this.<br>
<blockquote type="cite"
cite="mid:CAF+90c_a1+71bg==AQ1_XFWFTMvf7-Yjq8VFHvcf01iE8eND0w@mail.gmail.com">
<div dir="ltr">
<div class="gmail_quote">
<div><br>
</div>
<blockquote class="gmail_quote" style="margin:0px 0px 0px
0.8ex;border-left:1px solid
rgb(204,204,204);padding-left:1ex">
Added: <br>
<br>
<br>
Modified: <br>
llvm/lib/Analysis/InstructionSimplify.cpp<br>
llvm/lib/IR/Instruction.cpp<br>
llvm/test/CodeGen/X86/statepoint-vector.ll<br>
llvm/test/Transforms/EarlyCSE/phi.ll<br>
llvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll<br>
llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll<br>
llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll<br>
llvm/test/Transforms/InstCombine/select.ll<br>
llvm/test/Transforms/InstSimplify/phi-cse.ll<br>
llvm/test/Transforms/JumpThreading/loop-phi.ll<br>
llvm/test/Transforms/LoopVectorize/reduction.ll<br>
<br>
Removed: <br>
<br>
<br>
<br>
################################################################################<br>
diff --git a/llvm/lib/Analysis/InstructionSimplify.cpp
b/llvm/lib/Analysis/InstructionSimplify.cpp<br>
index eb0d95182c73..41217ea792c5 100644<br>
--- a/llvm/lib/Analysis/InstructionSimplify.cpp<br>
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp<br>
@@ -4403,6 +4403,19 @@ Value
*llvm::SimplifyExtractElementInst(Value *Vec, Value *Idx,<br>
<br>
/// See if we can fold the given phi. If not, returns null.<br>
static Value *SimplifyPHINode(PHINode *PN, const
SimplifyQuery &Q) {<br>
+ // Is there an identical PHI node before this one in this
basic block?<br>
+ for (PHINode &Src : PN->getParent()->phis()) {<br>
</blockquote>
<div><br>
</div>
<div>This should probably check whether PN->getParent() is
null. It is legal to invoke Simplify queries on instructions
that have not been inserted yet.<br>
</div>
<div> <br>
</div>
<blockquote class="gmail_quote" style="margin:0px 0px 0px
0.8ex;border-left:1px solid
rgb(204,204,204);padding-left:1ex">
+ // Once we've reached the PHI node we've been asked
about, stop looking.<br>
+ if (&Src == PN)<br>
+ break;<br>
+ // If the previous PHI is currently trivially dead,
ignore it,<br>
+ // it might have been already recorded as being dead.<br>
+ if (Src.use_empty())<br>
+ continue;<br>
</blockquote>
<div><br>
</div>
<div>This is another indication that this general class of
transforms can break implicit assumptions (InstSimplify
cannot simplify to a dead inst, as it would not be use-def
reachable).</div>
<div><br>
</div>
<blockquote class="gmail_quote" style="margin:0px 0px 0px
0.8ex;border-left:1px solid
rgb(204,204,204);padding-left:1ex">
+ if (PN->isIdenticalToWhenDefined(&Src))<br>
+ return &Src;<br>
+ }<br>
+<br>
// If all of the PHI's incoming values are the same then
replace the PHI node<br>
// with the common value.<br>
Value *CommonValue = nullptr;<br>
<br>
diff --git a/llvm/lib/IR/Instruction.cpp
b/llvm/lib/IR/Instruction.cpp<br>
index bfbd801cb7a7..f09142530949 100644<br>
--- a/llvm/lib/IR/Instruction.cpp<br>
+++ b/llvm/lib/IR/Instruction.cpp<br>
@@ -483,17 +483,33 @@ bool
Instruction::isIdenticalToWhenDefined(const Instruction *I)
const {<br>
if (getNumOperands() == 0 &&
I->getNumOperands() == 0)<br>
return haveSameSpecialState(this, I);<br>
<br>
- // We have two instructions of identical opcode and
#operands. Check to see<br>
- // if all operands are the same.<br>
- if (!std::equal(op_begin(), op_end(), I->op_begin()))<br>
- return false;<br>
-<br>
+ // PHI nodes are special.<br>
if (const PHINode *thisPHI =
dyn_cast<PHINode>(this)) {<br>
const PHINode *otherPHI = cast<PHINode>(I);<br>
- return std::equal(thisPHI->block_begin(),
thisPHI->block_end(),<br>
+ // PHI nodes don't nessesairly have their operands in
the same order,<br>
+ // so we shouldn't just compare ranges of incoming
blocks/values.<br>
+<br>
+ // If both PHI's are in the same basic block, which is
the most interesting<br>
+ // case, we know they must have identical predecessor
list,<br>
+ // so we only need to check the incoming values.<br>
+ if (thisPHI->getParent() ==
otherPHI->getParent()) {<br>
+ return all_of(thisPHI->blocks(), [thisPHI,
otherPHI](BasicBlock *PredBB) {<br>
+ return thisPHI->getIncomingValueForBlock(PredBB)
==<br>
+
otherPHI->getIncomingValueForBlock(PredBB);<br>
+ });<br>
+ }<br>
+<br>
+ // Otherwise, let's just naively compare
operands/blocks.<br>
+ return std::equal(op_begin(), op_end(),
I->op_begin()) &&<br>
+ std::equal(thisPHI->block_begin(),
thisPHI->block_end(),<br>
otherPHI->block_begin());<br>
}<br>
<br>
+ // We have two instructions of identical opcode and
#operands. Check to see<br>
+ // if all operands are the same.<br>
+ if (!std::equal(op_begin(), op_end(), I->op_begin()))<br>
+ return false;<br>
+<br>
return haveSameSpecialState(this, I);<br>
}<br>
<br>
<br>
diff --git a/llvm/test/CodeGen/X86/statepoint-vector.ll
b/llvm/test/CodeGen/X86/statepoint-vector.ll<br>
index a7d7be8ed069..367eea88c185 100644<br>
--- a/llvm/test/CodeGen/X86/statepoint-vector.ll<br>
+++ b/llvm/test/CodeGen/X86/statepoint-vector.ll<br>
@@ -57,16 +57,15 @@ entry:<br>
define <2 x i64 addrspace(1)*> @test3(i1 %cnd, <2
x i64 addrspace(1)*>* %ptr) gc "statepoint-example" {<br>
; CHECK-LABEL: test3:<br>
; CHECK: # %bb.0: # %entry<br>
-; CHECK-NEXT: subq $40, %rsp<br>
-; CHECK-NEXT: .cfi_def_cfa_offset 48<br>
+; CHECK-NEXT: subq $24, %rsp<br>
+; CHECK-NEXT: .cfi_def_cfa_offset 32<br>
; CHECK-NEXT: testb $1, %dil<br>
; CHECK-NEXT: movaps (%rsi), %xmm0<br>
; CHECK-NEXT: movaps %xmm0, (%rsp)<br>
-; CHECK-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)<br>
; CHECK-NEXT: callq do_safepoint<br>
; CHECK-NEXT: .Ltmp2:<br>
; CHECK-NEXT: movaps (%rsp), %xmm0<br>
-; CHECK-NEXT: addq $40, %rsp<br>
+; CHECK-NEXT: addq $24, %rsp<br>
; CHECK-NEXT: .cfi_def_cfa_offset 8<br>
; CHECK-NEXT: retq<br>
entry:<br>
@@ -115,7 +114,7 @@ entry:<br>
; Check that we can lower a constant typed as i128
correctly. We don't have<br>
; a representation of larger than 64 bit constant in the
StackMap format. At<br>
; the moment, this simply means spilling them, but there's
a potential<br>
-; optimization for values representable as sext(Con64). <br>
+; optimization for values representable as sext(Con64).<br>
define void @test5() gc "statepoint-example" {<br>
; CHECK-LABEL: test5:<br>
; CHECK: # %bb.0: # %entry<br>
@@ -172,31 +171,17 @@ entry:<br>
; CHECK: .long 0<br>
<br>
; CHECK: .Ltmp2-test3<br>
-; Check for the four spill slots<br>
-; Stack Maps: Loc 3: Indirect 7+16 [encoding:
.byte 3, .byte 0, .short 16, .short 7, .short 0, .int 16]<br>
-; Stack Maps: Loc 4: Indirect 7+16 [encoding:
.byte 3, .byte 0, .short 16, .short 7, .short 0, .int 16]<br>
-; Stack Maps: Loc 5: Indirect 7+16 [encoding:
.byte 3, .byte 0, .short 16, .short 7, .short 0, .int 16]<br>
-; Stack Maps: Loc 6: Indirect 7+0 [encoding:
.byte 3, .byte 0, .short 16, .short 7, .short 0, .int 0]<br>
+; Check for the two spill slots<br>
+; Stack Maps: Loc 3: Indirect 7+0 [encoding:
.byte 3, .byte 0, .short 16, .short 7, .short 0, .int 0]<br>
+; Stack Maps: Loc 4: Indirect 7+0 [encoding:
.byte 3, .byte 0, .short 16, .short 7, .short 0, .int 0]<br>
; CHECK: .byte 3<br>
; CHECK: .byte 0<br>
; CHECK: .short 16<br>
; CHECK: .short 7<br>
; CHECK: .short 0<br>
-; CHECK: .long 16<br>
-; CHECK: .byte 3<br>
-; CHECK: .byte 0<br>
-; CHECK: .short 16<br>
-; CHECK: .short 7<br>
-; CHECK: .short 0<br>
-; CHECK: .long 16<br>
-; CHECK: .byte 3<br>
-; CHECK: .byte 0<br>
-; CHECK: .short 16<br>
-; CHECK: .short 7<br>
-; CHECK: .short 0<br>
-; CHECK: .long 16<br>
+; CHECK: .long 0<br>
; CHECK: .byte 3<br>
-; CHECK: .byte 0<br>
+; CHECK: .byte 0<br>
; CHECK: .short 16<br>
; CHECK: .short 7<br>
; CHECK: .short 0<br>
<br>
diff --git a/llvm/test/Transforms/EarlyCSE/phi.ll
b/llvm/test/Transforms/EarlyCSE/phi.ll<br>
index 2c2972be5104..efe08a63948e 100644<br>
--- a/llvm/test/Transforms/EarlyCSE/phi.ll<br>
+++ b/llvm/test/Transforms/EarlyCSE/phi.ll<br>
@@ -13,9 +13,8 @@ define void @test0(i32 %v0, i32 %v1, i1
%c, i32* %d0, i32* %d1) {<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [
[[V1]], [[B1]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: ret void<br>
;<br>
entry:<br>
@@ -46,9 +45,8 @@ define void @test1(i32 %v0, i32 %v1, i1
%c, i32* %d0, i32* %d1) {<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V1]], [[B1]] ], [
[[V0]], [[B0]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: ret void<br>
;<br>
entry:<br>
@@ -141,9 +139,8 @@ define void @negative_test4(i32 %v0, i32
%v1, i1 %c, i32* %d0, i32* %d1) {<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V1]], [[B1]] ], [
[[V0]], [[B0]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: ret void<br>
;<br>
entry:<br>
@@ -234,9 +231,8 @@ define void @test7(i32 %v0, i32 %v1, i16
%v2, i16 %v3, i1 %c, i32* %d0, i32* %d1<br>
; CHECK: end:<br>
; CHECK-NEXT: [[IBAD:%.*]] = phi i16 [ [[V2:%.*]],
[[B0]] ], [ [[V3:%.*]], [[B1]] ]<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [
[[V1]], [[B1]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: store i16 [[IBAD]], i16* [[D2:%.*]], align
2<br>
; CHECK-NEXT: ret void<br>
;<br>
@@ -269,9 +265,8 @@ define void @test8(i32 %v0, i32 %v1, i16
%v2, i16 %v3, i1 %c, i32* %d0, i32* %d1<br>
; CHECK: end:<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
; CHECK-NEXT: [[IBAD:%.*]] = phi i16 [ [[V2:%.*]],
[[B0]] ], [ [[V3:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [
[[V1]], [[B1]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: store i16 [[IBAD]], i16* [[D2:%.*]], align
2<br>
; CHECK-NEXT: ret void<br>
;<br>
@@ -303,10 +298,9 @@ define void @test9(i32 %v0, i32 %v1,
i16 %v2, i16 %v3, i1 %c, i32* %d0, i32* %d1<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [
[[V1]], [[B1]] ]<br>
; CHECK-NEXT: [[IBAD:%.*]] = phi i16 [ [[V2:%.*]],
[[B0]] ], [ [[V3:%.*]], [[B1]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: store i16 [[IBAD]], i16* [[D2:%.*]], align
2<br>
; CHECK-NEXT: ret void<br>
;<br>
<br>
diff --git
a/llvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll
b/llvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll<br>
index 5be341fa6228..be00822834d8 100644<br>
---
a/llvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll<br>
+++
b/llvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll<br>
@@ -1,5 +1,5 @@<br>
; NOTE: Assertions have been autogenerated by
utils/update_test_checks.py<br>
-; RUN: opt %s -instcombine
-instcombine-infinite-loop-threshold=2 -S | FileCheck %s<br>
+; RUN: opt %s -instcombine
-instcombine-infinite-loop-threshold=3 -S | FileCheck %s<br>
<br>
@var_7 = external global i8, align 1<br>
@var_1 = external global i32, align 4<br>
@@ -29,11 +29,10 @@ define void @_Z4testv() {<br>
; CHECK-NEXT: br label [[BB12]]<br>
; CHECK: bb12:<br>
; CHECK-NEXT: [[STOREMERGE1:%.*]] = phi i32 [ [[I11]],
[[BB10]] ], [ 1, [[BB9]] ]<br>
-; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ [[I11]],
[[BB10]] ], [ 1, [[BB9]] ]<br>
; CHECK-NEXT: store i32 [[STOREMERGE1]], i32*
getelementptr inbounds ([0 x i32], [0 x i32]* @arr_2, i64 0,
i64 0), align 4<br>
; CHECK-NEXT: store i16 [[I4]], i16* getelementptr
inbounds ([0 x i16], [0 x i16]* @arr_4, i64 0, i64 0), align
2<br>
; CHECK-NEXT: store i32 [[I8]], i32* getelementptr
inbounds ([8 x i32], [8 x i32]* @arr_3, i64 0, i64 0), align
16<br>
-; CHECK-NEXT: store i32 [[STOREMERGE]], i32*
getelementptr inbounds ([0 x i32], [0 x i32]* @arr_2, i64 0,
i64 1), align 4<br>
+; CHECK-NEXT: store i32 [[STOREMERGE1]], i32*
getelementptr inbounds ([0 x i32], [0 x i32]* @arr_2, i64 0,
i64 1), align 4<br>
; CHECK-NEXT: store i16 [[I4]], i16* getelementptr
inbounds ([0 x i16], [0 x i16]* @arr_4, i64 0, i64 1), align
2<br>
; CHECK-NEXT: store i32 [[I8]], i32* getelementptr
inbounds ([8 x i32], [8 x i32]* @arr_3, i64 0, i64 1), align
4<br>
; CHECK-NEXT: ret void<br>
<br>
diff --git
a/llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll
b/llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll<br>
index 866750c27177..0befa4b7a2ad 100644<br>
---
a/llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll<br>
+++
b/llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll<br>
@@ -25,13 +25,8 @@ define { i32, i32 } @test0({ i32, i32 }
%agg_left, { i32, i32 } %agg_right, i1 %<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
; CHECK-NEXT: [[AGG_LEFT_PN:%.*]] = phi { i32, i32 } [
[[AGG_LEFT:%.*]], [[LEFT]] ], [ [[AGG_RIGHT:%.*]], [[RIGHT]]
]<br>
-; CHECK-NEXT: [[AGG_LEFT_PN1:%.*]] = phi { i32, i32 } [
[[AGG_LEFT]], [[LEFT]] ], [ [[AGG_RIGHT]], [[RIGHT]] ]<br>
-; CHECK-NEXT: [[I6:%.*]] = extractvalue { i32, i32 }
[[AGG_LEFT_PN1]], 1<br>
-; CHECK-NEXT: [[I5:%.*]] = extractvalue { i32, i32 }
[[AGG_LEFT_PN]], 0<br>
; CHECK-NEXT: call void @baz()<br>
-; CHECK-NEXT: [[I7:%.*]] = insertvalue { i32, i32 }
undef, i32 [[I5]], 0<br>
-; CHECK-NEXT: [[I8:%.*]] = insertvalue { i32, i32 }
[[I7]], i32 [[I6]], 1<br>
-; CHECK-NEXT: ret { i32, i32 } [[I8]]<br>
+; CHECK-NEXT: ret { i32, i32 } [[AGG_LEFT_PN]]<br>
;<br>
entry:<br>
br i1 %c, label %left, label %right<br>
@@ -162,19 +157,13 @@ define { i32, i32 } @test3({ i32, i32
} %agg_00, { i32, i32 } %agg_01, { i32, i3<br>
; CHECK-NEXT: br label [[BB0_MERGE]]<br>
; CHECK: bb0.merge:<br>
; CHECK-NEXT: [[AGG_00_PN:%.*]] = phi { i32, i32 } [
[[AGG_00:%.*]], [[BB00]] ], [ [[AGG_01:%.*]], [[BB01]] ]<br>
-; CHECK-NEXT: [[AGG_00_PN1:%.*]] = phi { i32, i32 } [
[[AGG_00]], [[BB00]] ], [ [[AGG_01]], [[BB01]] ]<br>
; CHECK-NEXT: br label [[END:%.*]]<br>
; CHECK: bb10:<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
; CHECK-NEXT: [[AGG_00_PN_PN:%.*]] = phi { i32, i32 } [
[[AGG_00_PN]], [[BB0_MERGE]] ], [ [[AGG_10:%.*]], [[BB10]] ]<br>
-; CHECK-NEXT: [[AGG_00_PN1_PN:%.*]] = phi { i32, i32 } [
[[AGG_00_PN1]], [[BB0_MERGE]] ], [ [[AGG_10]], [[BB10]] ]<br>
-; CHECK-NEXT: [[I9:%.*]] = extractvalue { i32, i32 }
[[AGG_00_PN1_PN]], 1<br>
-; CHECK-NEXT: [[I8:%.*]] = extractvalue { i32, i32 }
[[AGG_00_PN_PN]], 0<br>
; CHECK-NEXT: call void @baz()<br>
-; CHECK-NEXT: [[I10:%.*]] = insertvalue { i32, i32 }
undef, i32 [[I8]], 0<br>
-; CHECK-NEXT: [[I11:%.*]] = insertvalue { i32, i32 }
[[I10]], i32 [[I9]], 1<br>
-; CHECK-NEXT: ret { i32, i32 } [[I11]]<br>
+; CHECK-NEXT: ret { i32, i32 } [[AGG_00_PN_PN]]<br>
;<br>
entry:<br>
br i1 %c0, label %bb0.dispatch, label %bb10<br>
@@ -277,17 +266,12 @@ define { i32, i32 } @test5({ i32, i32
} %agg_left, { i32, i32 } %agg_right, i1 %<br>
; CHECK-NEXT: call void @bar()<br>
; CHECK-NEXT: br label [[MIDDLE]]<br>
; CHECK: middle:<br>
-; CHECK-NEXT: [[AGG_LEFT_PN:%.*]] = phi { i32, i32 } [
[[AGG_LEFT:%.*]], [[LEFT]] ], [ [[AGG_RIGHT:%.*]], [[RIGHT]]
], [ [[I8:%.*]], [[MIDDLE]] ]<br>
-; CHECK-NEXT: [[AGG_LEFT_PN1:%.*]] = phi { i32, i32 } [
[[AGG_LEFT]], [[LEFT]] ], [ [[AGG_RIGHT]], [[RIGHT]] ], [
[[I8]], [[MIDDLE]] ]<br>
-; CHECK-NEXT: [[I6:%.*]] = extractvalue { i32, i32 }
[[AGG_LEFT_PN1]], 1<br>
-; CHECK-NEXT: [[I5:%.*]] = extractvalue { i32, i32 }
[[AGG_LEFT_PN]], 0<br>
+; CHECK-NEXT: [[AGG_LEFT_PN:%.*]] = phi { i32, i32 } [
[[AGG_LEFT:%.*]], [[LEFT]] ], [ [[AGG_RIGHT:%.*]], [[RIGHT]]
], [ [[AGG_LEFT_PN]], [[MIDDLE]] ]<br>
; CHECK-NEXT: call void @baz()<br>
-; CHECK-NEXT: [[I7:%.*]] = insertvalue { i32, i32 }
undef, i32 [[I5]], 0<br>
-; CHECK-NEXT: [[I8]] = insertvalue { i32, i32 } [[I7]],
i32 [[I6]], 1<br>
; CHECK-NEXT: [[C1:%.*]] = call i1 @geni1()<br>
; CHECK-NEXT: br i1 [[C1]], label [[END:%.*]], label
[[MIDDLE]]<br>
; CHECK: end:<br>
-; CHECK-NEXT: ret { i32, i32 } [[I8]]<br>
+; CHECK-NEXT: ret { i32, i32 } [[AGG_LEFT_PN]]<br>
;<br>
entry:<br>
br i1 %c0, label %left, label %right<br>
@@ -332,19 +316,14 @@ define { i32, i32 } @test6({ i32, i32
} %agg_left, { i32, i32 } %agg_right, i1 %<br>
; CHECK-NEXT: br label [[MERGE]]<br>
; CHECK: merge:<br>
; CHECK-NEXT: [[AGG_LEFT_PN:%.*]] = phi { i32, i32 } [
[[AGG_LEFT:%.*]], [[LEFT]] ], [ [[AGG_RIGHT:%.*]], [[RIGHT]]
]<br>
-; CHECK-NEXT: [[AGG_LEFT_PN1:%.*]] = phi { i32, i32 } [
[[AGG_LEFT]], [[LEFT]] ], [ [[AGG_RIGHT]], [[RIGHT]] ]<br>
; CHECK-NEXT: call void @baz()<br>
; CHECK-NEXT: br i1 [[C1:%.*]], label [[END:%.*]], label
[[PASSTHROUGH:%.*]]<br>
; CHECK: passthrough:<br>
; CHECK-NEXT: call void @qux()<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
-; CHECK-NEXT: [[I6:%.*]] = extractvalue { i32, i32 }
[[AGG_LEFT_PN1]], 1<br>
-; CHECK-NEXT: [[I5:%.*]] = extractvalue { i32, i32 }
[[AGG_LEFT_PN]], 0<br>
; CHECK-NEXT: call void @quux()<br>
-; CHECK-NEXT: [[I7:%.*]] = insertvalue { i32, i32 }
undef, i32 [[I5]], 0<br>
-; CHECK-NEXT: [[I8:%.*]] = insertvalue { i32, i32 }
[[I7]], i32 [[I6]], 1<br>
-; CHECK-NEXT: ret { i32, i32 } [[I8]]<br>
+; CHECK-NEXT: ret { i32, i32 } [[AGG_LEFT_PN]]<br>
;<br>
entry:<br>
br i1 %c0, label %left, label %right<br>
@@ -451,13 +430,8 @@ define { i32, i32 } @test8({ i32, i32 }
%agg_left, { i32, i32 } %agg_right, i1 %<br>
; CHECK-NEXT: unreachable<br>
; CHECK: end:<br>
; CHECK-NEXT: [[AGG_LEFT_PN:%.*]] = phi { i32, i32 } [
[[AGG_LEFT:%.*]], [[LEFT]] ], [ [[AGG_LEFT]], [[LEFT]] ], [
[[AGG_RIGHT:%.*]], [[RIGHT]] ], [ [[AGG_RIGHT]], [[RIGHT]] ]<br>
-; CHECK-NEXT: [[AGG_LEFT_PN1:%.*]] = phi { i32, i32 } [
[[AGG_LEFT]], [[LEFT]] ], [ [[AGG_LEFT]], [[LEFT]] ], [
[[AGG_RIGHT]], [[RIGHT]] ], [ [[AGG_RIGHT]], [[RIGHT]] ]<br>
-; CHECK-NEXT: [[I6:%.*]] = extractvalue { i32, i32 }
[[AGG_LEFT_PN1]], 1<br>
-; CHECK-NEXT: [[I5:%.*]] = extractvalue { i32, i32 }
[[AGG_LEFT_PN]], 0<br>
; CHECK-NEXT: call void @baz()<br>
-; CHECK-NEXT: [[I7:%.*]] = insertvalue { i32, i32 }
undef, i32 [[I5]], 0<br>
-; CHECK-NEXT: [[I8:%.*]] = insertvalue { i32, i32 }
[[I7]], i32 [[I6]], 1<br>
-; CHECK-NEXT: ret { i32, i32 } [[I8]]<br>
+; CHECK-NEXT: ret { i32, i32 } [[AGG_LEFT_PN]]<br>
;<br>
entry:<br>
br i1 %c, label %left, label %right<br>
@@ -505,13 +479,8 @@ define { i32, i32 } @test9({ i32, i32 }
%agg_left, { i32, i32 } %agg_right, i1 %<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
; CHECK-NEXT: [[AGG_LEFT_PN:%.*]] = phi { i32, i32 } [
[[AGG_LEFT:%.*]], [[LEFT]] ], [ [[AGG_RIGHT:%.*]], [[RIGHT]]
]<br>
-; CHECK-NEXT: [[AGG_LEFT_PN1:%.*]] = phi { i32, i32 } [
[[AGG_LEFT]], [[LEFT]] ], [ [[AGG_RIGHT]], [[RIGHT]] ]<br>
-; CHECK-NEXT: [[I7:%.*]] = extractvalue { i32, i32 }
[[AGG_LEFT_PN1]], 1<br>
-; CHECK-NEXT: [[I0_PN:%.*]] = extractvalue { i32, i32 }
[[AGG_LEFT_PN]], 0<br>
-; CHECK-NEXT: [[I6:%.*]] = insertvalue { i32, i32 }
undef, i32 [[I0_PN]], 0<br>
; CHECK-NEXT: call void @baz()<br>
-; CHECK-NEXT: [[I8:%.*]] = insertvalue { i32, i32 }
[[I6]], i32 [[I7]], 1<br>
-; CHECK-NEXT: ret { i32, i32 } [[I8]]<br>
+; CHECK-NEXT: ret { i32, i32 } [[AGG_LEFT_PN]]<br>
;<br>
entry:<br>
br i1 %c, label %left, label %right<br>
<br>
diff --git
a/llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll
b/llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll<br>
index db5402bd78c1..4e37dfc1357f 100644<br>
---
a/llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll<br>
+++
b/llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll<br>
@@ -15,17 +15,13 @@ define i32 @test_gep_and_bitcast(i1
%cond, i1 %cond2) {<br>
; ALL-NEXT: [[OBJ:%.*]] = call i8* @get_ptr.i8()<br>
; ALL-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label
[[BB2:%.*]]<br>
; ALL: bb1:<br>
-; ALL-NEXT: [[PTR1:%.*]] = getelementptr inbounds i8,
i8* [[OBJ]], i64 16<br>
-; ALL-NEXT: [[PTR1_TYPED:%.*]] = bitcast i8* [[PTR1]] to
i32*<br>
; ALL-NEXT: br label [[EXIT:%.*]]<br>
; ALL: bb2:<br>
-; ALL-NEXT: [[PTR2:%.*]] = getelementptr inbounds i8,
i8* [[OBJ]], i64 16<br>
-; ALL-NEXT: [[PTR2_TYPED:%.*]] = bitcast i8* [[PTR2]] to
i32*<br>
; ALL-NEXT: br label [[EXIT]]<br>
; ALL: exit:<br>
-; ALL-NEXT: [[PTR_TYPED:%.*]] = phi i32* [
[[PTR1_TYPED]], [[BB1]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; ALL-NEXT: [[RES_PHI_IN:%.*]] = phi i32* [
[[PTR1_TYPED]], [[BB1]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; ALL-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[RES_PHI_IN]], align 4<br>
+; ALL-NEXT: [[PTR_TYPED_IN:%.*]] = getelementptr
inbounds i8, i8* [[OBJ]], i64 16<br>
+; ALL-NEXT: [[PTR_TYPED:%.*]] = bitcast i8*
[[PTR_TYPED_IN]] to i32*<br>
+; ALL-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[PTR_TYPED]], align 4<br>
; ALL-NEXT: store i32 1, i32* [[PTR_TYPED]], align 4<br>
; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32
[[RES_PHI]], i32 1<br>
; ALL-NEXT: ret i32 [[RES]]<br>
@@ -60,17 +56,13 @@ define i32 @test_gep_and_bitcast_arg(i8*
%obj, i1 %cond, i1 %cond2) {<br>
; ALL-NEXT: entry:<br>
; ALL-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label
[[BB2:%.*]]<br>
; ALL: bb1:<br>
-; ALL-NEXT: [[PTR1:%.*]] = getelementptr inbounds i8,
i8* [[OBJ:%.*]], i64 16<br>
-; ALL-NEXT: [[PTR1_TYPED:%.*]] = bitcast i8* [[PTR1]] to
i32*<br>
; ALL-NEXT: br label [[EXIT:%.*]]<br>
; ALL: bb2:<br>
-; ALL-NEXT: [[PTR2:%.*]] = getelementptr inbounds i8,
i8* [[OBJ]], i64 16<br>
-; ALL-NEXT: [[PTR2_TYPED:%.*]] = bitcast i8* [[PTR2]] to
i32*<br>
; ALL-NEXT: br label [[EXIT]]<br>
; ALL: exit:<br>
-; ALL-NEXT: [[PTR_TYPED:%.*]] = phi i32* [
[[PTR1_TYPED]], [[BB1]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; ALL-NEXT: [[RES_PHI_IN:%.*]] = phi i32* [
[[PTR1_TYPED]], [[BB1]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; ALL-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[RES_PHI_IN]], align 4<br>
+; ALL-NEXT: [[PTR_TYPED_IN:%.*]] = getelementptr
inbounds i8, i8* [[OBJ:%.*]], i64 16<br>
+; ALL-NEXT: [[PTR_TYPED:%.*]] = bitcast i8*
[[PTR_TYPED_IN]] to i32*<br>
+; ALL-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[PTR_TYPED]], align 4<br>
; ALL-NEXT: store i32 1, i32* [[PTR_TYPED]], align 4<br>
; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32
[[RES_PHI]], i32 1<br>
; ALL-NEXT: ret i32 [[RES]]<br>
@@ -116,17 +108,13 @@ define i32
@test_gep_and_bitcast_phi(i1 %cond, i1 %cond2, i1 %cond3) {<br>
; ALL-NEXT: call void @foo.i8(i8* [[ANOTHER_PHI]])<br>
; ALL-NEXT: br i1 [[COND2:%.*]], label [[BB3:%.*]],
label [[BB4:%.*]]<br>
; ALL: bb3:<br>
-; ALL-NEXT: [[PTR1:%.*]] = getelementptr inbounds i8,
i8* [[OBJ]], i64 16<br>
-; ALL-NEXT: [[PTR1_TYPED:%.*]] = bitcast i8* [[PTR1]] to
i32*<br>
; ALL-NEXT: br label [[EXIT:%.*]]<br>
; ALL: bb4:<br>
-; ALL-NEXT: [[PTR2:%.*]] = getelementptr inbounds i8,
i8* [[OBJ]], i64 16<br>
-; ALL-NEXT: [[PTR2_TYPED:%.*]] = bitcast i8* [[PTR2]] to
i32*<br>
; ALL-NEXT: br label [[EXIT]]<br>
; ALL: exit:<br>
-; ALL-NEXT: [[PTR_TYPED:%.*]] = phi i32* [
[[PTR1_TYPED]], [[BB3]] ], [ [[PTR2_TYPED]], [[BB4]] ]<br>
-; ALL-NEXT: [[RES_PHI_IN:%.*]] = phi i32* [
[[PTR1_TYPED]], [[BB3]] ], [ [[PTR2_TYPED]], [[BB4]] ]<br>
-; ALL-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[RES_PHI_IN]], align 4<br>
+; ALL-NEXT: [[PTR_TYPED_IN:%.*]] = getelementptr
inbounds i8, i8* [[OBJ]], i64 16<br>
+; ALL-NEXT: [[PTR_TYPED:%.*]] = bitcast i8*
[[PTR_TYPED_IN]] to i32*<br>
+; ALL-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[PTR_TYPED]], align 4<br>
; ALL-NEXT: store i32 1, i32* [[PTR_TYPED]], align 4<br>
; ALL-NEXT: [[RES:%.*]] = select i1 [[COND3:%.*]], i32
[[RES_PHI]], i32 1<br>
; ALL-NEXT: ret i32 [[RES]]<br>
@@ -176,15 +164,12 @@ define i32 @test_gep_i32ptr(i1 %cond,
i1 %cond2) {<br>
; ALL-NEXT: [[OBJ:%.*]] = call i32* @get_ptr.i32()<br>
; ALL-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label
[[BB2:%.*]]<br>
; ALL: bb1:<br>
-; ALL-NEXT: [[PTR1_TYPED:%.*]] = getelementptr inbounds
i32, i32* [[OBJ]], i64 16<br>
; ALL-NEXT: br label [[EXIT:%.*]]<br>
; ALL: bb2:<br>
-; ALL-NEXT: [[PTR2_TYPED:%.*]] = getelementptr inbounds
i32, i32* [[OBJ]], i64 16<br>
; ALL-NEXT: br label [[EXIT]]<br>
; ALL: exit:<br>
-; ALL-NEXT: [[PTR_TYPED:%.*]] = phi i32* [
[[PTR1_TYPED]], [[BB1]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; ALL-NEXT: [[RES_PHI_IN:%.*]] = phi i32* [
[[PTR1_TYPED]], [[BB1]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; ALL-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[RES_PHI_IN]], align 4<br>
+; ALL-NEXT: [[PTR_TYPED:%.*]] = getelementptr inbounds
i32, i32* [[OBJ]], i64 16<br>
+; ALL-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[PTR_TYPED]], align 4<br>
; ALL-NEXT: store i32 1, i32* [[PTR_TYPED]], align 4<br>
; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32
[[RES_PHI]], i32 1<br>
; ALL-NEXT: ret i32 [[RES]]<br>
@@ -218,17 +203,13 @@ define i32
@test_gep_and_bitcast_gep_base_ptr(i1 %cond, i1 %cond2) {<br>
; ALL-NEXT: [[OBJ0:%.*]] = call i8* @get_ptr.i8()<br>
; ALL-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label
[[BB2:%.*]]<br>
; ALL: bb1:<br>
-; ALL-NEXT: [[PTR1:%.*]] = getelementptr inbounds i8,
i8* [[OBJ0]], i64 32<br>
-; ALL-NEXT: [[PTR1_TYPED:%.*]] = bitcast i8* [[PTR1]] to
i32*<br>
; ALL-NEXT: br label [[EXIT:%.*]]<br>
; ALL: bb2:<br>
-; ALL-NEXT: [[PTR2:%.*]] = getelementptr inbounds i8,
i8* [[OBJ0]], i64 32<br>
-; ALL-NEXT: [[PTR2_TYPED:%.*]] = bitcast i8* [[PTR2]] to
i32*<br>
; ALL-NEXT: br label [[EXIT]]<br>
; ALL: exit:<br>
-; ALL-NEXT: [[PTR_TYPED:%.*]] = phi i32* [
[[PTR1_TYPED]], [[BB1]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; ALL-NEXT: [[RES_PHI_IN:%.*]] = phi i32* [
[[PTR1_TYPED]], [[BB1]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; ALL-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[RES_PHI_IN]], align 4<br>
+; ALL-NEXT: [[PTR_TYPED_IN:%.*]] = getelementptr
inbounds i8, i8* [[OBJ0]], i64 32<br>
+; ALL-NEXT: [[PTR_TYPED:%.*]] = bitcast i8*
[[PTR_TYPED_IN]] to i32*<br>
+; ALL-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[PTR_TYPED]], align 4<br>
; ALL-NEXT: store i32 1, i32* [[PTR_TYPED]], align 4<br>
; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32
[[RES_PHI]], i32 1<br>
; ALL-NEXT: ret i32 [[RES]]<br>
@@ -260,37 +241,19 @@ exit:<br>
}<br>
<br>
define i32 @test_gep_and_bitcast_same_bb(i1 %cond, i1
%cond2) {<br>
-; INSTCOMBINE-LABEL: @test_gep_and_bitcast_same_bb(<br>
-; INSTCOMBINE-NEXT: entry:<br>
-; INSTCOMBINE-NEXT: [[OBJ:%.*]] = call i8* @get_ptr.i8()<br>
-; INSTCOMBINE-NEXT: [[PTR1:%.*]] = getelementptr
inbounds i8, i8* [[OBJ]], i64 16<br>
-; INSTCOMBINE-NEXT: [[PTR1_TYPED:%.*]] = bitcast i8*
[[PTR1]] to i32*<br>
-; INSTCOMBINE-NEXT: br i1 [[COND:%.*]], label
[[EXIT:%.*]], label [[BB2:%.*]]<br>
-; INSTCOMBINE: bb2:<br>
-; INSTCOMBINE-NEXT: [[PTR2:%.*]] = getelementptr
inbounds i8, i8* [[OBJ]], i64 16<br>
-; INSTCOMBINE-NEXT: [[PTR2_TYPED:%.*]] = bitcast i8*
[[PTR2]] to i32*<br>
-; INSTCOMBINE-NEXT: br label [[EXIT]]<br>
-; INSTCOMBINE: exit:<br>
-; INSTCOMBINE-NEXT: [[PTR_TYPED:%.*]] = phi i32* [
[[PTR1_TYPED]], [[ENTRY:%.*]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; INSTCOMBINE-NEXT: [[RES_PHI_IN:%.*]] = phi i32* [
[[PTR1_TYPED]], [[ENTRY]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; INSTCOMBINE-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[RES_PHI_IN]], align 4<br>
-; INSTCOMBINE-NEXT: store i32 1, i32* [[PTR_TYPED]],
align 4<br>
-; INSTCOMBINE-NEXT: [[RES:%.*]] = select i1
[[COND2:%.*]], i32 [[RES_PHI]], i32 1<br>
-; INSTCOMBINE-NEXT: ret i32 [[RES]]<br>
-;<br>
-; INSTCOMBINEGVN-LABEL: @test_gep_and_bitcast_same_bb(<br>
-; INSTCOMBINEGVN-NEXT: entry:<br>
-; INSTCOMBINEGVN-NEXT: [[OBJ:%.*]] = call i8*
@get_ptr.i8()<br>
-; INSTCOMBINEGVN-NEXT: [[PTR1:%.*]] = getelementptr
inbounds i8, i8* [[OBJ]], i64 16<br>
-; INSTCOMBINEGVN-NEXT: [[PTR1_TYPED:%.*]] = bitcast i8*
[[PTR1]] to i32*<br>
-; INSTCOMBINEGVN-NEXT: br i1 [[COND:%.*]], label
[[EXIT:%.*]], label [[BB2:%.*]]<br>
-; INSTCOMBINEGVN: bb2:<br>
-; INSTCOMBINEGVN-NEXT: br label [[EXIT]]<br>
-; INSTCOMBINEGVN: exit:<br>
-; INSTCOMBINEGVN-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[PTR1_TYPED]], align 4<br>
-; INSTCOMBINEGVN-NEXT: store i32 1, i32* [[PTR1_TYPED]],
align 4<br>
-; INSTCOMBINEGVN-NEXT: [[RES:%.*]] = select i1
[[COND2:%.*]], i32 [[RES_PHI]], i32 1<br>
-; INSTCOMBINEGVN-NEXT: ret i32 [[RES]]<br>
+; ALL-LABEL: @test_gep_and_bitcast_same_bb(<br>
+; ALL-NEXT: entry:<br>
+; ALL-NEXT: [[OBJ:%.*]] = call i8* @get_ptr.i8()<br>
+; ALL-NEXT: br i1 [[COND:%.*]], label [[EXIT:%.*]],
label [[BB2:%.*]]<br>
+; ALL: bb2:<br>
+; ALL-NEXT: br label [[EXIT]]<br>
+; ALL: exit:<br>
+; ALL-NEXT: [[PTR_TYPED_IN:%.*]] = getelementptr
inbounds i8, i8* [[OBJ]], i64 16<br>
+; ALL-NEXT: [[PTR_TYPED:%.*]] = bitcast i8*
[[PTR_TYPED_IN]] to i32*<br>
+; ALL-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[PTR_TYPED]], align 4<br>
+; ALL-NEXT: store i32 1, i32* [[PTR_TYPED]], align 4<br>
+; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32
[[RES_PHI]], i32 1<br>
+; ALL-NEXT: ret i32 [[RES]]<br>
;<br>
entry:<br>
%obj = call i8* @get_ptr.i8()<br>
@@ -328,8 +291,7 @@ define i32
@test_gep_and_bitcast_same_bb_and_extra_use(i1 %cond, i1
%cond2) {<br>
; INSTCOMBINE-NEXT: br label [[EXIT]]<br>
; INSTCOMBINE: exit:<br>
; INSTCOMBINE-NEXT: [[PTR_TYPED:%.*]] = phi i32* [
[[PTR1_TYPED]], [[ENTRY:%.*]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; INSTCOMBINE-NEXT: [[RES_PHI_IN:%.*]] = phi i32* [
[[PTR1_TYPED]], [[ENTRY]] ], [ [[PTR2_TYPED]], [[BB2]] ]<br>
-; INSTCOMBINE-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[RES_PHI_IN]], align 4<br>
+; INSTCOMBINE-NEXT: [[RES_PHI:%.*]] = load i32, i32*
[[PTR_TYPED]], align 4<br>
; INSTCOMBINE-NEXT: store i32 1, i32* [[PTR_TYPED]],
align 4<br>
; INSTCOMBINE-NEXT: [[RES:%.*]] = select i1
[[COND2:%.*]], i32 [[RES_PHI]], i32 1<br>
; INSTCOMBINE-NEXT: ret i32 [[RES]]<br>
@@ -378,15 +340,12 @@ define i8 @test_gep(i1 %cond, i1
%cond2) {<br>
; ALL-NEXT: [[OBJ:%.*]] = call i8* @get_ptr.i8()<br>
; ALL-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label
[[BB2:%.*]]<br>
; ALL: bb1:<br>
-; ALL-NEXT: [[PTR1:%.*]] = getelementptr inbounds i8,
i8* [[OBJ]], i64 16<br>
; ALL-NEXT: br label [[EXIT:%.*]]<br>
; ALL: bb2:<br>
-; ALL-NEXT: [[PTR2:%.*]] = getelementptr inbounds i8,
i8* [[OBJ]], i64 16<br>
; ALL-NEXT: br label [[EXIT]]<br>
; ALL: exit:<br>
-; ALL-NEXT: [[PTR_TYPED:%.*]] = phi i8* [ [[PTR1]],
[[BB1]] ], [ [[PTR2]], [[BB2]] ]<br>
-; ALL-NEXT: [[RES_PHI_IN:%.*]] = phi i8* [ [[PTR1]],
[[BB1]] ], [ [[PTR2]], [[BB2]] ]<br>
-; ALL-NEXT: [[RES_PHI:%.*]] = load i8, i8*
[[RES_PHI_IN]], align 1<br>
+; ALL-NEXT: [[PTR_TYPED:%.*]] = getelementptr inbounds
i8, i8* [[OBJ]], i64 16<br>
+; ALL-NEXT: [[RES_PHI:%.*]] = load i8, i8*
[[PTR_TYPED]], align 1<br>
; ALL-NEXT: store i8 1, i8* [[PTR_TYPED]], align 1<br>
; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i8
[[RES_PHI]], i8 1<br>
; ALL-NEXT: ret i8 [[RES]]<br>
<br>
diff --git a/llvm/test/Transforms/InstCombine/select.ll
b/llvm/test/Transforms/InstCombine/select.ll<br>
index 73e1e4af7aac..aa5472ef43b8 100644<br>
--- a/llvm/test/Transforms/InstCombine/select.ll<br>
+++ b/llvm/test/Transforms/InstCombine/select.ll<br>
@@ -1926,10 +1926,7 @@ define i32 @select_dominance_chain(i1
%cond, i32 %x, i32 %y) {<br>
; CHECK-NEXT: br label [[MERGE_3]]<br>
; CHECK: merge.3:<br>
; CHECK-NEXT: [[S_3:%.*]] = phi i32 [ [[Y:%.*]],
[[IF_FALSE_3]] ], [ [[X:%.*]], [[IF_TRUE_3]] ]<br>
-; CHECK-NEXT: [[S_2:%.*]] = phi i32 [ [[Y]],
[[IF_FALSE_3]] ], [ [[X]], [[IF_TRUE_3]] ]<br>
-; CHECK-NEXT: [[S_1:%.*]] = phi i32 [ [[Y]],
[[IF_FALSE_3]] ], [ [[X]], [[IF_TRUE_3]] ]<br>
-; CHECK-NEXT: [[SUM_1:%.*]] = add i32 [[S_1]], [[S_2]]<br>
-; CHECK-NEXT: [[SUM_2:%.*]] = add i32 [[SUM_1]], [[S_3]]<br>
+; CHECK-NEXT: [[SUM_2:%.*]] = mul i32 [[S_3]], 3<br>
; CHECK-NEXT: ret i32 [[SUM_2]]<br>
;<br>
entry:<br>
<br>
diff --git a/llvm/test/Transforms/InstSimplify/phi-cse.ll
b/llvm/test/Transforms/InstSimplify/phi-cse.ll<br>
index a032adff0526..ba5d2b614830 100644<br>
--- a/llvm/test/Transforms/InstSimplify/phi-cse.ll<br>
+++ b/llvm/test/Transforms/InstSimplify/phi-cse.ll<br>
@@ -12,9 +12,8 @@ define void @test0(i32 %v0, i32 %v1, i1
%c, i32* %d0, i32* %d1) {<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [
[[V1]], [[B1]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: ret void<br>
;<br>
entry:<br>
@@ -45,9 +44,8 @@ define void @test1(i32 %v0, i32 %v1, i1
%c, i32* %d0, i32* %d1) {<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V1]], [[B1]] ], [
[[V0]], [[B0]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: ret void<br>
;<br>
entry:<br>
@@ -140,9 +138,8 @@ define void @negative_test4(i32 %v0, i32
%v1, i1 %c, i32* %d0, i32* %d1) {<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V1]], [[B1]] ], [
[[V0]], [[B0]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: ret void<br>
;<br>
entry:<br>
@@ -233,9 +230,8 @@ define void @test7(i32 %v0, i32 %v1, i16
%v2, i16 %v3, i1 %c, i32* %d0, i32* %d1<br>
; CHECK: end:<br>
; CHECK-NEXT: [[IBAD:%.*]] = phi i16 [ [[V2:%.*]],
[[B0]] ], [ [[V3:%.*]], [[B1]] ]<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [
[[V1]], [[B1]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: store i16 [[IBAD]], i16* [[D2:%.*]], align
2<br>
; CHECK-NEXT: ret void<br>
;<br>
@@ -268,9 +264,8 @@ define void @test8(i32 %v0, i32 %v1, i16
%v2, i16 %v3, i1 %c, i32* %d0, i32* %d1<br>
; CHECK: end:<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
; CHECK-NEXT: [[IBAD:%.*]] = phi i16 [ [[V2:%.*]],
[[B0]] ], [ [[V3:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [
[[V1]], [[B1]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: store i16 [[IBAD]], i16* [[D2:%.*]], align
2<br>
; CHECK-NEXT: ret void<br>
;<br>
@@ -302,10 +297,9 @@ define void @test9(i32 %v0, i32 %v1,
i16 %v2, i16 %v3, i1 %c, i32* %d0, i32* %d1<br>
; CHECK-NEXT: br label [[END]]<br>
; CHECK: end:<br>
; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]]
], [ [[V1:%.*]], [[B1]] ]<br>
-; CHECK-NEXT: [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [
[[V1]], [[B1]] ]<br>
; CHECK-NEXT: [[IBAD:%.*]] = phi i16 [ [[V2:%.*]],
[[B0]] ], [ [[V3:%.*]], [[B1]] ]<br>
; CHECK-NEXT: store i32 [[I0]], i32* [[D0:%.*]], align 4<br>
-; CHECK-NEXT: store i32 [[I1]], i32* [[D1:%.*]], align 4<br>
+; CHECK-NEXT: store i32 [[I0]], i32* [[D1:%.*]], align 4<br>
; CHECK-NEXT: store i16 [[IBAD]], i16* [[D2:%.*]], align
2<br>
; CHECK-NEXT: ret void<br>
;<br>
<br>
diff --git a/llvm/test/Transforms/JumpThreading/loop-phi.ll
b/llvm/test/Transforms/JumpThreading/loop-phi.ll<br>
index 7ec69f97c258..0f4551e9200d 100644<br>
--- a/llvm/test/Transforms/JumpThreading/loop-phi.ll<br>
+++ b/llvm/test/Transforms/JumpThreading/loop-phi.ll<br>
@@ -9,7 +9,7 @@<br>
<br>
; CHECK: latch1:<br>
; CHECK-NEXT: %tmp165 = phi i32 [ %tmp163, %body2.thread ],
[ %tmp16, %body2 ]<br>
-; CHECK-NEXT: %tmp154 = phi i32 [ %tmp165, %body2.thread ],
[ %tmp15, %body2 ]<br>
+; CHECK-NEXT: %tmp154 = phi i32 [ %tmp165, %body2.thread ],
[ %tmp14, %body2 ]<br>
<br>
define i32 @test(i1 %ARG1, i1 %ARG2, i32 %n) {<br>
entry:<br>
<br>
diff --git
a/llvm/test/Transforms/LoopVectorize/reduction.ll
b/llvm/test/Transforms/LoopVectorize/reduction.ll<br>
index 4599899f7378..29fd1221362b 100644<br>
--- a/llvm/test/Transforms/LoopVectorize/reduction.ll<br>
+++ b/llvm/test/Transforms/LoopVectorize/reduction.ll<br>
@@ -504,7 +504,6 @@ exit:<br>
;CHECK: add <4 x i32><br>
;CHECK: extractelement <4 x i32> %{{.*}}, i32 0<br>
;CHECK: %sum.lcssa = phi i32 [ %[[SCALAR:.*]], %.<a
href="http://lr.ph" rel="noreferrer" target="_blank"
moz-do-not-send="true">lr.ph</a> ], [ %[[VECTOR:.*]],
%middle.block ]<br>
-;CHECK: %sum.copy = phi i32 [ %[[SCALAR]], %.<a
href="http://lr.ph" rel="noreferrer" target="_blank"
moz-do-not-send="true">lr.ph</a> ], [ %[[VECTOR]],
%middle.block ]<br>
;CHECK: ret i32<br>
define i32 @reduction_sum_multiuse(i32 %n, i32* noalias
nocapture %A, i32* noalias nocapture %B) {<br>
%1 = icmp sgt i32 %n, 0<br>
<br>
<br>
<br>
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