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<b>Sent:</b> Saturday, July 18, 2020 4:25:12 PM<br>
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<b>Subject:</b> llvm-commits Digest, Vol 193, Issue 447</font>
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Today's Topics:<br>
<br>
1. [PATCH] D84092: [DebugInfo] Make DIELocList::SizeOf() more<br>
explicit. NFCI. (Igor Kudrin via Phabricator via llvm-commits)<br>
2. [PATCH] D84093: [DebugInfo] Fix a comment and a variable<br>
name. NFC. (Igor Kudrin via Phabricator via llvm-commits)<br>
3. [PATCH] D84094: [DebugInfo] Fix misleading using of DWARF<br>
forms with DIELabel. NFCI.<br>
(Igor Kudrin via Phabricator via llvm-commits)<br>
4. [PATCH] D84095: [DebugInfo] Make DIEDelta::SizeOf() more<br>
explicit. NFCI. (Igor Kudrin via Phabricator via llvm-commits)<br>
5. [PATCH] D84085: [SROA][Mem2Reg] Do not crash on alloca +<br>
addrspacecast (Matt Arsenault via Phabricator via llvm-commits)<br>
6. [PATCH] D84085: [SROA][Mem2Reg] Do not crash on alloca +<br>
addrspacecast (Matt Arsenault via Phabricator via llvm-commits)<br>
7. [PATCH] D80750: llvm-link: Add module flag behavior<br>
MergeTargetID (Yaxun Liu via Phabricator via llvm-commits)<br>
8. [PATCH] D84098: [AMDGPU][MC] Corrected decoding of 16-bit<br>
literals (Dmitry Preobrazhensky via Phabricator via llvm-commits)<br>
9. [PATCH] D81031: [OpenMP] Add Additional Function Attribute<br>
Information to OMPKinds.def<br>
(Joseph Huber via Phabricator via llvm-commits)<br>
10. [PATCH] D84099: [llvm-reduce] Fix off-by one in argument<br>
reduction pass (Alexander Richardson via Phabricator via llvm-commits)<br>
11. [PATCH] D83311: [CodeMoverUtils] Add optional data dependence<br>
checks using MSSA (rithik sharma via Phabricator via llvm-commits)<br>
12. [PATCH] D60620: [HIP] Support target id by --offload-arch<br>
(Yaxun Liu via Phabricator via llvm-commits)<br>
13. [PATCH] D81585: [AIX][XCOFF][Patch1] Provide decoding trace<br>
back table information API for xcoff object file for llvm-objdump<br>
-d (Hubert Tong via Phabricator via llvm-commits)<br>
14. [PATCH] D84099: [llvm-reduce] Fix off-by one in argument<br>
reduction pass (Roman Lebedev via Phabricator via llvm-commits)<br>
15. [PATCH] D84100: [ARM] Optimize immediate selection<br>
(Ben Shi via Phabricator via llvm-commits)<br>
<br>
<br>
----------------------------------------------------------------------<br>
<br>
Message: 1<br>
Date: Sat, 18 Jul 2020 11:32:28 +0000 (UTC)<br>
From: Igor Kudrin via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: ikudrin@accesssoftek.com, dblaikie@gmail.com, echristo@gmail.com,<br>
jh7370@my.bristol.ac.uk, aprantl@apple.com<br>
Cc: sontuan.vu119@gmail.com, nikola.tesic@syrmia.com,<br>
chris.jackson@sony.com, llvm-commits@lists.llvm.org,<br>
mateja.marjanovic@syrmia.com, stephen.tozer@sony.com,<br>
asowda@cisco.com, 88888yl@gmail.com, sourabhsingh.tomar@amd.com,<br>
grimar@accesssoftek.com, higuoxing@gmail.com,<br>
AlokKumar.Sharma@amd.com, djordje.todorovic@syrmia.com,<br>
john.reagan@vmssoftware.com<br>
Subject: [PATCH] D84092: [DebugInfo] Make DIELocList::SizeOf() more<br>
explicit. NFCI.<br>
Message-ID:<br>
<differential-rev-PHID-DREV-b6plz7q443peyilznwgm-req@reviews.llvm.org><br>
Content-Type: text/plain; charset="utf-8"<br>
<br>
ikudrin created this revision.<br>
ikudrin added reviewers: dblaikie, echristo, jhenderson, aprantl.<br>
ikudrin added projects: LLVM, debug-info.<br>
Herald added a subscriber: hiraditya.<br>
<br>
`DIELocList` is used with a limited number of DWARF forms, see the only place where it is instantiated, `DwarfCompileUnit::addLocationList()`.<br>
<br>
The patch marks the unexpected execution path in `DIELocList::SizeOf()` as unreachable, to reduce ambiguity.<br>
<br>
<br>
Repository:<br>
rG LLVM Github Monorepo<br>
<br>
<a href="https://reviews.llvm.org/D84092">https://reviews.llvm.org/D84092</a><br>
<br>
Files:<br>
llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
<br>
<br>
Index: llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
===================================================================<br>
--- llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
+++ llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
@@ -809,13 +809,17 @@<br>
//===----------------------------------------------------------------------===//<br>
<br>
unsigned DIELocList::SizeOf(const AsmPrinter *AP, dwarf::Form Form) const {<br>
- if (Form == dwarf::DW_FORM_loclistx)<br>
+ switch (Form) {<br>
+ case dwarf::DW_FORM_loclistx:<br>
return getULEB128Size(Index);<br>
- if (Form == dwarf::DW_FORM_data4)<br>
+ case dwarf::DW_FORM_data4:<br>
return 4;<br>
- if (Form == dwarf::DW_FORM_sec_offset)<br>
+ case dwarf::DW_FORM_sec_offset:<br>
+ // FIXME: add support for DWARF64<br>
return 4;<br>
- return AP->MAI->getCodePointerSize();<br>
+ default:<br>
+ llvm_unreachable("DIE Value form not supported yet");<br>
+ }<br>
}<br>
<br>
/// EmitValue - Emit label value.<br>
<br>
<br>
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<br>
Message: 2<br>
Date: Sat, 18 Jul 2020 11:34:14 +0000 (UTC)<br>
From: Igor Kudrin via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: ikudrin@accesssoftek.com, dblaikie@gmail.com,<br>
jh7370@my.bristol.ac.uk<br>
Cc: sontuan.vu119@gmail.com, nikola.tesic@syrmia.com,<br>
chris.jackson@sony.com, llvm-commits@lists.llvm.org,<br>
mateja.marjanovic@syrmia.com, stephen.tozer@sony.com,<br>
asowda@cisco.com, 88888yl@gmail.com, sourabhsingh.tomar@amd.com,<br>
grimar@accesssoftek.com, higuoxing@gmail.com,<br>
AlokKumar.Sharma@amd.com, djordje.todorovic@syrmia.com,<br>
john.reagan@vmssoftware.com<br>
Subject: [PATCH] D84093: [DebugInfo] Fix a comment and a variable<br>
name. NFC.<br>
Message-ID:<br>
<differential-rev-PHID-DREV-f2rjrdcuuvxcy6osy7xa-req@reviews.llvm.org><br>
Content-Type: text/plain; charset="utf-8"<br>
<br>
ikudrin created this revision.<br>
ikudrin added reviewers: dblaikie, jhenderson.<br>
ikudrin added projects: LLVM, debug-info.<br>
Herald added a subscriber: hiraditya.<br>
<br>
`DebugLocListIndex` keeps the index of an entry list, not the offset.<br>
<br>
<br>
<br>
<br>
Repository:<br>
rG LLVM Github Monorepo<br>
<br>
<a href="https://reviews.llvm.org/D84093">https://reviews.llvm.org/D84093</a><br>
<br>
Files:<br>
llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp<br>
llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h<br>
<br>
<br>
Index: llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h<br>
===================================================================<br>
--- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h<br>
+++ llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h<br>
@@ -114,7 +114,7 @@<br>
///<br>
/// Variables that have been optimized out use none of these fields.<br>
class DbgVariable : public DbgEntity {<br>
- /// Offset in DebugLocs.<br>
+ /// Index of the entry list in DebugLocs.<br>
unsigned DebugLocListIndex = ~0u;<br>
/// DW_OP_LLVM_tag_offset value from DebugLocs.<br>
Optional<uint8_t> DebugLocListTagOffset;<br>
Index: llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp<br>
===================================================================<br>
--- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp<br>
+++ llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp<br>
@@ -690,9 +690,9 @@<br>
<br>
// Add variable address.<br>
<br>
- unsigned Offset = DV.getDebugLocListIndex();<br>
- if (Offset != ~0U) {<br>
- addLocationList(*VariableDie, dwarf::DW_AT_location, Offset);<br>
+ unsigned Index = DV.getDebugLocListIndex();<br>
+ if (Index != ~0U) {<br>
+ addLocationList(*VariableDie, dwarf::DW_AT_location, Index);<br>
auto TagOffset = DV.getDebugLocListTagOffset();<br>
if (TagOffset)<br>
addUInt(*VariableDie, dwarf::DW_AT_LLVM_tag_offset, dwarf::DW_FORM_data1,<br>
<br>
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<br>
Message: 3<br>
Date: Sat, 18 Jul 2020 11:39:21 +0000 (UTC)<br>
From: Igor Kudrin via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: ikudrin@accesssoftek.com, dblaikie@gmail.com, echristo@gmail.com,<br>
jh7370@my.bristol.ac.uk, aprantl@apple.com, wvo@google.com,<br>
ydelendik@mozilla.com<br>
Cc: sontuan.vu119@gmail.com, nikola.tesic@syrmia.com,<br>
chris.jackson@sony.com, llvm-commits@lists.llvm.org,<br>
mateja.marjanovic@syrmia.com, stephen.tozer@sony.com,<br>
sourabhsingh.tomar@amd.com, 88888yl@gmail.com,<br>
grimar@accesssoftek.com, higuoxing@gmail.com, asowda@cisco.com,<br>
AlokKumar.Sharma@amd.com, djordje.todorovic@syrmia.com,<br>
john.reagan@vmssoftware.com<br>
Subject: [PATCH] D84094: [DebugInfo] Fix misleading using of DWARF<br>
forms with DIELabel. NFCI.<br>
Message-ID:<br>
<differential-rev-PHID-DREV-2kjek5oavbbau5bpbbab-req@reviews.llvm.org><br>
Content-Type: text/plain; charset="utf-8"<br>
<br>
ikudrin created this revision.<br>
ikudrin added reviewers: dblaikie, echristo, jhenderson, aprantl, aardappel, yurydelendik.<br>
ikudrin added projects: LLVM, debug-info.<br>
Herald added subscribers: aheejin, hiraditya.<br>
<br>
`DIELabel` can emit only 32- or 64-bit values, while it was created in some places with `DW_FORM_udata`, which implies emitting uleb128. Nevertheless, these places also expected to emit U32 or U64, but just used a misleading DWARF form. The patch updates those
places to use more appropriate DWARF forms and restricts `DIELabel::SizeOf()` to accept only forms that are actually used in the LLVM codebase.<br>
<br>
<br>
Repository:<br>
rG LLVM Github Monorepo<br>
<br>
<a href="https://reviews.llvm.org/D84094">https://reviews.llvm.org/D84094</a><br>
<br>
Files:<br>
llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp<br>
llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp<br>
<br>
<br>
Index: llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp<br>
===================================================================<br>
--- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp<br>
+++ llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp<br>
@@ -353,7 +353,7 @@<br>
}<br>
<br>
addUInt(Die, dwarf::DW_FORM_data1, dwarf::DW_OP_addr);<br>
- addLabel(Die, dwarf::DW_FORM_udata, Sym);<br>
+ addLabel(Die, dwarf::DW_FORM_addr, Sym);<br>
}<br>
<br>
void DwarfUnit::addLabelDelta(DIE &Die, dwarf::Attribute Attribute,<br>
Index: llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp<br>
===================================================================<br>
--- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp<br>
+++ llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp<br>
@@ -451,8 +451,8 @@<br>
true});<br>
DIELoc *Loc = new (DIEValueAllocator) DIELoc;<br>
addUInt(*Loc, dwarf::DW_FORM_data1, dwarf::DW_OP_WASM_location);<br>
- addSInt(*Loc, dwarf::DW_FORM_sdata, FrameBase.Location.WasmLoc.Kind);<br>
- addLabel(*Loc, dwarf::DW_FORM_udata, SPSym);<br>
+ addSInt(*Loc, dwarf::DW_FORM_sdata, TI_GLOBAL_RELOC);<br>
+ addLabel(*Loc, dwarf::DW_FORM_data4, SPSym);<br>
DD->addArangeLabel(SymbolCU(this, SPSym));<br>
addUInt(*Loc, dwarf::DW_FORM_data1, dwarf::DW_OP_stack_value);<br>
addBlock(*SPDie, dwarf::DW_AT_frame_base, Loc);<br>
Index: llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
===================================================================<br>
--- llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
+++ llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
@@ -495,19 +495,25 @@<br>
/// EmitValue - Emit label value.<br>
///<br>
void DIELabel::emitValue(const AsmPrinter *AP, dwarf::Form Form) const {<br>
- AP->emitLabelReference(<br>
- Label, SizeOf(AP, Form),<br>
- Form == dwarf::DW_FORM_strp || Form == dwarf::DW_FORM_sec_offset ||<br>
- Form == dwarf::DW_FORM_ref_addr || Form == dwarf::DW_FORM_data4);<br>
+ bool IsSectionRelative = Form != dwarf::DW_FORM_addr;<br>
+ AP->emitLabelReference(Label, SizeOf(AP, Form), IsSectionRelative);<br>
}<br>
<br>
/// SizeOf - Determine size of label value in bytes.<br>
///<br>
unsigned DIELabel::SizeOf(const AsmPrinter *AP, dwarf::Form Form) const {<br>
- if (Form == dwarf::DW_FORM_data4) return 4;<br>
- if (Form == dwarf::DW_FORM_sec_offset) return 4;<br>
- if (Form == dwarf::DW_FORM_strp) return 4;<br>
- return AP->MAI->getCodePointerSize();<br>
+ switch (Form) {<br>
+ case dwarf::DW_FORM_data4:<br>
+ return 4;<br>
+ case dwarf::DW_FORM_sec_offset:<br>
+ case dwarf::DW_FORM_strp:<br>
+ // FIXME: add support for DWARF64<br>
+ return 4;<br>
+ case dwarf::DW_FORM_addr:<br>
+ return AP->MAI->getCodePointerSize();<br>
+ default:<br>
+ llvm_unreachable("DIE Value form not supported yet");<br>
+ }<br>
}<br>
<br>
LLVM_DUMP_METHOD<br>
<br>
<br>
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<br>
------------------------------<br>
<br>
Message: 4<br>
Date: Sat, 18 Jul 2020 11:43:19 +0000 (UTC)<br>
From: Igor Kudrin via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: ikudrin@accesssoftek.com, dblaikie@gmail.com,<br>
jh7370@my.bristol.ac.uk, echristo@gmail.com, aprantl@apple.com<br>
Cc: sontuan.vu119@gmail.com, nikola.tesic@syrmia.com,<br>
chris.jackson@sony.com, llvm-commits@lists.llvm.org,<br>
mateja.marjanovic@syrmia.com, stephen.tozer@sony.com,<br>
asowda@cisco.com, 88888yl@gmail.com, sourabhsingh.tomar@amd.com,<br>
grimar@accesssoftek.com, higuoxing@gmail.com,<br>
AlokKumar.Sharma@amd.com, djordje.todorovic@syrmia.com,<br>
john.reagan@vmssoftware.com<br>
Subject: [PATCH] D84095: [DebugInfo] Make DIEDelta::SizeOf() more<br>
explicit. NFCI.<br>
Message-ID:<br>
<differential-rev-PHID-DREV-vnyjehk2qdan6m7tndyz-req@reviews.llvm.org><br>
Content-Type: text/plain; charset="utf-8"<br>
<br>
ikudrin created this revision.<br>
ikudrin added reviewers: dblaikie, jhenderson, echristo, aprantl.<br>
ikudrin added projects: LLVM, debug-info.<br>
Herald added a subscriber: hiraditya.<br>
<br>
The patch restricts `DIEDelta::SizeOf()` to accept only DWARF forms that are actually used in the LLVM codebase. This should make the use of the class more explicit and help to avoid issues similar to fixed in D83958 <<a href="https://reviews.llvm.org/D83958">https://reviews.llvm.org/D83958</a>>
and D84094 <<a href="https://reviews.llvm.org/D84094">https://reviews.llvm.org/D84094</a>>.<br>
<br>
<br>
Repository:<br>
rG LLVM Github Monorepo<br>
<br>
<a href="https://reviews.llvm.org/D84095">https://reviews.llvm.org/D84095</a><br>
<br>
Files:<br>
llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
<br>
<br>
Index: llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
===================================================================<br>
--- llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
+++ llvm/lib/CodeGen/AsmPrinter/DIE.cpp<br>
@@ -549,10 +549,15 @@<br>
/// SizeOf - Determine size of delta value in bytes.<br>
///<br>
unsigned DIEDelta::SizeOf(const AsmPrinter *AP, dwarf::Form Form) const {<br>
- if (Form == dwarf::DW_FORM_data4) return 4;<br>
- if (Form == dwarf::DW_FORM_sec_offset) return 4;<br>
- if (Form == dwarf::DW_FORM_strp) return 4;<br>
- return AP->MAI->getCodePointerSize();<br>
+ switch (Form) {<br>
+ case dwarf::DW_FORM_data4:<br>
+ return 4;<br>
+ case dwarf::DW_FORM_sec_offset:<br>
+ // FIXME: add support for DWARF64<br>
+ return 4;<br>
+ default:<br>
+ llvm_unreachable("DIE Value form not supported yet");<br>
+ }<br>
}<br>
<br>
LLVM_DUMP_METHOD<br>
<br>
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<br>
Message: 5<br>
Date: Sat, 18 Jul 2020 13:35:57 +0000 (UTC)<br>
From: Matt Arsenault via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: jdoerfert@anl.gov, florian_hahn@apple.com, lebedev.ri@gmail.com,<br>
spatel@rotateright.com, nicholas@mxc.ca<br>
Cc: siddu.druid@gmail.com, 88888yl@gmail.com,<br>
llvm-commits@lists.llvm.org, jun.l@samsung.com, wei.ding2@amd.com<br>
Subject: [PATCH] D84085: [SROA][Mem2Reg] Do not crash on alloca +<br>
addrspacecast<br>
Message-ID: <b8cb71d613ffe9f8164cb0c742cda467@localhost.localdomain><br>
Content-Type: text/plain; charset=us-ascii<br>
<br>
arsenm added inline comments.<br>
<br>
<br>
================<br>
Comment at: llvm/test/Transforms/SROA/alloca_addrspace.ll:20<br>
+}<br>
+<br>
+declare void @llvm.lifetime.start.p0i8(i64 %size, i8* nocapture %ptr)<br>
----------------<br>
Also could use a negative case <br>
<br>
<br>
Repository:<br>
rG LLVM Github Monorepo<br>
<br>
CHANGES SINCE LAST ACTION<br>
<a href="https://reviews.llvm.org/D84085/new/">https://reviews.llvm.org/D84085/new/</a><br>
<br>
<a href="https://reviews.llvm.org/D84085">https://reviews.llvm.org/D84085</a><br>
<br>
<br>
<br>
<br>
<br>
------------------------------<br>
<br>
Message: 6<br>
Date: Sat, 18 Jul 2020 13:36:24 +0000 (UTC)<br>
From: Matt Arsenault via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: jdoerfert@anl.gov, florian_hahn@apple.com, lebedev.ri@gmail.com,<br>
spatel@rotateright.com, nicholas@mxc.ca<br>
Cc: siddu.druid@gmail.com, 88888yl@gmail.com,<br>
llvm-commits@lists.llvm.org, jun.l@samsung.com, wei.ding2@amd.com<br>
Subject: [PATCH] D84085: [SROA][Mem2Reg] Do not crash on alloca +<br>
addrspacecast<br>
Message-ID: <90eb224c1482010aa3cb38c714f766c5@localhost.localdomain><br>
Content-Type: text/plain; charset=us-ascii<br>
<br>
arsenm added inline comments.<br>
<br>
<br>
================<br>
Comment at: llvm/test/Transforms/SROA/alloca_addrspace.ll:2-3<br>
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
+; RUN: opt < %s -sroa -S | FileCheck %s<br>
+; RUN: opt < %s -passes=sroa -S | FileCheck %s<br>
+; RUN: opt < %s -mem2reg -S | FileCheck %s<br>
----------------<br>
This is also covered by SROA tests, should this go in test/Mem2Reg<br>
<br>
<br>
Repository:<br>
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<br>
<br>
<br>
<br>
<br>
------------------------------<br>
<br>
Message: 7<br>
Date: Sat, 18 Jul 2020 13:37:33 +0000 (UTC)<br>
From: Yaxun Liu via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: yaxun.liu@amd.com, scott.linder@amd.com,<br>
konstantin.zhuravlyov@amd.com, jdoerfert@anl.gov<br>
Cc: 88888yl@gmail.com, llvm-commits@lists.llvm.org<br>
Subject: [PATCH] D80750: llvm-link: Add module flag behavior<br>
MergeTargetID<br>
Message-ID: <4bc3b4d98f4be19a85eed541628eedfe@localhost.localdomain><br>
Content-Type: text/plain; charset="utf-8"<br>
<br>
yaxunl updated this revision to Diff 278995.<br>
yaxunl marked 12 inline comments as done.<br>
yaxunl retitled this revision from "llvm-link: Add module flag behavior MergeTargetId" to "llvm-link: Add module flag behavior MergeTargetID".<br>
yaxunl edited the summary of this revision.<br>
yaxunl added a comment.<br>
Herald added a reviewer: jdoerfert.<br>
<br>
revised by Scott's comments.<br>
<br>
<br>
CHANGES SINCE LAST ACTION<br>
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<br>
Files:<br>
llvm/docs/LangRef.rst<br>
llvm/include/llvm/IR/Module.h<br>
llvm/lib/IR/Verifier.cpp<br>
llvm/lib/Linker/IRMover.cpp<br>
llvm/test/Linker/Inputs/module-flags-target-id-src-default.ll<br>
llvm/test/Linker/Inputs/module-flags-target-id-src-diff-cpu.ll<br>
llvm/test/Linker/Inputs/module-flags-target-id-src-diff-triple.ll<br>
llvm/test/Linker/Inputs/module-flags-target-id-src-empty.ll<br>
llvm/test/Linker/Inputs/module-flags-target-id-src-invalid.ll<br>
llvm/test/Linker/Inputs/module-flags-target-id-src-none.ll<br>
llvm/test/Linker/Inputs/module-flags-target-id-src-sram-ecc-off-xnack-on.ll<br>
llvm/test/Linker/Inputs/module-flags-target-id-src-xnack-off.ll<br>
llvm/test/Linker/module-flags-target-id-dst-default.ll<br>
llvm/test/Linker/module-flags-target-id-dst-empty.ll<br>
llvm/test/Linker/module-flags-target-id-dst-none.ll<br>
llvm/test/Linker/module-flags-target-id-dst-sram-ecc-off-xnack-on.ll<br>
llvm/test/Verifier/module-flags-target-id-invalid-key.ll<br>
llvm/test/Verifier/module-flags-target-id-invalid-value.ll<br>
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Message: 8<br>
Date: Sat, 18 Jul 2020 13:43:08 +0000 (UTC)<br>
From: Dmitry Preobrazhensky via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: dpreobrazhensky@luxoft.com, Matthew.Arsenault@amd.com,<br>
stanislav.mekhanoshin@amd.com<br>
Cc: yaxun.liu@amd.com, wei.ding2@amd.com, sebastian.neubauer@amd.com,<br>
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konstantin.zhuravlyov@amd.com, tpr.ll@botech.co.uk, Tony.Tye@amd.com,<br>
kannan.narayanan@amd.com<br>
Subject: [PATCH] D84098: [AMDGPU][MC] Corrected decoding of 16-bit<br>
literals<br>
Message-ID:<br>
<differential-rev-PHID-DREV-4yafcgtmjug4pmjzzulz-req@reviews.llvm.org><br>
Content-Type: text/plain; charset="utf-8"<br>
<br>
dp created this revision.<br>
dp added reviewers: arsenm, rampitec.<br>
Herald added subscribers: llvm-commits, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.<br>
Herald added a project: LLVM.<br>
<br>
16-bit literals are encoded as 32-bit values. If high 16-bits of the value is 0xFFFF, the decoded instruction cannot be reassembled.<br>
For example, the following code<br>
<br>
0xff,0x04,0x04,0x52,0xcd,0xab,0xff,0xff<br>
<br>
is currently decoded as<br>
<br>
v_mul_lo_u16_e32 v2, 0xffffabcd, v2<br>
<br>
However this literal is actually a 64-bit constant 0x00000000ffffabcd which violates requirements described in the documentation <<a href="https://llvm.org/docs/AMDGPUOperandSyntax.html#conversion-of-integer-values">https://llvm.org/docs/AMDGPUOperandSyntax.html#conversion-of-integer-values</a>>
- the truncation is not safe.<br>
<br>
This change corrects decoding to make reassembly possible.<br>
<br>
Codegen should probably be corrected as well to zero-extend 16 bit values.<br>
<br>
<br>
<a href="https://reviews.llvm.org/D84098">https://reviews.llvm.org/D84098</a><br>
<br>
Files:<br>
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp<br>
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h<br>
llvm/test/CodeGen/AMDGPU/add.i16.ll<br>
llvm/test/CodeGen/AMDGPU/add.v2i16.ll<br>
llvm/test/CodeGen/AMDGPU/imm16.ll<br>
llvm/test/CodeGen/AMDGPU/sub.i16.ll<br>
llvm/test/CodeGen/AMDGPU/sub.v2i16.ll<br>
llvm/test/MC/Disassembler/AMDGPU/literal16_vi.txt<br>
llvm/test/MC/Disassembler/AMDGPU/vop3-literal.txt<br>
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Message: 9<br>
Date: Sat, 18 Jul 2020 13:59:42 +0000 (UTC)<br>
From: Joseph Huber via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: jhuber6@vols.utk.edu, jdoerfert@anl.gov<br>
Cc: yaxun.liu@amd.com, lildmh@gmail.com, blitzrakete@gmail.com,<br>
aaron.ballman@gmail.com, llvm-commits@lists.llvm.org,<br>
Saiyedul.Islam@amd.com, cfe-commits@lists.llvm.org,<br>
shenhan@google.com, sara.royuela@bsc.es, 88888yl@gmail.com,<br>
sourabhsingh.tomar@amd.com, deepak.eachempati@hpe.com, lin32@llnl.gov,<br>
leonardchan@google.com, greg63706@gmail.com, stefomeister@gmail.com,<br>
mlekena@skidmore.edu, zhang.guansong@gmail.com,<br>
ravi.narayanaswamy@intel.com, ron.lieberman@amd.com,<br>
a.bataev@hotmail.com, xw111luoye@gmail.com, liao6@llnl.gov<br>
Subject: [PATCH] D81031: [OpenMP] Add Additional Function Attribute<br>
Information to OMPKinds.def<br>
Message-ID: <93330b8386adb041a2bf4e7e160ad97a@localhost.localdomain><br>
Content-Type: text/plain; charset=us-ascii<br>
<br>
jhuber6 added a comment.<br>
<br>
In D81031#2159943 <<a href="https://reviews.llvm.org/D81031#2159943">https://reviews.llvm.org/D81031#2159943</a>>, @jdoerfert wrote:<br>
<br>
> In D81031#2159895 <<a href="https://reviews.llvm.org/D81031#2159895">https://reviews.llvm.org/D81031#2159895</a>>, @jhuber6 wrote:<br>
><br>
> > Fixing errors caused by unused attribute sets. Adding missing attributes to barrier_codegen.cpp.<br>
> ><br>
> > Should I go ahead and commit this considering the previous was temporarily reverted? Or should I just wait a bit to see if it fails testing again.<br>
><br>
><br>
> If you only did minor modifications and no major problem showed up, the previous LGTM still stands. You should (always) run a full make check-all locally (or better on a server) to verify no other issues are known.<br>
><br>
> FWIW, it happens that we break bots and patches get reverted. That is not great but also not too bad.<br>
<br>
<br>
I did run a check-all but apparently the last build I did didn't build clang for some reason so it wasn't included in the tests. I ran cmake again with the same options and it seemed to build clang this time so I don't know what that was about.<br>
<br>
After that I ran the tests again and I passed everything except these four. I reverted my commit and pulled from master and still failed the same test so I'm assuming it's a problem with my CUDA installation rather than the patch.<br>
<br>
libomp :: env/kmp_set_dispatch_buf.c<br>
libomp :: worksharing/for/kmp_set_dispatch_buf.c<br>
libomptarget :: mapping/declare_mapper_target_update.cpp<br>
libomptarget :: offloading/target_depend_nowait.cpp<br>
<br>
<br>
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------------------------------<br>
<br>
Message: 10<br>
Date: Sat, 18 Jul 2020 14:08:35 +0000 (UTC)<br>
From: Alexander Richardson via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: arichardson.kde@gmail.com, dblaikie@gmail.com<br>
Cc: 88888yl@gmail.com, llvm-commits@lists.llvm.org<br>
Subject: [PATCH] D84099: [llvm-reduce] Fix off-by one in argument<br>
reduction pass<br>
Message-ID:<br>
<differential-rev-PHID-DREV-6lpv62grobenn66evgtx-req@reviews.llvm.org><br>
Content-Type: text/plain; charset="utf-8"<br>
<br>
arichardson created this revision.<br>
arichardson added a reviewer: dblaikie.<br>
Herald added a project: LLVM.<br>
Herald added a subscriber: llvm-commits.<br>
<br>
The function extractArgumentsFromModule() was passing a one-based index to,<br>
but replaceFunctionCalls() was expecting a zero-based argument index. This<br>
resulted in assertion errors when reducing function call arguments with<br>
different types.<br>
<br>
<br>
Repository:<br>
rG LLVM Github Monorepo<br>
<br>
<a href="https://reviews.llvm.org/D84099">https://reviews.llvm.org/D84099</a><br>
<br>
Files:<br>
llvm/test/Reduce/remove-args-2.ll<br>
llvm/tools/llvm-reduce/deltas/ReduceArguments.cpp<br>
<br>
<br>
Index: llvm/tools/llvm-reduce/deltas/ReduceArguments.cpp<br>
===================================================================<br>
--- llvm/tools/llvm-reduce/deltas/ReduceArguments.cpp<br>
+++ llvm/tools/llvm-reduce/deltas/ReduceArguments.cpp<br>
@@ -84,7 +84,7 @@<br>
int ArgI = 0;<br>
for (auto &Arg : F->args())<br>
if (ArgsToKeep.count(&Arg))<br>
- ArgIndexesToKeep.insert(++ArgI);<br>
+ ArgIndexesToKeep.insert(ArgI++);<br>
<br>
auto *ClonedFunc = CloneFunction(F, VMap);<br>
// In order to preserve function order, we move Clone after old Function<br>
Index: llvm/test/Reduce/remove-args-2.ll<br>
===================================================================<br>
--- /dev/null<br>
+++ llvm/test/Reduce/remove-args-2.ll<br>
@@ -0,0 +1,20 @@<br>
+; Test that llvm-reduce can remove uninteresting function arguments from function definitions as well as their calls.<br>
+; This test checks that functions with different argument types are handled correctly<br>
+;<br>
+; RUN: llvm-reduce --test %python --test-arg %p/Inputs/remove-args.py %s -o %t<br>
+; RUN: cat %t | FileCheck -implicit-check-not=uninteresting %s<br>
+<br>
+%struct.foo = type { %struct.foo*, i32, i32, i8* }<br>
+<br>
+define dso_local void @bar() {<br>
+entry:<br>
+ ; CHECK: call void @interesting(%struct.foo* null)<br>
+ call void @interesting(%struct.foo* null, i8* null)<br>
+ ret void<br>
+}<br>
+<br>
+; CHECK: define internal void @interesting(%struct.foo* %interesting) {<br>
+define internal void @interesting(%struct.foo* %interesting, i8* %uninteresting) {<br>
+entry:<br>
+ ret void<br>
+}<br>
<br>
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Message: 11<br>
Date: Sat, 18 Jul 2020 14:09:21 +0000 (UTC)<br>
From: rithik sharma via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: rithiksh02@gmail.com, whitney.uwaterloo@gmail.com,<br>
bmahjour@ca.ibm.com, etiotto@gmail.com, florian_hahn@apple.com<br>
Cc: 88888yl@gmail.com, llvm-commits@lists.llvm.org, jun.l@samsung.com,<br>
asbirlea@google.com<br>
Subject: [PATCH] D83311: [CodeMoverUtils] Add optional data dependence<br>
checks using MSSA<br>
Message-ID: <a2ca20e2492ccaa324a31ba537c3f10b@localhost.localdomain><br>
Content-Type: text/plain; charset=us-ascii<br>
<br>
RithikSharma marked 6 inline comments as done.<br>
RithikSharma added inline comments.<br>
<br>
<br>
================<br>
Comment at: llvm/lib/Transforms/Utils/CodeMoverUtils.cpp:259<br>
+ // write after read dependency on same memory location<br>
+ if (InstMA == CurInstDefMA || InstLastDefMA == CurInstDefMA)<br>
+ return true;<br>
----------------<br>
bmahjour wrote:<br>
> I don't understand why we need this part: `|| InstLastDefMA == CurInstDefMA`. Wouldn't it suffice to check the reaching def of the use against the instruction being moved (the first part of this condition) ? Do you have a test that would fail if you remove
it?<br>
Yes we have a failure if we remove this, <br>
```<br>
isSafeToMoveBefore(*StoreA2, *LoadA1, DT, &PDT, nullptr, &MSSA)<br>
```<br>
<br>
<br>
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<br>
<br>
<br>
<br>
<br>
------------------------------<br>
<br>
Message: 12<br>
Date: Sat, 18 Jul 2020 14:15:43 +0000 (UTC)<br>
From: Yaxun Liu via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: yaxun.liu@amd.com, tra@google.com, brian.sumner@amd.com,<br>
Aaronenye.Shi@amd.com, siuchi.chan@amd.com, Tony.Tye@amd.com<br>
Cc: zturner@roblox.com, sebastian.neubauer@amd.com, 88888yl@gmail.com,<br>
nhaehnle@gmail.com, Austin.Kerbow@amd.com,<br>
llvm-commits@lists.llvm.org, cfe-commits@lists.llvm.org<br>
Subject: [PATCH] D60620: [HIP] Support target id by --offload-arch<br>
Message-ID: <21e4c0723be02c37db40df259bc366dc@localhost.localdomain><br>
Content-Type: text/plain; charset="utf-8"<br>
<br>
yaxunl updated this revision to Diff 279000.<br>
yaxunl added a comment.<br>
Herald added subscribers: llvm-commits, dang, hiraditya.<br>
Herald added a project: LLVM.<br>
<br>
rebase and added more checks.<br>
<br>
The documentation work is still under development.<br>
<br>
<br>
CHANGES SINCE LAST ACTION<br>
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<br>
<a href="https://reviews.llvm.org/D60620">https://reviews.llvm.org/D60620</a><br>
<br>
Files:<br>
clang/include/clang/Basic/DiagnosticDriverKinds.td<br>
clang/include/clang/Basic/TargetID.h<br>
clang/include/clang/Basic/TargetInfo.h<br>
clang/include/clang/Driver/Compilation.h<br>
clang/include/clang/Driver/Driver.h<br>
clang/include/clang/Driver/Options.td<br>
clang/lib/Basic/CMakeLists.txt<br>
clang/lib/Basic/TargetID.cpp<br>
clang/lib/Basic/Targets/AMDGPU.cpp<br>
clang/lib/Basic/Targets/AMDGPU.h<br>
clang/lib/CodeGen/CodeGenModule.cpp<br>
clang/lib/Driver/Driver.cpp<br>
clang/lib/Driver/ToolChains/AMDGPU.cpp<br>
clang/lib/Driver/ToolChains/AMDGPU.h<br>
clang/lib/Driver/ToolChains/CommonArgs.cpp<br>
clang/lib/Driver/ToolChains/HIP.cpp<br>
clang/test/CodeGenCUDA/target-id.hip<br>
clang/test/CodeGenOpenCL/target-id.cl<br>
clang/test/Driver/Inputs/rocm/amdgcn/bitcode/oclc_isa_version_908.bc<br>
clang/test/Driver/amdgpu-features.c<br>
clang/test/Driver/amdgpu-macros.cl<br>
clang/test/Driver/amdgpu-mcpu.cl<br>
clang/test/Driver/hip-invalid-target-id.hip<br>
clang/test/Driver/hip-target-id.hip<br>
clang/test/Driver/hip-toolchain-features.hip<br>
clang/test/Driver/invalid-target-id.cl<br>
clang/test/Driver/target-id-macros.cl<br>
clang/test/Driver/target-id-macros.hip<br>
clang/test/Driver/target-id.cl<br>
llvm/include/llvm/Support/TargetParser.h<br>
llvm/lib/Support/TargetParser.cpp<br>
<br>
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<br>
Message: 13<br>
Date: Sat, 18 Jul 2020 14:16:51 +0000 (UTC)<br>
From: Hubert Tong via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: digger.llvm@gmail.com, jasonliu.development@gmail.com,<br>
hubert.reinterpretcast@gmail.com, jh7370@my.bristol.ac.uk,<br>
maskray@google.com<br>
Cc: 88888yl@gmail.com, llvm-commits@lists.llvm.org,<br>
p8u8i7l5t1q9r8w3@ibm-systems-z.slack.com<br>
Subject: [PATCH] D81585: [AIX][XCOFF][Patch1] Provide decoding trace<br>
back table information API for xcoff object file for llvm-objdump -d<br>
Message-ID: <55ce9b69e00e240cc83fcd62a84ccbd3@localhost.localdomain><br>
Content-Type: text/plain; charset=us-ascii<br>
<br>
hubert.reinterpretcast added inline comments.<br>
<br>
<br>
================<br>
Comment at: llvm/include/llvm/Object/XCOFFObjectFile.h:403<br>
+ Optional<SmallVector<uint32_t, 8>> ControlledStorageInfoDisp;<br>
+ Optional<uint16_t> FunctionNameLen;<br>
+ Optional<StringRef> FunctionName;<br>
----------------<br>
Why a separate field for the length of the function name? The `StringRef` for the function name has a length field.<br>
<br>
<br>
================<br>
Comment at: llvm/include/llvm/Object/XCOFFObjectFile.h:416<br>
+ /// \param[in] Ptr<br>
+ /// A pointer points to the beginning of XCOFF Traceback Table (right after<br>
+ /// the initial 4 bytes of zeros).<br>
----------------<br>
s/pointer points/pointer that points/;<br>
s/of XCOFF/of an XCOFF/;<br>
<br>
<br>
================<br>
Comment at: llvm/include/llvm/Object/XCOFFObjectFile.h:419<br>
+ /// \param[in, out] Size<br>
+ /// A pointer points to the length of the XCOFF Traceback Table.<br>
+ /// If XCOFF Traceback Table is not parsed successfully or there are extra<br>
----------------<br>
s/pointer points/pointer that points/;<br>
<br>
<br>
================<br>
Comment at: llvm/include/llvm/Object/XCOFFObjectFile.h:422<br>
+ /// bytes that are not recognized, \a Size will be updated to reflect the<br>
+ /// actual length of the XCOFF Traceback Table that get parsed.<br>
+ static Expected<XCOFFTracebackTable> create(const uint8_t *Ptr,<br>
----------------<br>
s/get/got/;<br>
<br>
Is the value of `Size` modified or not when `create` reports an error? If modified, does `Size` represent the last successfully parsed field?<br>
<br>
<br>
================<br>
Comment at: llvm/include/llvm/Object/XCOFFObjectFile.h:434<br>
+ bool hasTOC() const;<br>
+ bool isFloatPointPresent() const;<br>
+ bool isLogAbort() const;<br>
----------------<br>
Note: More instances of "FloatPoint" here.<br>
<br>
<br>
================<br>
Comment at: llvm/include/llvm/Object/XCOFFObjectFile.h:435<br>
+ bool isFloatPointPresent() const;<br>
+ bool isLogAbort() const;<br>
+<br>
----------------<br>
The function names have fallen out of sync with the mask naming.<br>
<br>
<br>
================<br>
Comment at: llvm/include/llvm/Object/XCOFFObjectFile.h:440<br>
+ bool isAllocaUsed() const;<br>
+ uint8_t getClDisInv() const;<br>
+ bool isCRSaved() const;<br>
----------------<br>
This name is very different from the name we are using for the associated mask. Please go through the names and resync.<br>
<br>
<br>
================<br>
Comment at: llvm/include/llvm/Object/XCOFFObjectFile.h:451<br>
+<br>
+ uint8_t getNumberOfFixedPara() const;<br>
+<br>
----------------<br>
Same comments here as for the mask names.<br>
<br>
<br>
Repository:<br>
rG LLVM Github Monorepo<br>
<br>
CHANGES SINCE LAST ACTION<br>
<a href="https://reviews.llvm.org/D81585/new/">https://reviews.llvm.org/D81585/new/</a><br>
<br>
<a href="https://reviews.llvm.org/D81585">https://reviews.llvm.org/D81585</a><br>
<br>
<br>
<br>
<br>
<br>
------------------------------<br>
<br>
Message: 14<br>
Date: Sat, 18 Jul 2020 14:20:01 +0000 (UTC)<br>
From: Roman Lebedev via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: arichardson.kde@gmail.com, dblaikie@gmail.com<br>
Cc: 88888yl@gmail.com, llvm-commits@lists.llvm.org<br>
Subject: [PATCH] D84099: [llvm-reduce] Fix off-by one in argument<br>
reduction pass<br>
Message-ID: <847bdda9f52bc19dbe864ff3c29f8bd3@localhost.localdomain><br>
Content-Type: text/plain; charset=us-ascii<br>
<br>
lebedev.ri added inline comments.<br>
<br>
<br>
================<br>
Comment at: llvm/tools/llvm-reduce/deltas/ReduceArguments.cpp:84-87<br>
int ArgI = 0;<br>
for (auto &Arg : F->args())<br>
if (ArgsToKeep.count(&Arg))<br>
+ ArgIndexesToKeep.insert(ArgI++);<br>
----------------<br>
Let's take this one step further, shall we?<br>
```<br>
std::set<int> ArgIndexesToKeep;<br>
for (auto &Arg : enumerate(F->args()))<br>
if (ArgsToKeep.count(&Arg.value()))<br>
ArgIndexesToKeep.insert(Arg.index());<br>
```<br>
<br>
<br>
Repository:<br>
rG LLVM Github Monorepo<br>
<br>
CHANGES SINCE LAST ACTION<br>
<a href="https://reviews.llvm.org/D84099/new/">https://reviews.llvm.org/D84099/new/</a><br>
<br>
<a href="https://reviews.llvm.org/D84099">https://reviews.llvm.org/D84099</a><br>
<br>
<br>
<br>
<br>
<br>
------------------------------<br>
<br>
Message: 15<br>
Date: Sat, 18 Jul 2020 14:24:48 +0000 (UTC)<br>
From: Ben Shi via Phabricator via llvm-commits<br>
<llvm-commits@lists.llvm.org><br>
To: powerman1st@163.com, t.p.northover@gmail.com,<br>
greened@obbligato.org, anhtuyen@ca.ibm.com, efriedma@quicinc.com,<br>
david.green@arm.com, sam.parker@arm.com<br>
Cc: 88888yl@gmail.com, llvm-commits@lists.llvm.org, kanheim@a-bix.com,<br>
kristof.beyls@arm.com, daniel.kiss@arm.com<br>
Subject: [PATCH] D84100: [ARM] Optimize immediate selection<br>
Message-ID:<br>
<differential-rev-PHID-DREV-e747qjpy467kd7rwrccd-req@reviews.llvm.org><br>
Content-Type: text/plain; charset="utf-8"<br>
<br>
benshi001 created this revision.<br>
benshi001 added reviewers: t.p.northover, greened, anhtuyen, efriedma, dmgreen, samparker.<br>
Herald added subscribers: llvm-commits, danielkiss, hiraditya, kristof.beyls.<br>
Herald added a project: LLVM.<br>
<br>
Optimize some specific immediate selection to movi+subri<br>
or addri+subri against loading from the constant pool.<br>
<br>
<br>
Repository:<br>
rG LLVM Github Monorepo<br>
<br>
<a href="https://reviews.llvm.org/D84100">https://reviews.llvm.org/D84100</a><br>
<br>
Files:<br>
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp<br>
llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp<br>
llvm/lib/Target/ARM/ARMInstrInfo.td<br>
llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h<br>
llvm/test/CodeGen/ARM/sadd_sat.ll<br>
llvm/test/CodeGen/ARM/ssub_sat.ll<br>
<br>
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