<div dir="ltr"><div class="gmail_default" style="font-family:times new roman,serif">We found some performance regression in one of our benchmark. I get a reproducible in <a href="https://bugs.llvm.org/show_bug.cgi?id=45263" style="font-family:Arial,Helvetica,sans-serif">https://bugs.llvm.org/show_bug.cgi?id=45263</a>. Please take a look. Thanks!</div><div class="gmail_default" style="font-family:times new roman,serif"><br></div><div class="gmail_default" style="font-family:times new roman,serif">Wei.</div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, Mar 10, 2020 at 8:47 AM Simon Pilgrim via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><br>
Author: Simon Pilgrim<br>
Date: 2020-03-10T15:42:36Z<br>
New Revision: e6a7e3b5e3e779a3bfb617c8d9ed4302edab2cef<br>
<br>
URL: <a href="https://github.com/llvm/llvm-project/commit/e6a7e3b5e3e779a3bfb617c8d9ed4302edab2cef" rel="noreferrer" target="_blank">https://github.com/llvm/llvm-project/commit/e6a7e3b5e3e779a3bfb617c8d9ed4302edab2cef</a><br>
DIFF: <a href="https://github.com/llvm/llvm-project/commit/e6a7e3b5e3e779a3bfb617c8d9ed4302edab2cef.diff" rel="noreferrer" target="_blank">https://github.com/llvm/llvm-project/commit/e6a7e3b5e3e779a3bfb617c8d9ed4302edab2cef.diff</a><br>
<br>
LOG: [X86][SSE] matchShuffleWithSHUFPD - add support for unary shuffles.<br>
<br>
This causes one minor test change but is mainly necessary for an upcoming patch.<br>
<br>
Added: <br>
<br>
<br>
Modified: <br>
    llvm/lib/Target/X86/X86ISelLowering.cpp<br>
    llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll<br>
<br>
Removed: <br>
<br>
<br>
<br>
################################################################################<br>
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp<br>
index e4533e0d37d0..8297935d7ebf 100644<br>
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp<br>
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp<br>
@@ -15942,6 +15942,7 @@ static bool matchShuffleWithSHUFPD(MVT VT, SDValue &V1, SDValue &V2,<br>
   // Mask for V8F64: 0/1,  8/9,  2/3,  10/11, 4/5, ..<br>
   // Mask for V4F64; 0/1,  4/5,  2/3,  6/7..<br>
   ShuffleImm = 0;<br>
+  bool UnaryMask = isUndefOrZeroOrInRange(Mask, 0, NumElts);<br>
   bool ShufpdMask = true;<br>
   bool CommutableMask = true;<br>
   for (int i = 0; i < NumElts; ++i) {<br>
@@ -15949,7 +15950,7 @@ static bool matchShuffleWithSHUFPD(MVT VT, SDValue &V1, SDValue &V2,<br>
       continue;<br>
     if (Mask[i] < 0)<br>
       return false;<br>
-    int Val = (i & 6) + NumElts * (i & 1);<br>
+    int Val = (i & 6) + (UnaryMask ? 0 : (NumElts * (i & 1)));<br>
     int CommutVal = (i & 0xe) + NumElts * ((i & 1) ^ 1);<br>
     if (Mask[i] < Val || Mask[i] > Val + 1)<br>
       ShufpdMask = false;<br>
@@ -15961,7 +15962,9 @@ static bool matchShuffleWithSHUFPD(MVT VT, SDValue &V1, SDValue &V2,<br>
   if (!ShufpdMask && !CommutableMask)<br>
     return false;<br>
<br>
-  if (!ShufpdMask && CommutableMask)<br>
+  if (UnaryMask)<br>
+    V2 = V1;<br>
+  else if (!ShufpdMask && CommutableMask)<br>
     std::swap(V1, V2);<br>
<br>
   ForceV1Zero = ZeroLane[0];<br>
<br>
diff  --git a/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll<br>
index 85400656e2e5..5f9dbdf888a3 100644<br>
--- a/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll<br>
+++ b/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll<br>
@@ -2791,7 +2791,7 @@ define void @test_mm_storeh_pi(x86_mmx *%a0, <4 x float> %a1) nounwind {<br>
 ;<br>
 ; X64-SSE2-LABEL: test_mm_storeh_pi:<br>
 ; X64-SSE2:       # %bb.0:<br>
-; X64-SSE2-NEXT:    pshufd $78, %xmm0, %xmm0 # encoding: [0x66,0x0f,0x70,0xc0,0x4e]<br>
+; X64-SSE2-NEXT:    shufps $78, %xmm0, %xmm0 # encoding: [0x0f,0xc6,0xc0,0x4e]<br>
 ; X64-SSE2-NEXT:    # xmm0 = xmm0[2,3,0,1]<br>
 ; X64-SSE2-NEXT:    movq %xmm0, %rax # encoding: [0x66,0x48,0x0f,0x7e,0xc0]<br>
 ; X64-SSE2-NEXT:    movq %rax, (%rdi) # encoding: [0x48,0x89,0x07]<br>
<br>
<br>
<br>
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</blockquote></div>