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<p>I had been planning to remove all three flags in favor of a
generic way to specify the maximum number of prefix bytes. We
need this for prefix padding as well, and while I can work
backwards from nop flags, simply encoding the maximum prefix
length which doesn't have to worry about decoder stalls seems more
straight forward.</p>
<p>Philip<br>
</p>
<p>On 3/12/20 4:24 PM, Craig Topper via llvm-commits wrote:<br>
</p>
<blockquote type="cite"
cite="mid:CAF7ks-Nyemrnj+RDCaAAyO7LzBUx=-L5mCnfv=j_+FQmZksNzA@mail.gmail.com">
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<div dir="ltr">I feel like the name Fast7ByteNOP is slightly
misleading since the default without it is 10 bytes. Maybe they
should all just be name something like MaxNopLength7,
MaxNopLength11, MaxNopLength11? I do think the Fast7ByteNOP
should be applied to KNL. I'm still a little unclear why the
limit is 7 instead of 8. The 2 cited issues are more than 3
prefix/escape bytes or more than 8 bytes are limited to decoder
0. The 8 byte NOP sequence has no prefixes and a single escape
byte.
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<div dir="ltr" class="gmail_signature"
data-smartmail="gmail_signature">~Craig</div>
</div>
<br>
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<div class="gmail_quote">
<div dir="ltr" class="gmail_attr">On Thu, Mar 12, 2020 at 6:09
AM Simon Pilgrim via llvm-commits <<a
href="mailto:llvm-commits@lists.llvm.org"
moz-do-not-send="true">llvm-commits@lists.llvm.org</a>>
wrote:<br>
</div>
<blockquote class="gmail_quote" style="margin:0px 0px 0px
0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><br>
Author: Simon Pilgrim<br>
Date: 2020-03-12T13:06:43Z<br>
New Revision: 1e686d268980c7167f12c71e8b1bb66bdc3fd51c<br>
<br>
URL: <a
href="https://github.com/llvm/llvm-project/commit/1e686d268980c7167f12c71e8b1bb66bdc3fd51c"
rel="noreferrer" target="_blank" moz-do-not-send="true">https://github.com/llvm/llvm-project/commit/1e686d268980c7167f12c71e8b1bb66bdc3fd51c</a><br>
DIFF: <a
href="https://github.com/llvm/llvm-project/commit/1e686d268980c7167f12c71e8b1bb66bdc3fd51c.diff"
rel="noreferrer" target="_blank" moz-do-not-send="true">https://github.com/llvm/llvm-project/commit/1e686d268980c7167f12c71e8b1bb66bdc3fd51c.diff</a><br>
<br>
LOG: [X86] Add FeatureFast7ByteNOP flag<br>
<br>
Lets us remove another SLM proc family flag usage.<br>
<br>
This is NFC, but we should probably check whether
atom/glm/knl? should be using this flag as well...<br>
<br>
Added: <br>
<br>
<br>
Modified: <br>
llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp<br>
llvm/lib/Target/X86/X86.td<br>
llvm/lib/Target/X86/X86Subtarget.h<br>
<br>
Removed: <br>
<br>
<br>
<br>
################################################################################<br>
diff --git
a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp<br>
index 2f84d23d6db5..0498f3f2473a 100644<br>
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp<br>
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp<br>
@@ -924,7 +924,7 @@ bool
X86AsmBackend::writeNopData(raw_ostream &OS, uint64_t
Count) const {<br>
// 15-bytes is the longest single NOP instruction, but
10-bytes is<br>
// commonly the longest that can be efficiently decoded.<br>
uint64_t MaxNopLength = 10;<br>
- if (STI.getFeatureBits()[X86::ProcIntelSLM])<br>
+ if (STI.getFeatureBits()[X86::FeatureFast7ByteNOP])<br>
MaxNopLength = 7;<br>
else if (STI.getFeatureBits()[X86::FeatureFast15ByteNOP])<br>
MaxNopLength = 15;<br>
<br>
diff --git a/llvm/lib/Target/X86/X86.td
b/llvm/lib/Target/X86/X86.td<br>
index a2b11d55f650..931367ce4de5 100644<br>
--- a/llvm/lib/Target/X86/X86.td<br>
+++ b/llvm/lib/Target/X86/X86.td<br>
@@ -329,6 +329,11 @@ def FeatureFastLZCNT<br>
: SubtargetFeature<<br>
"fast-lzcnt", "HasFastLZCNT", "true",<br>
"LZCNT instructions are as fast as most simple
integer ops">;<br>
+// If the target can efficiently decode NOPs upto 7-bytes in
length.<br>
+def FeatureFast7ByteNOP<br>
+ : SubtargetFeature<<br>
+ "fast-7bytenop", "HasFast7ByteNOP", "true",<br>
+ "Target can quickly decode up to 7 byte NOPs">;<br>
// If the target can efficiently decode NOPs upto 11-bytes in
length.<br>
def FeatureFast11ByteNOP<br>
: SubtargetFeature<<br>
@@ -728,6 +733,7 @@ def ProcessorFeatures {<br>
list<SubtargetFeature> SLMSpecificFeatures =
[ProcIntelSLM,<br>
FeatureSlowDivide64,<br>
FeatureSlowPMULLD,<br>
+
FeatureFast7ByteNOP,<br>
FeaturePOPCNTFalseDeps];<br>
list<SubtargetFeature> SLMInheritableFeatures =<br>
!listconcat(AtomInheritableFeatures,
SLMAdditionalFeatures);<br>
<br>
diff --git a/llvm/lib/Target/X86/X86Subtarget.h
b/llvm/lib/Target/X86/X86Subtarget.h<br>
index f4e8d30328ca..93801455254c 100644<br>
--- a/llvm/lib/Target/X86/X86Subtarget.h<br>
+++ b/llvm/lib/Target/X86/X86Subtarget.h<br>
@@ -257,6 +257,10 @@ class X86Subtarget final : public
X86GenSubtargetInfo {<br>
/// ymm or zmm registers.<br>
bool InsertVZEROUPPER = false;<br>
<br>
+ /// True if there is no performance penalty for writing
NOPs with up to<br>
+ /// 7 bytes.<br>
+ bool HasFast7ByteNOP = false;<br>
+<br>
/// True if there is no performance penalty for writing
NOPs with up to<br>
/// 11 bytes.<br>
bool HasFast11ByteNOP = false;<br>
<br>
<br>
<br>
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