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Thanks Hans, I'll look into it today.</div>
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<p style="margin-top: 0px; margin-bottom: 0px;font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">Sam Parker</span></p>
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<p style="margin-top: 0px; margin-bottom: 0px;font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">Compilation Tools Engineer | Arm</span></p>
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<p style="margin-top: 0px; margin-bottom: 0px;font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">. . . . . . . . . . . . . . . . . . . . . . . . . . .</span></p>
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<p style="margin-top: 0px; margin-bottom: 0px;font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">Arm.com</span></p>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Hans Wennborg <hans@chromium.org><br>
<b>Sent:</b> 09 December 2019 10:10<br>
<b>To:</b> Sam Parker <Sam.Parker@arm.com>; Sam Parker <llvmlistbot@llvm.org><br>
<b>Cc:</b> llvm-commits <llvm-commits@lists.llvm.org><br>
<b>Subject:</b> Re: [llvm] 393daca - [ARM] Enable TypePromotion by default</font>
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<div class="PlainText">We also hit another assert,<br>
APInt.h:1623: uint64_t llvm::APInt::getZExtValue() const: Assertion<br>
`getActiveBits() <= 64 && "Too many bits for uint64_t"' failed.<br>
from the same pass.<br>
<br>
I've attached an IR reproducer here:<br>
<a href="https://bugs.chromium.org/p/chromium/issues/detail?id=1031979#c2">https://bugs.chromium.org/p/chromium/issues/detail?id=1031979#c2</a><br>
<br>
On Mon, Dec 9, 2019 at 9:46 AM Hans Wennborg <hans@chromium.org> wrote:<br>
><br>
> This caused the Chromium build to fail with an "Too many bits for<br>
> uint64_t" assertion. There's a reproducer at<br>
> <a href="https://crbug.com/1031978#c2">https://crbug.com/1031978#c2</a> and I'll follow up with a creduced<br>
> version soon.<br>
><br>
> I've reverted this in a38396939c5 in the meantime.<br>
><br>
> On Thu, Dec 5, 2019 at 3:23 PM Sam Parker via llvm-commits<br>
> <llvm-commits@lists.llvm.org> wrote:<br>
> ><br>
> ><br>
> > Author: Sam Parker<br>
> > Date: 2019-12-05T14:21:11Z<br>
> > New Revision: 393dacacf7e7ff4a123adcda3efc60e92121ecc6<br>
> ><br>
> > URL: <a href="https://github.com/llvm/llvm-project/commit/393dacacf7e7ff4a123adcda3efc60e92121ecc6">
https://github.com/llvm/llvm-project/commit/393dacacf7e7ff4a123adcda3efc60e92121ecc6</a><br>
> > DIFF: <a href="https://github.com/llvm/llvm-project/commit/393dacacf7e7ff4a123adcda3efc60e92121ecc6.diff">
https://github.com/llvm/llvm-project/commit/393dacacf7e7ff4a123adcda3efc60e92121ecc6.diff</a><br>
> ><br>
> > LOG: [ARM] Enable TypePromotion by default<br>
> ><br>
> > ARMCodeGenPrepare has already been generalized and renamed to<br>
> > TypePromotion. We've had it enabled and tested downstream for a<br>
> > while, so enable it by default.<br>
> ><br>
> > Differential Revision: <a href="https://reviews.llvm.org/D70998">https://reviews.llvm.org/D70998</a><br>
> ><br>
> > Added:<br>
> ><br>
> ><br>
> > Modified:<br>
> > llvm/lib/CodeGen/TypePromotion.cpp<br>
> > llvm/test/Transforms/TypePromotion/ARM/calls.ll<br>
> > llvm/test/Transforms/TypePromotion/ARM/casts.ll<br>
> > llvm/test/Transforms/TypePromotion/ARM/clear-structures.ll<br>
> > llvm/test/Transforms/TypePromotion/ARM/icmps.ll<br>
> > llvm/test/Transforms/TypePromotion/ARM/phis-ret.ll<br>
> > llvm/test/Transforms/TypePromotion/ARM/pointers.ll<br>
> > llvm/test/Transforms/TypePromotion/ARM/signed-icmps.ll<br>
> > llvm/test/Transforms/TypePromotion/ARM/signed.ll<br>
> > llvm/test/Transforms/TypePromotion/ARM/switch.ll<br>
> > llvm/test/Transforms/TypePromotion/ARM/wrapping.ll<br>
> ><br>
> > Removed:<br>
> ><br>
> ><br>
> ><br>
> > ################################################################################<br>
> > diff --git a/llvm/lib/CodeGen/TypePromotion.cpp b/llvm/lib/CodeGen/TypePromotion.cpp<br>
> > index 94fe7d2c7030..596ad0c4ec2a 100644<br>
> > --- a/llvm/lib/CodeGen/TypePromotion.cpp<br>
> > +++ b/llvm/lib/CodeGen/TypePromotion.cpp<br>
> > @@ -45,7 +45,7 @@<br>
> > using namespace llvm;<br>
> ><br>
> > static cl::opt<bool><br>
> > -DisablePromotion("disable-type-promotion", cl::Hidden, cl::init(true),<br>
> > +DisablePromotion("disable-type-promotion", cl::Hidden, cl::init(false),<br>
> > cl::desc("Disable type promotion pass"));<br>
> ><br>
> > // The goal of this pass is to enable more efficient code generation for<br>
> > @@ -899,16 +899,34 @@ bool TypePromotion::TryToPromote(Value *V, unsigned PromotedWidth) {<br>
> > for (auto *I : CurrentVisited)<br>
> > I->dump();<br>
> > );<br>
> > +<br>
> > + // Check that promoting this at the IR level is most likely beneficial. It's<br>
> > + // more likely if we're operating over multiple blocks and handling wrapping<br>
> > + // instructions.<br>
> > unsigned ToPromote = 0;<br>
> > + unsigned NonFreeArgs = 0;<br>
> > + SmallPtrSet<BasicBlock*, 4> Blocks;<br>
> > for (auto *V : CurrentVisited) {<br>
> > - if (Sources.count(V))<br>
> > + if (auto *I = dyn_cast<Instruction>(V))<br>
> > + Blocks.insert(I->getParent());<br>
> > +<br>
> > + if (Sources.count(V)) {<br>
> > + if (auto *Arg = dyn_cast<Argument>(V)) {<br>
> > + if (!Arg->hasZExtAttr() && !Arg->hasSExtAttr())<br>
> > + ++NonFreeArgs;<br>
> > + }<br>
> > continue;<br>
> > + }<br>
> > +<br>
> > if (Sinks.count(cast<Instruction>(V)))<br>
> > continue;<br>
> > +<br>
> > ++ToPromote;<br>
> > }<br>
> ><br>
> > - if (ToPromote < 2)<br>
> > + // DAG optimisations should be able to handle these cases better, especially<br>
> > + // for function arguments.<br>
> > + if (ToPromote < 2 || (Blocks.size() == 1 && (NonFreeArgs > SafeWrap.size())))<br>
> > return false;<br>
> ><br>
> > Promoter->Mutate(OrigTy, PromotedWidth, CurrentVisited, Sources, Sinks,<br>
> ><br>
> > diff --git a/llvm/test/Transforms/TypePromotion/ARM/calls.ll b/llvm/test/Transforms/TypePromotion/ARM/calls.ll<br>
> > index cd273c06150f..8c14a3a076f1 100644<br>
> > --- a/llvm/test/Transforms/TypePromotion/ARM/calls.ll<br>
> > +++ b/llvm/test/Transforms/TypePromotion/ARM/calls.ll<br>
> > @@ -1,5 +1,5 @@<br>
> > ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
> > -; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s<br>
> > +; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s<br>
> ><br>
> > define i8 @call_with_imms(i8* %arg) {<br>
> > ; CHECK-LABEL: @call_with_imms(<br>
> ><br>
> > diff --git a/llvm/test/Transforms/TypePromotion/ARM/casts.ll b/llvm/test/Transforms/TypePromotion/ARM/casts.ll<br>
> > index 70fa617115e8..66c713ce3058 100644<br>
> > --- a/llvm/test/Transforms/TypePromotion/ARM/casts.ll<br>
> > +++ b/llvm/test/Transforms/TypePromotion/ARM/casts.ll<br>
> > @@ -1,5 +1,5 @@<br>
> > ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
> > -; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s<br>
> > +; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s<br>
> ><br>
> > define i16 @dsp_trunc(i32 %arg0, i32 %arg1, i16* %gep0, i16* %gep1) {<br>
> > ; CHECK-LABEL: @dsp_trunc(<br>
> ><br>
> > diff --git a/llvm/test/Transforms/TypePromotion/ARM/clear-structures.ll b/llvm/test/Transforms/TypePromotion/ARM/clear-structures.ll<br>
> > index 117c4c0d5c8a..aae729fcc92c 100644<br>
> > --- a/llvm/test/Transforms/TypePromotion/ARM/clear-structures.ll<br>
> > +++ b/llvm/test/Transforms/TypePromotion/ARM/clear-structures.ll<br>
> > @@ -1,5 +1,5 @@<br>
> > ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
> > -; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s<br>
> > +; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s<br>
> ><br>
> > define i32 @clear_structures(i8* nocapture readonly %fmt, [1 x i32] %ap.coerce, i8* %out, void (i32, i8*)* nocapture %write) {<br>
> > ; CHECK-LABEL: @clear_structures(<br>
> ><br>
> > diff --git a/llvm/test/Transforms/TypePromotion/ARM/icmps.ll b/llvm/test/Transforms/TypePromotion/ARM/icmps.ll<br>
> > index 6dda15c309b4..8d33c345c640 100644<br>
> > --- a/llvm/test/Transforms/TypePromotion/ARM/icmps.ll<br>
> > +++ b/llvm/test/Transforms/TypePromotion/ARM/icmps.ll<br>
> > @@ -1,5 +1,5 @@<br>
> > ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
> > -; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s<br>
> > +; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s<br>
> ><br>
> > define i32 @test_ult_254_inc_imm(i8 zeroext %x) {<br>
> > ; CHECK-LABEL: @test_ult_254_inc_imm(<br>
> ><br>
> > diff --git a/llvm/test/Transforms/TypePromotion/ARM/phis-ret.ll b/llvm/test/Transforms/TypePromotion/ARM/phis-ret.ll<br>
> > index e79e4ff1bdb2..12001a40aa08 100644<br>
> > --- a/llvm/test/Transforms/TypePromotion/ARM/phis-ret.ll<br>
> > +++ b/llvm/test/Transforms/TypePromotion/ARM/phis-ret.ll<br>
> > @@ -1,5 +1,5 @@<br>
> > ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
> > -; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s<br>
> > +; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s<br>
> ><br>
> > ; Check that the arguments are extended but then nothing else is.<br>
> > ; This also ensures that the pass can handle loops.<br>
> ><br>
> > diff --git a/llvm/test/Transforms/TypePromotion/ARM/pointers.ll b/llvm/test/Transforms/TypePromotion/ARM/pointers.ll<br>
> > index 3c5f097b1b92..7369b18bbd64 100644<br>
> > --- a/llvm/test/Transforms/TypePromotion/ARM/pointers.ll<br>
> > +++ b/llvm/test/Transforms/TypePromotion/ARM/pointers.ll<br>
> > @@ -1,5 +1,5 @@<br>
> > ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
> > -; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s<br>
> > +; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s<br>
> ><br>
> > define void @phi_pointers(i16* %a, i16* %b, i8 zeroext %M, i8 zeroext %N) {<br>
> > ; CHECK-LABEL: @phi_pointers(<br>
> ><br>
> > diff --git a/llvm/test/Transforms/TypePromotion/ARM/signed-icmps.ll b/llvm/test/Transforms/TypePromotion/ARM/signed-icmps.ll<br>
> > index dfdd4c10ae87..3655ff0e7e63 100644<br>
> > --- a/llvm/test/Transforms/TypePromotion/ARM/signed-icmps.ll<br>
> > +++ b/llvm/test/Transforms/TypePromotion/ARM/signed-icmps.ll<br>
> > @@ -1,5 +1,5 @@<br>
> > ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
> > -; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s<br>
> > +; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s<br>
> ><br>
> > define i8 @eq_sgt(i8* %x, i8 *%y, i8 zeroext %z) {<br>
> > ; CHECK-LABEL: @eq_sgt(<br>
> ><br>
> > diff --git a/llvm/test/Transforms/TypePromotion/ARM/signed.ll b/llvm/test/Transforms/TypePromotion/ARM/signed.ll<br>
> > index 143220a53b5c..e2fabb93fbd5 100644<br>
> > --- a/llvm/test/Transforms/TypePromotion/ARM/signed.ll<br>
> > +++ b/llvm/test/Transforms/TypePromotion/ARM/signed.ll<br>
> > @@ -1,5 +1,5 @@<br>
> > ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
> > -; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s<br>
> > +; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s<br>
> ><br>
> > ; Test to check that ARMCodeGenPrepare doesn't optimised away sign extends.<br>
> > define i16 @test_signed_load(i16* %ptr) {<br>
> ><br>
> > diff --git a/llvm/test/Transforms/TypePromotion/ARM/switch.ll b/llvm/test/Transforms/TypePromotion/ARM/switch.ll<br>
> > index 6736ebeea4c4..058101f34951 100644<br>
> > --- a/llvm/test/Transforms/TypePromotion/ARM/switch.ll<br>
> > +++ b/llvm/test/Transforms/TypePromotion/ARM/switch.ll<br>
> > @@ -1,5 +1,5 @@<br>
> > ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
> > -; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s<br>
> > +; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s<br>
> ><br>
> > define void @truncate_source_phi_switch(i8* %memblock, i8* %store, i16 %arg) {<br>
> > ; CHECK-LABEL: @truncate_source_phi_switch(<br>
> ><br>
> > diff --git a/llvm/test/Transforms/TypePromotion/ARM/wrapping.ll b/llvm/test/Transforms/TypePromotion/ARM/wrapping.ll<br>
> > index 23e50dec0ca1..346114aac3cd 100644<br>
> > --- a/llvm/test/Transforms/TypePromotion/ARM/wrapping.ll<br>
> > +++ b/llvm/test/Transforms/TypePromotion/ARM/wrapping.ll<br>
> > @@ -1,5 +1,5 @@<br>
> > ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
> > -; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s<br>
> > +; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s<br>
> ><br>
> > define zeroext i16 @overflow_add(i16 zeroext %a, i16 zeroext %b) {<br>
> > ; CHECK-LABEL: @overflow_add(<br>
> ><br>
> ><br>
> ><br>
> > _______________________________________________<br>
> > llvm-commits mailing list<br>
> > llvm-commits@lists.llvm.org<br>
> > <a href="https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits">https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br>
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