<div dir="ltr">I've reverted this commit, my previous revert of your other commit was in error. This commit is the one that introduced the failing getVTList call.</div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Oct 31, 2019 at 2:59 PM Thomas Lively via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><br>
Author: Thomas Lively<br>
Date: 2019-10-31T14:59:30-07:00<br>
New Revision: 2ab1b8c1ec452fb743f6cc5051e75a01039cabfe<br>
<br>
URL: <a href="https://github.com/llvm/llvm-project/commit/2ab1b8c1ec452fb743f6cc5051e75a01039cabfe" rel="noreferrer" target="_blank">https://github.com/llvm/llvm-project/commit/2ab1b8c1ec452fb743f6cc5051e75a01039cabfe</a><br>
DIFF: <a href="https://github.com/llvm/llvm-project/commit/2ab1b8c1ec452fb743f6cc5051e75a01039cabfe.diff" rel="noreferrer" target="_blank">https://github.com/llvm/llvm-project/commit/2ab1b8c1ec452fb743f6cc5051e75a01039cabfe.diff</a><br>
<br>
LOG: [WebAssembly] Handle multiple loads of splatted loads<br>
<br>
Summary:<br>
Fixes an ISel failure when a splatted load is used more than once. The<br>
failure was due to the hacks we were doing in ISel lowering to<br>
preserve the original load as the operand of a LOAD_SPLAT node. The<br>
fix is to properly lower the splatted use of the load to a separate<br>
LOAD_SPLAT node.<br>
<br>
Reviewers: aheejin<br>
<br>
Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits<br>
<br>
Tags: #llvm<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D69640" rel="noreferrer" target="_blank">https://reviews.llvm.org/D69640</a><br>
<br>
Added: <br>
llvm/test/CodeGen/WebAssembly/simd-load-splat.ll<br>
<br>
Modified: <br>
llvm/lib/Target/WebAssembly/WebAssemblyISD.def<br>
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp<br>
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h<br>
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td<br>
<br>
Removed: <br>
<br>
<br>
<br>
################################################################################<br>
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISD.def b/llvm/lib/Target/WebAssembly/WebAssemblyISD.def<br>
index 13f0476eb4a5..ba04fd4eb9dd 100644<br>
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISD.def<br>
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISD.def<br>
@@ -30,9 +30,9 @@ HANDLE_NODETYPE(SWIZZLE)<br>
HANDLE_NODETYPE(VEC_SHL)<br>
HANDLE_NODETYPE(VEC_SHR_S)<br>
HANDLE_NODETYPE(VEC_SHR_U)<br>
-HANDLE_NODETYPE(LOAD_SPLAT)<br>
HANDLE_NODETYPE(THROW)<br>
HANDLE_NODETYPE(MEMORY_COPY)<br>
HANDLE_NODETYPE(MEMORY_FILL)<br>
<br>
-// add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...<br>
+// Memory intrinsics<br>
+HANDLE_MEM_NODETYPE(LOAD_SPLAT)<br>
<br>
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp<br>
index 2f698711a746..5cb796e389f2 100644<br>
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp<br>
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp<br>
@@ -466,11 +466,14 @@ const char *<br>
WebAssemblyTargetLowering::getTargetNodeName(unsigned Opcode) const {<br>
switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) {<br>
case WebAssemblyISD::FIRST_NUMBER:<br>
+ case WebAssemblyISD::FIRST_MEM_OPCODE:<br>
break;<br>
#define HANDLE_NODETYPE(NODE) \<br>
case WebAssemblyISD::NODE: \<br>
return "WebAssemblyISD::" #NODE;<br>
+#define HANDLE_MEM_NODETYPE(NODE) HANDLE_NODETYPE(NODE)<br>
#include "WebAssemblyISD.def"<br>
+#undef HANDLE_MEM_NODETYPE<br>
#undef HANDLE_NODETYPE<br>
}<br>
return nullptr;<br>
@@ -1432,7 +1435,11 @@ SDValue WebAssemblyTargetLowering::LowerBUILD_VECTOR(SDValue Op,<br>
if (Subtarget->hasUnimplementedSIMD128() &&<br>
(SplattedLoad = dyn_cast<LoadSDNode>(SplatValue)) &&<br>
SplattedLoad->getMemoryVT() == VecT.getVectorElementType()) {<br>
- Result = DAG.getNode(WebAssemblyISD::LOAD_SPLAT, DL, VecT, SplatValue);<br>
+ Result = DAG.getMemIntrinsicNode(<br>
+ WebAssemblyISD::LOAD_SPLAT, DL, DAG.getVTList({VecT}),<br>
+ {SplattedLoad->getChain(), SplattedLoad->getBasePtr(),<br>
+ SplattedLoad->getOffset()},<br>
+ SplattedLoad->getMemoryVT(), SplattedLoad->getMemOperand());<br>
} else {<br>
Result = DAG.getSplatBuildVector(VecT, DL, SplatValue);<br>
}<br>
<br>
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h<br>
index 90936670c471..58e088a0ba50 100644<br>
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h<br>
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h<br>
@@ -24,8 +24,16 @@ namespace WebAssemblyISD {<br>
enum NodeType : unsigned {<br>
FIRST_NUMBER = ISD::BUILTIN_OP_END,<br>
#define HANDLE_NODETYPE(NODE) NODE,<br>
+#define HANDLE_MEM_NODETYPE(NODE)<br>
#include "WebAssemblyISD.def"<br>
+ FIRST_MEM_OPCODE = ISD::FIRST_TARGET_MEMORY_OPCODE,<br>
#undef HANDLE_NODETYPE<br>
+#undef HANDLE_MEM_NODETYPE<br>
+#define HANDLE_NODETYPE(NODE)<br>
+#define HANDLE_MEM_NODETYPE(NODE) NODE,<br>
+#include "WebAssemblyISD.def"<br>
+#undef HANDLE_NODETYPE<br>
+#undef HANDLE_MEM_NODETYPE<br>
};<br>
<br>
} // end namespace WebAssemblyISD<br>
<br>
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td<br>
index fc5d73dac52e..751c565d37fd 100644<br>
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td<br>
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td<br>
@@ -72,35 +72,30 @@ defm "" : SIMDLoadSplat<"v16x8", 195>;<br>
defm "" : SIMDLoadSplat<"v32x4", 196>;<br>
defm "" : SIMDLoadSplat<"v64x2", 197>;<br>
<br>
-def wasm_load_splat_t : SDTypeProfile<1, 1, []>;<br>
-def wasm_load_splat : SDNode<"WebAssemblyISD::LOAD_SPLAT", wasm_load_splat_t>;<br>
-<br>
-foreach args = [["v16i8", "i32", "extloadi8"], ["v8i16", "i32", "extloadi16"],<br>
- ["v4i32", "i32", "load"], ["v2i64", "i64", "load"],<br>
- ["v4f32", "f32", "load"], ["v2f64", "f64", "load"]] in<br>
-def load_splat_#args[0] :<br>
- PatFrag<(ops node:$addr), (wasm_load_splat<br>
- (!cast<ValueType>(args[1]) (!cast<PatFrag>(args[2]) node:$addr)))>;<br>
+def wasm_load_splat_t : SDTypeProfile<1, 1, [SDTCisPtrTy<1>]>;<br>
+def wasm_load_splat : SDNode<"WebAssemblyISD::LOAD_SPLAT", wasm_load_splat_t,<br>
+ [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;<br>
+def load_splat : PatFrag<(ops node:$addr), (wasm_load_splat node:$addr)>;<br>
<br>
let Predicates = [HasUnimplementedSIMD128] in<br>
foreach args = [["v16i8", "v8x16"], ["v8i16", "v16x8"], ["v4i32", "v32x4"],<br>
["v2i64", "v64x2"], ["v4f32", "v32x4"], ["v2f64", "v64x2"]] in {<br>
def : LoadPatNoOffset<!cast<ValueType>(args[0]),<br>
- !cast<PatFrag>("load_splat_"#args[0]),<br>
+ load_splat,<br>
!cast<NI>("LOAD_SPLAT_"#args[1])>;<br>
def : LoadPatImmOff<!cast<ValueType>(args[0]),<br>
- !cast<PatFrag>("load_splat_"#args[0]),<br>
+ load_splat,<br>
regPlusImm,<br>
!cast<NI>("LOAD_SPLAT_"#args[1])>;<br>
def : LoadPatImmOff<!cast<ValueType>(args[0]),<br>
- !cast<PatFrag>("load_splat_"#args[0]),<br>
+ load_splat,<br>
or_is_add,<br>
!cast<NI>("LOAD_SPLAT_"#args[1])>;<br>
def : LoadPatOffsetOnly<!cast<ValueType>(args[0]),<br>
- !cast<PatFrag>("load_splat_"#args[0]),<br>
+ load_splat,<br>
!cast<NI>("LOAD_SPLAT_"#args[1])>;<br>
def : LoadPatGlobalAddrOffOnly<!cast<ValueType>(args[0]),<br>
- !cast<PatFrag>("load_splat_"#args[0]),<br>
+ load_splat,<br>
!cast<NI>("LOAD_SPLAT_"#args[1])>;<br>
}<br>
<br>
<br>
diff --git a/llvm/test/CodeGen/WebAssembly/simd-load-splat.ll b/llvm/test/CodeGen/WebAssembly/simd-load-splat.ll<br>
new file mode 100644<br>
index 000000000000..4e693c285a3f<br>
--- /dev/null<br>
+++ b/llvm/test/CodeGen/WebAssembly/simd-load-splat.ll<br>
@@ -0,0 +1,21 @@<br>
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+unimplemented-simd128 | FileCheck %s<br>
+<br>
+; Regression test for an ISel failure when a splatted load had more<br>
+; than one use. The main tests for load_splat are in simd-offset.ll.<br>
+<br>
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"<br>
+target triple = "wasm32-unknown-unknown"<br>
+<br>
+; CHECK-LABEL: load_splat:<br>
+; CHECK-NEXT: .functype load_splat (i32, i32) -> (i32)<br>
+; CHECK-NEXT: i32.load8_u $[[E:[0-9]+]]=, 0($0){{$}}<br>
+; CHECK-NEXT: v8x16.load_splat $push[[V:[0-9]+]]=, 0($0){{$}}<br>
+; CHECK-NEXT: v128.store 0($1), $pop[[V]]{{$}}<br>
+; CHECK-NEXT: return $[[E]]{{$}}<br>
+define i8 @load_splat(i8* %p, <16 x i8>* %out) {<br>
+ %e = load i8, i8* %p<br>
+ %v1 = insertelement <16 x i8> undef, i8 %e, i32 0<br>
+ %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer<br>
+ store <16 x i8> %v2, <16 x i8>* %out<br>
+ ret i8 %e<br>
+}<br>
<br>
<br>
<br>
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</blockquote></div>