<div dir="ltr"><div dir="ltr"><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, Sep 10, 2019 at 11:16 AM Clement Courbet via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Author: courbet<br>
Date: Tue Sep 10 02:18:00 2019<br>
New Revision: 371502<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=371502&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=371502&view=rev</a><br>
Log:<br>
Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."<br>
<br>
With a fix for sanitizer breakage (see explanation in D60318).<br>
<br>
Added:<br>
llvm/trunk/lib/Transforms/Scalar/ExpandMemCmp.cpp<br>
llvm/trunk/test/Transforms/ExpandMemCmp/AArch64/<br>
llvm/trunk/test/Transforms/ExpandMemCmp/AArch64/memcmp.ll<br>
llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/<br>
llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg<br>
llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll<br>
llvm/trunk/test/Transforms/ExpandMemCmp/X86/pr36421.ll<br>
llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/<br>
llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/lit.local.cfg<br>
llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memCmpUsedInZeroEqualityComparison.ll<br>
llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp-mergeexpand.ll<br>
llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll<br>
llvm/trunk/test/Transforms/PhaseOrdering/X86/<br>
llvm/trunk/test/Transforms/PhaseOrdering/X86/lit.local.cfg<br>
llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp-mergeexpand.ll<br>
llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp.ll<br>
llvm/trunk/test/Transforms/PhaseOrdering/X86/pr36421.ll<br>
Removed:<br>
llvm/trunk/lib/CodeGen/ExpandMemCmp.cpp<br>
llvm/trunk/test/CodeGen/AArch64/bcmp-inline-small.ll<br>
llvm/trunk/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll<br>
llvm/trunk/test/CodeGen/PowerPC/memcmp-mergeexpand.ll<br>
llvm/trunk/test/CodeGen/PowerPC/memcmp.ll<br>
llvm/trunk/test/CodeGen/PowerPC/memcmpIR.ll<br>
llvm/trunk/test/CodeGen/X86/memcmp-mergeexpand.ll<br>
llvm/trunk/test/CodeGen/X86/memcmp-optsize.ll<br>
llvm/trunk/test/CodeGen/X86/memcmp.ll<br>
Modified:<br>
llvm/trunk/include/llvm/CodeGen/Passes.h<br>
llvm/trunk/include/llvm/Transforms/IPO/PassManagerBuilder.h<br>
llvm/trunk/include/llvm/Transforms/Scalar.h<br>
llvm/trunk/lib/CodeGen/CMakeLists.txt<br>
llvm/trunk/lib/CodeGen/CodeGen.cpp<br>
llvm/trunk/lib/CodeGen/TargetPassConfig.cpp<br>
llvm/trunk/lib/Transforms/IPO/PassManagerBuilder.cpp<br>
llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt<br>
llvm/trunk/lib/Transforms/Scalar/MergeICmps.cpp<br>
llvm/trunk/lib/Transforms/Scalar/Scalar.cpp<br>
llvm/trunk/test/CodeGen/AArch64/O3-pipeline.ll<br>
llvm/trunk/test/CodeGen/ARM/O3-pipeline.ll<br>
llvm/trunk/test/CodeGen/Generic/llc-start-stop.ll<br>
llvm/trunk/test/CodeGen/X86/O3-pipeline.ll<br>
llvm/trunk/test/Other/opt-O2-pipeline.ll<br>
llvm/trunk/test/Other/opt-O3-pipeline.ll<br>
llvm/trunk/test/Other/opt-Os-pipeline.ll<br>
llvm/trunk/test/Transforms/ExpandMemCmp/X86/memcmp.ll<br>
llvm/trunk/tools/opt/opt.cpp<br>
llvm/trunk/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn<br>
llvm/trunk/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/Passes.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/Passes.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/Passes.h Tue Sep 10 02:18:00 2019<br>
@@ -439,9 +439,6 @@ namespace llvm {<br>
/// shuffles.<br>
FunctionPass *createExpandReductionsPass();<br>
<br>
- // This pass expands memcmp() to load/stores.<br>
- FunctionPass *createExpandMemCmpPass();<br>
-<br>
/// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp<br>
FunctionPass *createBreakFalseDeps();<br>
<br>
<br>
Modified: llvm/trunk/include/llvm/Transforms/IPO/PassManagerBuilder.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/IPO/PassManagerBuilder.h?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/IPO/PassManagerBuilder.h?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/Transforms/IPO/PassManagerBuilder.h (original)<br>
+++ llvm/trunk/include/llvm/Transforms/IPO/PassManagerBuilder.h Tue Sep 10 02:18:00 2019<br>
@@ -205,6 +205,7 @@ private:<br>
void addPGOInstrPasses(legacy::PassManagerBase &MPM, bool IsCS);<br>
void addFunctionSimplificationPasses(legacy::PassManagerBase &MPM);<br>
void addInstructionCombiningPass(legacy::PassManagerBase &MPM) const;<br>
+ void addMemcmpPasses(legacy::PassManagerBase &MPM) const;<br>
<br>
public:<br>
/// populateFunctionPassManager - This fills in the function pass manager,<br>
<br>
Modified: llvm/trunk/include/llvm/Transforms/Scalar.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Scalar.h?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Scalar.h?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/Transforms/Scalar.h (original)<br>
+++ llvm/trunk/include/llvm/Transforms/Scalar.h Tue Sep 10 02:18:00 2019<br>
@@ -375,6 +375,12 @@ Pass *createMergeICmpsLegacyPass();<br>
<br>
//===----------------------------------------------------------------------===//<br>
//<br>
+// ExpandMemCmp - This pass expands memcmp() to load/stores.<br>
+//<br>
+Pass *createExpandMemCmpPass();<br>
+<br>
+//===----------------------------------------------------------------------===//<br>
+//<br>
// ValuePropagation - Propagate CFG-derived value information<br>
//<br>
Pass *createCorrelatedValuePropagationPass();<br>
<br>
Modified: llvm/trunk/lib/CodeGen/CMakeLists.txt<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CMakeLists.txt?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CMakeLists.txt?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/CMakeLists.txt (original)<br>
+++ llvm/trunk/lib/CodeGen/CMakeLists.txt Tue Sep 10 02:18:00 2019<br>
@@ -21,7 +21,6 @@ add_llvm_library(LLVMCodeGen<br>
EarlyIfConversion.cpp<br>
EdgeBundles.cpp<br>
ExecutionDomainFix.cpp<br>
- ExpandMemCmp.cpp<br>
ExpandPostRAPseudos.cpp<br>
ExpandReductions.cpp<br>
FaultMaps.cpp<br>
<br>
Modified: llvm/trunk/lib/CodeGen/CodeGen.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CodeGen.cpp?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CodeGen.cpp?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/CodeGen.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/CodeGen.cpp Tue Sep 10 02:18:00 2019<br>
@@ -31,7 +31,6 @@ void llvm::initializeCodeGen(PassRegistr<br>
initializeEarlyIfPredicatorPass(Registry);<br>
initializeEarlyMachineLICMPass(Registry);<br>
initializeEarlyTailDuplicatePass(Registry);<br>
- initializeExpandMemCmpPassPass(Registry);<br>
initializeExpandPostRAPass(Registry);<br>
initializeFEntryInserterPass(Registry);<br>
initializeFinalizeISelPass(Registry);<br>
<br>
Removed: llvm/trunk/lib/CodeGen/ExpandMemCmp.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandMemCmp.cpp?rev=371501&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandMemCmp.cpp?rev=371501&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/ExpandMemCmp.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/ExpandMemCmp.cpp (removed)<br>
@@ -1,871 +0,0 @@<br>
-//===--- ExpandMemCmp.cpp - Expand memcmp() to load/stores ----------------===//<br>
-//<br>
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.<br>
-// See <a href="https://llvm.org/LICENSE.txt" rel="noreferrer" target="_blank">https://llvm.org/LICENSE.txt</a> for license information.<br>
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception<br>
-//<br>
-//===----------------------------------------------------------------------===//<br>
-//<br>
-// This pass tries to expand memcmp() calls into optimally-sized loads and<br>
-// compares for the target.<br>
-//<br>
-//===----------------------------------------------------------------------===//<br>
-<br>
-#include "llvm/ADT/Statistic.h"<br>
-#include "llvm/Analysis/ConstantFolding.h"<br>
-#include "llvm/Analysis/TargetLibraryInfo.h"<br>
-#include "llvm/Analysis/TargetTransformInfo.h"<br>
-#include "llvm/Analysis/ValueTracking.h"<br>
-#include "llvm/CodeGen/TargetLowering.h"<br>
-#include "llvm/CodeGen/TargetPassConfig.h"<br>
-#include "llvm/CodeGen/TargetSubtargetInfo.h"<br>
-#include "llvm/IR/IRBuilder.h"<br>
-<br>
-using namespace llvm;<br>
-<br>
-#define DEBUG_TYPE "expandmemcmp"<br>
-<br>
-STATISTIC(NumMemCmpCalls, "Number of memcmp calls");<br>
-STATISTIC(NumMemCmpNotConstant, "Number of memcmp calls without constant size");<br>
-STATISTIC(NumMemCmpGreaterThanMax,<br>
- "Number of memcmp calls with size greater than max size");<br>
-STATISTIC(NumMemCmpInlined, "Number of inlined memcmp calls");<br>
-<br>
-static cl::opt<unsigned> MemCmpEqZeroNumLoadsPerBlock(<br>
- "memcmp-num-loads-per-block", cl::Hidden, cl::init(1),<br>
- cl::desc("The number of loads per basic block for inline expansion of "<br>
- "memcmp that is only being compared against zero."));<br>
-<br>
-static cl::opt<unsigned> MaxLoadsPerMemcmp(<br>
- "max-loads-per-memcmp", cl::Hidden,<br>
- cl::desc("Set maximum number of loads used in expanded memcmp"));<br>
-<br>
-static cl::opt<unsigned> MaxLoadsPerMemcmpOptSize(<br>
- "max-loads-per-memcmp-opt-size", cl::Hidden,<br>
- cl::desc("Set maximum number of loads used in expanded memcmp for -Os/Oz"));<br>
-<br>
-namespace {<br>
-<br>
-<br>
-// This class provides helper functions to expand a memcmp library call into an<br>
-// inline expansion.<br>
-class MemCmpExpansion {<br>
- struct ResultBlock {<br>
- BasicBlock *BB = nullptr;<br>
- PHINode *PhiSrc1 = nullptr;<br>
- PHINode *PhiSrc2 = nullptr;<br>
-<br>
- ResultBlock() = default;<br>
- };<br>
-<br>
- CallInst *const CI;<br>
- ResultBlock ResBlock;<br>
- const uint64_t Size;<br>
- unsigned MaxLoadSize;<br>
- uint64_t NumLoadsNonOneByte;<br>
- const uint64_t NumLoadsPerBlockForZeroCmp;<br>
- std::vector<BasicBlock *> LoadCmpBlocks;<br>
- BasicBlock *EndBlock;<br>
- PHINode *PhiRes;<br>
- const bool IsUsedForZeroCmp;<br>
- const DataLayout &DL;<br>
- IRBuilder<> Builder;<br>
- // Represents the decomposition in blocks of the expansion. For example,<br>
- // comparing 33 bytes on X86+sse can be done with 2x16-byte loads and<br>
- // 1x1-byte load, which would be represented as [{16, 0}, {16, 16}, {32, 1}.<br>
- struct LoadEntry {<br>
- LoadEntry(unsigned LoadSize, uint64_t Offset)<br>
- : LoadSize(LoadSize), Offset(Offset) {<br>
- }<br>
-<br>
- // The size of the load for this block, in bytes.<br>
- unsigned LoadSize;<br>
- // The offset of this load from the base pointer, in bytes.<br>
- uint64_t Offset;<br>
- };<br>
- using LoadEntryVector = SmallVector<LoadEntry, 8>;<br>
- LoadEntryVector LoadSequence;<br>
-<br>
- void createLoadCmpBlocks();<br>
- void createResultBlock();<br>
- void setupResultBlockPHINodes();<br>
- void setupEndBlockPHINodes();<br>
- Value *getCompareLoadPairs(unsigned BlockIndex, unsigned &LoadIndex);<br>
- void emitLoadCompareBlock(unsigned BlockIndex);<br>
- void emitLoadCompareBlockMultipleLoads(unsigned BlockIndex,<br>
- unsigned &LoadIndex);<br>
- void emitLoadCompareByteBlock(unsigned BlockIndex, unsigned OffsetBytes);<br>
- void emitMemCmpResultBlock();<br>
- Value *getMemCmpExpansionZeroCase();<br>
- Value *getMemCmpEqZeroOneBlock();<br>
- Value *getMemCmpOneBlock();<br>
- Value *getPtrToElementAtOffset(Value *Source, Type *LoadSizeType,<br>
- uint64_t OffsetBytes);<br>
-<br>
- static LoadEntryVector<br>
- computeGreedyLoadSequence(uint64_t Size, llvm::ArrayRef<unsigned> LoadSizes,<br>
- unsigned MaxNumLoads, unsigned &NumLoadsNonOneByte);<br>
- static LoadEntryVector<br>
- computeOverlappingLoadSequence(uint64_t Size, unsigned MaxLoadSize,<br>
- unsigned MaxNumLoads,<br>
- unsigned &NumLoadsNonOneByte);<br>
-<br>
-public:<br>
- MemCmpExpansion(CallInst *CI, uint64_t Size,<br>
- const TargetTransformInfo::MemCmpExpansionOptions &Options,<br>
- const bool IsUsedForZeroCmp, const DataLayout &TheDataLayout);<br>
-<br>
- unsigned getNumBlocks();<br>
- uint64_t getNumLoads() const { return LoadSequence.size(); }<br>
-<br>
- Value *getMemCmpExpansion();<br>
-};<br>
-<br>
-MemCmpExpansion::LoadEntryVector MemCmpExpansion::computeGreedyLoadSequence(<br>
- uint64_t Size, llvm::ArrayRef<unsigned> LoadSizes,<br>
- const unsigned MaxNumLoads, unsigned &NumLoadsNonOneByte) {<br>
- NumLoadsNonOneByte = 0;<br>
- LoadEntryVector LoadSequence;<br>
- uint64_t Offset = 0;<br>
- while (Size && !LoadSizes.empty()) {<br>
- const unsigned LoadSize = LoadSizes.front();<br>
- const uint64_t NumLoadsForThisSize = Size / LoadSize;<br>
- if (LoadSequence.size() + NumLoadsForThisSize > MaxNumLoads) {<br>
- // Do not expand if the total number of loads is larger than what the<br>
- // target allows. Note that it's important that we exit before completing<br>
- // the expansion to avoid using a ton of memory to store the expansion for<br>
- // large sizes.<br>
- return {};<br>
- }<br>
- if (NumLoadsForThisSize > 0) {<br>
- for (uint64_t I = 0; I < NumLoadsForThisSize; ++I) {<br>
- LoadSequence.push_back({LoadSize, Offset});<br>
- Offset += LoadSize;<br>
- }<br>
- if (LoadSize > 1)<br>
- ++NumLoadsNonOneByte;<br>
- Size = Size % LoadSize;<br>
- }<br>
- LoadSizes = LoadSizes.drop_front();<br>
- }<br>
- return LoadSequence;<br>
-}<br>
-<br>
-MemCmpExpansion::LoadEntryVector<br>
-MemCmpExpansion::computeOverlappingLoadSequence(uint64_t Size,<br>
- const unsigned MaxLoadSize,<br>
- const unsigned MaxNumLoads,<br>
- unsigned &NumLoadsNonOneByte) {<br>
- // These are already handled by the greedy approach.<br>
- if (Size < 2 || MaxLoadSize < 2)<br>
- return {};<br>
-<br>
- // We try to do as many non-overlapping loads as possible starting from the<br>
- // beginning.<br>
- const uint64_t NumNonOverlappingLoads = Size / MaxLoadSize;<br>
- assert(NumNonOverlappingLoads && "there must be at least one load");<br>
- // There remain 0 to (MaxLoadSize - 1) bytes to load, this will be done with<br>
- // an overlapping load.<br>
- Size = Size - NumNonOverlappingLoads * MaxLoadSize;<br>
- // Bail if we do not need an overloapping store, this is already handled by<br>
- // the greedy approach.<br>
- if (Size == 0)<br>
- return {};<br>
- // Bail if the number of loads (non-overlapping + potential overlapping one)<br>
- // is larger than the max allowed.<br>
- if ((NumNonOverlappingLoads + 1) > MaxNumLoads)<br>
- return {};<br>
-<br>
- // Add non-overlapping loads.<br>
- LoadEntryVector LoadSequence;<br>
- uint64_t Offset = 0;<br>
- for (uint64_t I = 0; I < NumNonOverlappingLoads; ++I) {<br>
- LoadSequence.push_back({MaxLoadSize, Offset});<br>
- Offset += MaxLoadSize;<br>
- }<br>
-<br>
- // Add the last overlapping load.<br>
- assert(Size > 0 && Size < MaxLoadSize && "broken invariant");<br>
- LoadSequence.push_back({MaxLoadSize, Offset - (MaxLoadSize - Size)});<br>
- NumLoadsNonOneByte = 1;<br>
- return LoadSequence;<br>
-}<br>
-<br>
-// Initialize the basic block structure required for expansion of memcmp call<br>
-// with given maximum load size and memcmp size parameter.<br>
-// This structure includes:<br>
-// 1. A list of load compare blocks - LoadCmpBlocks.<br>
-// 2. An EndBlock, split from original instruction point, which is the block to<br>
-// return from.<br>
-// 3. ResultBlock, block to branch to for early exit when a<br>
-// LoadCmpBlock finds a difference.<br>
-MemCmpExpansion::MemCmpExpansion(<br>
- CallInst *const CI, uint64_t Size,<br>
- const TargetTransformInfo::MemCmpExpansionOptions &Options,<br>
- const bool IsUsedForZeroCmp, const DataLayout &TheDataLayout)<br>
- : CI(CI), Size(Size), MaxLoadSize(0), NumLoadsNonOneByte(0),<br>
- NumLoadsPerBlockForZeroCmp(Options.NumLoadsPerBlock),<br>
- IsUsedForZeroCmp(IsUsedForZeroCmp), DL(TheDataLayout), Builder(CI) {<br>
- assert(Size > 0 && "zero blocks");<br>
- // Scale the max size down if the target can load more bytes than we need.<br>
- llvm::ArrayRef<unsigned> LoadSizes(Options.LoadSizes);<br>
- while (!LoadSizes.empty() && LoadSizes.front() > Size) {<br>
- LoadSizes = LoadSizes.drop_front();<br>
- }<br>
- assert(!LoadSizes.empty() && "cannot load Size bytes");<br>
- MaxLoadSize = LoadSizes.front();<br>
- // Compute the decomposition.<br>
- unsigned GreedyNumLoadsNonOneByte = 0;<br>
- LoadSequence = computeGreedyLoadSequence(Size, LoadSizes, Options.MaxNumLoads,<br>
- GreedyNumLoadsNonOneByte);<br>
- NumLoadsNonOneByte = GreedyNumLoadsNonOneByte;<br>
- assert(LoadSequence.size() <= Options.MaxNumLoads && "broken invariant");<br>
- // If we allow overlapping loads and the load sequence is not already optimal,<br>
- // use overlapping loads.<br>
- if (Options.AllowOverlappingLoads &&<br>
- (LoadSequence.empty() || LoadSequence.size() > 2)) {<br>
- unsigned OverlappingNumLoadsNonOneByte = 0;<br>
- auto OverlappingLoads = computeOverlappingLoadSequence(<br>
- Size, MaxLoadSize, Options.MaxNumLoads, OverlappingNumLoadsNonOneByte);<br>
- if (!OverlappingLoads.empty() &&<br>
- (LoadSequence.empty() ||<br>
- OverlappingLoads.size() < LoadSequence.size())) {<br>
- LoadSequence = OverlappingLoads;<br>
- NumLoadsNonOneByte = OverlappingNumLoadsNonOneByte;<br>
- }<br>
- }<br>
- assert(LoadSequence.size() <= Options.MaxNumLoads && "broken invariant");<br>
-}<br>
-<br>
-unsigned MemCmpExpansion::getNumBlocks() {<br>
- if (IsUsedForZeroCmp)<br>
- return getNumLoads() / NumLoadsPerBlockForZeroCmp +<br>
- (getNumLoads() % NumLoadsPerBlockForZeroCmp != 0 ? 1 : 0);<br>
- return getNumLoads();<br>
-}<br>
-<br>
-void MemCmpExpansion::createLoadCmpBlocks() {<br>
- for (unsigned i = 0; i < getNumBlocks(); i++) {<br>
- BasicBlock *BB = BasicBlock::Create(CI->getContext(), "loadbb",<br>
- EndBlock->getParent(), EndBlock);<br>
- LoadCmpBlocks.push_back(BB);<br>
- }<br>
-}<br>
-<br>
-void MemCmpExpansion::createResultBlock() {<br>
- ResBlock.BB = BasicBlock::Create(CI->getContext(), "res_block",<br>
- EndBlock->getParent(), EndBlock);<br>
-}<br>
-<br>
-/// Return a pointer to an element of type `LoadSizeType` at offset<br>
-/// `OffsetBytes`.<br>
-Value *MemCmpExpansion::getPtrToElementAtOffset(Value *Source,<br>
- Type *LoadSizeType,<br>
- uint64_t OffsetBytes) {<br>
- if (OffsetBytes > 0) {<br>
- auto *ByteType = Type::getInt8Ty(CI->getContext());<br>
- Source = Builder.CreateGEP(<br>
- ByteType, Builder.CreateBitCast(Source, ByteType->getPointerTo()),<br>
- ConstantInt::get(ByteType, OffsetBytes));<br>
- }<br>
- return Builder.CreateBitCast(Source, LoadSizeType->getPointerTo());<br>
-}<br>
-<br>
-// This function creates the IR instructions for loading and comparing 1 byte.<br>
-// It loads 1 byte from each source of the memcmp parameters with the given<br>
-// GEPIndex. It then subtracts the two loaded values and adds this result to the<br>
-// final phi node for selecting the memcmp result.<br>
-void MemCmpExpansion::emitLoadCompareByteBlock(unsigned BlockIndex,<br>
- unsigned OffsetBytes) {<br>
- Builder.SetInsertPoint(LoadCmpBlocks[BlockIndex]);<br>
- Type *LoadSizeType = Type::getInt8Ty(CI->getContext());<br>
- Value *Source1 =<br>
- getPtrToElementAtOffset(CI->getArgOperand(0), LoadSizeType, OffsetBytes);<br>
- Value *Source2 =<br>
- getPtrToElementAtOffset(CI->getArgOperand(1), LoadSizeType, OffsetBytes);<br>
-<br>
- Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);<br>
- Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);<br>
-<br>
- LoadSrc1 = Builder.CreateZExt(LoadSrc1, Type::getInt32Ty(CI->getContext()));<br>
- LoadSrc2 = Builder.CreateZExt(LoadSrc2, Type::getInt32Ty(CI->getContext()));<br>
- Value *Diff = Builder.CreateSub(LoadSrc1, LoadSrc2);<br>
-<br>
- PhiRes->addIncoming(Diff, LoadCmpBlocks[BlockIndex]);<br>
-<br>
- if (BlockIndex < (LoadCmpBlocks.size() - 1)) {<br>
- // Early exit branch if difference found to EndBlock. Otherwise, continue to<br>
- // next LoadCmpBlock,<br>
- Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_NE, Diff,<br>
- ConstantInt::get(Diff->getType(), 0));<br>
- BranchInst *CmpBr =<br>
- BranchInst::Create(EndBlock, LoadCmpBlocks[BlockIndex + 1], Cmp);<br>
- Builder.Insert(CmpBr);<br>
- } else {<br>
- // The last block has an unconditional branch to EndBlock.<br>
- BranchInst *CmpBr = BranchInst::Create(EndBlock);<br>
- Builder.Insert(CmpBr);<br>
- }<br>
-}<br>
-<br>
-/// Generate an equality comparison for one or more pairs of loaded values.<br>
-/// This is used in the case where the memcmp() call is compared equal or not<br>
-/// equal to zero.<br>
-Value *MemCmpExpansion::getCompareLoadPairs(unsigned BlockIndex,<br>
- unsigned &LoadIndex) {<br>
- assert(LoadIndex < getNumLoads() &&<br>
- "getCompareLoadPairs() called with no remaining loads");<br>
- std::vector<Value *> XorList, OrList;<br>
- Value *Diff = nullptr;<br>
-<br>
- const unsigned NumLoads =<br>
- std::min(getNumLoads() - LoadIndex, NumLoadsPerBlockForZeroCmp);<br>
-<br>
- // For a single-block expansion, start inserting before the memcmp call.<br>
- if (LoadCmpBlocks.empty())<br>
- Builder.SetInsertPoint(CI);<br>
- else<br>
- Builder.SetInsertPoint(LoadCmpBlocks[BlockIndex]);<br>
-<br>
- Value *Cmp = nullptr;<br>
- // If we have multiple loads per block, we need to generate a composite<br>
- // comparison using xor+or. The type for the combinations is the largest load<br>
- // type.<br>
- IntegerType *const MaxLoadType =<br>
- NumLoads == 1 ? nullptr<br>
- : IntegerType::get(CI->getContext(), MaxLoadSize * 8);<br>
- for (unsigned i = 0; i < NumLoads; ++i, ++LoadIndex) {<br>
- const LoadEntry &CurLoadEntry = LoadSequence[LoadIndex];<br>
-<br>
- IntegerType *LoadSizeType =<br>
- IntegerType::get(CI->getContext(), CurLoadEntry.LoadSize * 8);<br>
-<br>
- Value *Source1 = getPtrToElementAtOffset(CI->getArgOperand(0), LoadSizeType,<br>
- CurLoadEntry.Offset);<br>
- Value *Source2 = getPtrToElementAtOffset(CI->getArgOperand(1), LoadSizeType,<br>
- CurLoadEntry.Offset);<br>
-<br>
- // Get a constant or load a value for each source address.<br>
- Value *LoadSrc1 = nullptr;<br>
- if (auto *Source1C = dyn_cast<Constant>(Source1))<br>
- LoadSrc1 = ConstantFoldLoadFromConstPtr(Source1C, LoadSizeType, DL);<br>
- if (!LoadSrc1)<br>
- LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);<br>
-<br>
- Value *LoadSrc2 = nullptr;<br>
- if (auto *Source2C = dyn_cast<Constant>(Source2))<br>
- LoadSrc2 = ConstantFoldLoadFromConstPtr(Source2C, LoadSizeType, DL);<br>
- if (!LoadSrc2)<br>
- LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);<br>
-<br>
- if (NumLoads != 1) {<br>
- if (LoadSizeType != MaxLoadType) {<br>
- LoadSrc1 = Builder.CreateZExt(LoadSrc1, MaxLoadType);<br>
- LoadSrc2 = Builder.CreateZExt(LoadSrc2, MaxLoadType);<br>
- }<br>
- // If we have multiple loads per block, we need to generate a composite<br>
- // comparison using xor+or.<br>
- Diff = Builder.CreateXor(LoadSrc1, LoadSrc2);<br>
- Diff = Builder.CreateZExt(Diff, MaxLoadType);<br>
- XorList.push_back(Diff);<br>
- } else {<br>
- // If there's only one load per block, we just compare the loaded values.<br>
- Cmp = Builder.CreateICmpNE(LoadSrc1, LoadSrc2);<br>
- }<br>
- }<br>
-<br>
- auto pairWiseOr = [&](std::vector<Value *> &InList) -> std::vector<Value *> {<br>
- std::vector<Value *> OutList;<br>
- for (unsigned i = 0; i < InList.size() - 1; i = i + 2) {<br>
- Value *Or = Builder.CreateOr(InList[i], InList[i + 1]);<br>
- OutList.push_back(Or);<br>
- }<br>
- if (InList.size() % 2 != 0)<br>
- OutList.push_back(InList.back());<br>
- return OutList;<br>
- };<br>
-<br>
- if (!Cmp) {<br>
- // Pairwise OR the XOR results.<br>
- OrList = pairWiseOr(XorList);<br>
-<br>
- // Pairwise OR the OR results until one result left.<br>
- while (OrList.size() != 1) {<br>
- OrList = pairWiseOr(OrList);<br>
- }<br>
-<br>
- assert(Diff && "Failed to find comparison diff");<br>
- Cmp = Builder.CreateICmpNE(OrList[0], ConstantInt::get(Diff->getType(), 0));<br>
- }<br>
-<br>
- return Cmp;<br>
-}<br>
-<br>
-void MemCmpExpansion::emitLoadCompareBlockMultipleLoads(unsigned BlockIndex,<br>
- unsigned &LoadIndex) {<br>
- Value *Cmp = getCompareLoadPairs(BlockIndex, LoadIndex);<br>
-<br>
- BasicBlock *NextBB = (BlockIndex == (LoadCmpBlocks.size() - 1))<br>
- ? EndBlock<br>
- : LoadCmpBlocks[BlockIndex + 1];<br>
- // Early exit branch if difference found to ResultBlock. Otherwise,<br>
- // continue to next LoadCmpBlock or EndBlock.<br>
- BranchInst *CmpBr = BranchInst::Create(ResBlock.BB, NextBB, Cmp);<br>
- Builder.Insert(CmpBr);<br>
-<br>
- // Add a phi edge for the last LoadCmpBlock to Endblock with a value of 0<br>
- // since early exit to ResultBlock was not taken (no difference was found in<br>
- // any of the bytes).<br>
- if (BlockIndex == LoadCmpBlocks.size() - 1) {<br>
- Value *Zero = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 0);<br>
- PhiRes->addIncoming(Zero, LoadCmpBlocks[BlockIndex]);<br>
- }<br>
-}<br>
-<br>
-// This function creates the IR intructions for loading and comparing using the<br>
-// given LoadSize. It loads the number of bytes specified by LoadSize from each<br>
-// source of the memcmp parameters. It then does a subtract to see if there was<br>
-// a difference in the loaded values. If a difference is found, it branches<br>
-// with an early exit to the ResultBlock for calculating which source was<br>
-// larger. Otherwise, it falls through to the either the next LoadCmpBlock or<br>
-// the EndBlock if this is the last LoadCmpBlock. Loading 1 byte is handled with<br>
-// a special case through emitLoadCompareByteBlock. The special handling can<br>
-// simply subtract the loaded values and add it to the result phi node.<br>
-void MemCmpExpansion::emitLoadCompareBlock(unsigned BlockIndex) {<br>
- // There is one load per block in this case, BlockIndex == LoadIndex.<br>
- const LoadEntry &CurLoadEntry = LoadSequence[BlockIndex];<br>
-<br>
- if (CurLoadEntry.LoadSize == 1) {<br>
- MemCmpExpansion::emitLoadCompareByteBlock(BlockIndex, CurLoadEntry.Offset);<br>
- return;<br>
- }<br>
-<br>
- Type *LoadSizeType =<br>
- IntegerType::get(CI->getContext(), CurLoadEntry.LoadSize * 8);<br>
- Type *MaxLoadType = IntegerType::get(CI->getContext(), MaxLoadSize * 8);<br>
- assert(CurLoadEntry.LoadSize <= MaxLoadSize && "Unexpected load type");<br>
-<br>
- Builder.SetInsertPoint(LoadCmpBlocks[BlockIndex]);<br>
-<br>
- Value *Source1 = getPtrToElementAtOffset(CI->getArgOperand(0), LoadSizeType,<br>
- CurLoadEntry.Offset);<br>
- Value *Source2 = getPtrToElementAtOffset(CI->getArgOperand(1), LoadSizeType,<br>
- CurLoadEntry.Offset);<br>
-<br>
- // Load LoadSizeType from the base address.<br>
- Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);<br>
- Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);<br>
-<br>
- if (DL.isLittleEndian()) {<br>
- Function *Bswap = Intrinsic::getDeclaration(CI->getModule(),<br>
- Intrinsic::bswap, LoadSizeType);<br>
- LoadSrc1 = Builder.CreateCall(Bswap, LoadSrc1);<br>
- LoadSrc2 = Builder.CreateCall(Bswap, LoadSrc2);<br>
- }<br>
-<br>
- if (LoadSizeType != MaxLoadType) {<br>
- LoadSrc1 = Builder.CreateZExt(LoadSrc1, MaxLoadType);<br>
- LoadSrc2 = Builder.CreateZExt(LoadSrc2, MaxLoadType);<br>
- }<br>
-<br>
- // Add the loaded values to the phi nodes for calculating memcmp result only<br>
- // if result is not used in a zero equality.<br>
- if (!IsUsedForZeroCmp) {<br>
- ResBlock.PhiSrc1->addIncoming(LoadSrc1, LoadCmpBlocks[BlockIndex]);<br>
- ResBlock.PhiSrc2->addIncoming(LoadSrc2, LoadCmpBlocks[BlockIndex]);<br>
- }<br>
-<br>
- Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_EQ, LoadSrc1, LoadSrc2);<br>
- BasicBlock *NextBB = (BlockIndex == (LoadCmpBlocks.size() - 1))<br>
- ? EndBlock<br>
- : LoadCmpBlocks[BlockIndex + 1];<br>
- // Early exit branch if difference found to ResultBlock. Otherwise, continue<br>
- // to next LoadCmpBlock or EndBlock.<br>
- BranchInst *CmpBr = BranchInst::Create(NextBB, ResBlock.BB, Cmp);<br>
- Builder.Insert(CmpBr);<br>
-<br>
- // Add a phi edge for the last LoadCmpBlock to Endblock with a value of 0<br>
- // since early exit to ResultBlock was not taken (no difference was found in<br>
- // any of the bytes).<br>
- if (BlockIndex == LoadCmpBlocks.size() - 1) {<br>
- Value *Zero = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 0);<br>
- PhiRes->addIncoming(Zero, LoadCmpBlocks[BlockIndex]);<br>
- }<br>
-}<br>
-<br>
-// This function populates the ResultBlock with a sequence to calculate the<br>
-// memcmp result. It compares the two loaded source values and returns -1 if<br>
-// src1 < src2 and 1 if src1 > src2.<br>
-void MemCmpExpansion::emitMemCmpResultBlock() {<br>
- // Special case: if memcmp result is used in a zero equality, result does not<br>
- // need to be calculated and can simply return 1.<br>
- if (IsUsedForZeroCmp) {<br>
- BasicBlock::iterator InsertPt = ResBlock.BB->getFirstInsertionPt();<br>
- Builder.SetInsertPoint(ResBlock.BB, InsertPt);<br>
- Value *Res = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 1);<br>
- PhiRes->addIncoming(Res, ResBlock.BB);<br>
- BranchInst *NewBr = BranchInst::Create(EndBlock);<br>
- Builder.Insert(NewBr);<br>
- return;<br>
- }<br>
- BasicBlock::iterator InsertPt = ResBlock.BB->getFirstInsertionPt();<br>
- Builder.SetInsertPoint(ResBlock.BB, InsertPt);<br>
-<br>
- Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_ULT, ResBlock.PhiSrc1,<br>
- ResBlock.PhiSrc2);<br>
-<br>
- Value *Res =<br>
- Builder.CreateSelect(Cmp, ConstantInt::get(Builder.getInt32Ty(), -1),<br>
- ConstantInt::get(Builder.getInt32Ty(), 1));<br>
-<br>
- BranchInst *NewBr = BranchInst::Create(EndBlock);<br>
- Builder.Insert(NewBr);<br>
- PhiRes->addIncoming(Res, ResBlock.BB);<br>
-}<br>
-<br>
-void MemCmpExpansion::setupResultBlockPHINodes() {<br>
- Type *MaxLoadType = IntegerType::get(CI->getContext(), MaxLoadSize * 8);<br>
- Builder.SetInsertPoint(ResBlock.BB);<br>
- // Note: this assumes one load per block.<br>
- ResBlock.PhiSrc1 =<br>
- Builder.CreatePHI(MaxLoadType, NumLoadsNonOneByte, "phi.src1");<br>
- ResBlock.PhiSrc2 =<br>
- Builder.CreatePHI(MaxLoadType, NumLoadsNonOneByte, "phi.src2");<br>
-}<br>
-<br>
-void MemCmpExpansion::setupEndBlockPHINodes() {<br>
- Builder.SetInsertPoint(&EndBlock->front());<br>
- PhiRes = Builder.CreatePHI(Type::getInt32Ty(CI->getContext()), 2, "phi.res");<br>
-}<br>
-<br>
-Value *MemCmpExpansion::getMemCmpExpansionZeroCase() {<br>
- unsigned LoadIndex = 0;<br>
- // This loop populates each of the LoadCmpBlocks with the IR sequence to<br>
- // handle multiple loads per block.<br>
- for (unsigned I = 0; I < getNumBlocks(); ++I) {<br>
- emitLoadCompareBlockMultipleLoads(I, LoadIndex);<br>
- }<br>
-<br>
- emitMemCmpResultBlock();<br>
- return PhiRes;<br>
-}<br>
-<br>
-/// A memcmp expansion that compares equality with 0 and only has one block of<br>
-/// load and compare can bypass the compare, branch, and phi IR that is required<br>
-/// in the general case.<br>
-Value *MemCmpExpansion::getMemCmpEqZeroOneBlock() {<br>
- unsigned LoadIndex = 0;<br>
- Value *Cmp = getCompareLoadPairs(0, LoadIndex);<br>
- assert(LoadIndex == getNumLoads() && "some entries were not consumed");<br>
- return Builder.CreateZExt(Cmp, Type::getInt32Ty(CI->getContext()));<br>
-}<br>
-<br>
-/// A memcmp expansion that only has one block of load and compare can bypass<br>
-/// the compare, branch, and phi IR that is required in the general case.<br>
-Value *MemCmpExpansion::getMemCmpOneBlock() {<br>
- Type *LoadSizeType = IntegerType::get(CI->getContext(), Size * 8);<br>
- Value *Source1 = CI->getArgOperand(0);<br>
- Value *Source2 = CI->getArgOperand(1);<br>
-<br>
- // Cast source to LoadSizeType*.<br>
- if (Source1->getType() != LoadSizeType)<br>
- Source1 = Builder.CreateBitCast(Source1, LoadSizeType->getPointerTo());<br>
- if (Source2->getType() != LoadSizeType)<br>
- Source2 = Builder.CreateBitCast(Source2, LoadSizeType->getPointerTo());<br>
-<br>
- // Load LoadSizeType from the base address.<br>
- Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);<br>
- Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);<br>
-<br>
- if (DL.isLittleEndian() && Size != 1) {<br>
- Function *Bswap = Intrinsic::getDeclaration(CI->getModule(),<br>
- Intrinsic::bswap, LoadSizeType);<br>
- LoadSrc1 = Builder.CreateCall(Bswap, LoadSrc1);<br>
- LoadSrc2 = Builder.CreateCall(Bswap, LoadSrc2);<br>
- }<br>
-<br>
- if (Size < 4) {<br>
- // The i8 and i16 cases don't need compares. We zext the loaded values and<br>
- // subtract them to get the suitable negative, zero, or positive i32 result.<br>
- LoadSrc1 = Builder.CreateZExt(LoadSrc1, Builder.getInt32Ty());<br>
- LoadSrc2 = Builder.CreateZExt(LoadSrc2, Builder.getInt32Ty());<br>
- return Builder.CreateSub(LoadSrc1, LoadSrc2);<br>
- }<br>
-<br>
- // The result of memcmp is negative, zero, or positive, so produce that by<br>
- // subtracting 2 extended compare bits: sub (ugt, ult).<br>
- // If a target prefers to use selects to get -1/0/1, they should be able<br>
- // to transform this later. The inverse transform (going from selects to math)<br>
- // may not be possible in the DAG because the selects got converted into<br>
- // branches before we got there.<br>
- Value *CmpUGT = Builder.CreateICmpUGT(LoadSrc1, LoadSrc2);<br>
- Value *CmpULT = Builder.CreateICmpULT(LoadSrc1, LoadSrc2);<br>
- Value *ZextUGT = Builder.CreateZExt(CmpUGT, Builder.getInt32Ty());<br>
- Value *ZextULT = Builder.CreateZExt(CmpULT, Builder.getInt32Ty());<br>
- return Builder.CreateSub(ZextUGT, ZextULT);<br>
-}<br>
-<br>
-// This function expands the memcmp call into an inline expansion and returns<br>
-// the memcmp result.<br>
-Value *MemCmpExpansion::getMemCmpExpansion() {<br>
- // Create the basic block framework for a multi-block expansion.<br>
- if (getNumBlocks() != 1) {<br>
- BasicBlock *StartBlock = CI->getParent();<br>
- EndBlock = StartBlock->splitBasicBlock(CI, "endblock");<br>
- setupEndBlockPHINodes();<br>
- createResultBlock();<br>
-<br>
- // If return value of memcmp is not used in a zero equality, we need to<br>
- // calculate which source was larger. The calculation requires the<br>
- // two loaded source values of each load compare block.<br>
- // These will be saved in the phi nodes created by setupResultBlockPHINodes.<br>
- if (!IsUsedForZeroCmp) setupResultBlockPHINodes();<br>
-<br>
- // Create the number of required load compare basic blocks.<br>
- createLoadCmpBlocks();<br>
-<br>
- // Update the terminator added by splitBasicBlock to branch to the first<br>
- // LoadCmpBlock.<br>
- StartBlock->getTerminator()->setSuccessor(0, LoadCmpBlocks[0]);<br>
- }<br>
-<br>
- Builder.SetCurrentDebugLocation(CI->getDebugLoc());<br>
-<br>
- if (IsUsedForZeroCmp)<br>
- return getNumBlocks() == 1 ? getMemCmpEqZeroOneBlock()<br>
- : getMemCmpExpansionZeroCase();<br>
-<br>
- if (getNumBlocks() == 1)<br>
- return getMemCmpOneBlock();<br>
-<br>
- for (unsigned I = 0; I < getNumBlocks(); ++I) {<br>
- emitLoadCompareBlock(I);<br>
- }<br>
-<br>
- emitMemCmpResultBlock();<br>
- return PhiRes;<br>
-}<br>
-<br>
-// This function checks to see if an expansion of memcmp can be generated.<br>
-// It checks for constant compare size that is less than the max inline size.<br>
-// If an expansion cannot occur, returns false to leave as a library call.<br>
-// Otherwise, the library call is replaced with a new IR instruction sequence.<br>
-/// We want to transform:<br>
-/// %call = call signext i32 @memcmp(i8* %0, i8* %1, i64 15)<br>
-/// To:<br>
-/// loadbb:<br>
-/// %0 = bitcast i32* %buffer2 to i8*<br>
-/// %1 = bitcast i32* %buffer1 to i8*<br>
-/// %2 = bitcast i8* %1 to i64*<br>
-/// %3 = bitcast i8* %0 to i64*<br>
-/// %4 = load i64, i64* %2<br>
-/// %5 = load i64, i64* %3<br>
-/// %6 = call i64 @llvm.bswap.i64(i64 %4)<br>
-/// %7 = call i64 @llvm.bswap.i64(i64 %5)<br>
-/// %8 = sub i64 %6, %7<br>
-/// %9 = icmp ne i64 %8, 0<br>
-/// br i1 %9, label %res_block, label %loadbb1<br>
-/// res_block: ; preds = %loadbb2,<br>
-/// %loadbb1, %loadbb<br>
-/// %phi.src1 = phi i64 [ %6, %loadbb ], [ %22, %loadbb1 ], [ %36, %loadbb2 ]<br>
-/// %phi.src2 = phi i64 [ %7, %loadbb ], [ %23, %loadbb1 ], [ %37, %loadbb2 ]<br>
-/// %10 = icmp ult i64 %phi.src1, %phi.src2<br>
-/// %11 = select i1 %10, i32 -1, i32 1<br>
-/// br label %endblock<br>
-/// loadbb1: ; preds = %loadbb<br>
-/// %12 = bitcast i32* %buffer2 to i8*<br>
-/// %13 = bitcast i32* %buffer1 to i8*<br>
-/// %14 = bitcast i8* %13 to i32*<br>
-/// %15 = bitcast i8* %12 to i32*<br>
-/// %16 = getelementptr i32, i32* %14, i32 2<br>
-/// %17 = getelementptr i32, i32* %15, i32 2<br>
-/// %18 = load i32, i32* %16<br>
-/// %19 = load i32, i32* %17<br>
-/// %20 = call i32 @llvm.bswap.i32(i32 %18)<br>
-/// %21 = call i32 @llvm.bswap.i32(i32 %19)<br>
-/// %22 = zext i32 %20 to i64<br>
-/// %23 = zext i32 %21 to i64<br>
-/// %24 = sub i64 %22, %23<br>
-/// %25 = icmp ne i64 %24, 0<br>
-/// br i1 %25, label %res_block, label %loadbb2<br>
-/// loadbb2: ; preds = %loadbb1<br>
-/// %26 = bitcast i32* %buffer2 to i8*<br>
-/// %27 = bitcast i32* %buffer1 to i8*<br>
-/// %28 = bitcast i8* %27 to i16*<br>
-/// %29 = bitcast i8* %26 to i16*<br>
-/// %30 = getelementptr i16, i16* %28, i16 6<br>
-/// %31 = getelementptr i16, i16* %29, i16 6<br>
-/// %32 = load i16, i16* %30<br>
-/// %33 = load i16, i16* %31<br>
-/// %34 = call i16 @llvm.bswap.i16(i16 %32)<br>
-/// %35 = call i16 @llvm.bswap.i16(i16 %33)<br>
-/// %36 = zext i16 %34 to i64<br>
-/// %37 = zext i16 %35 to i64<br>
-/// %38 = sub i64 %36, %37<br>
-/// %39 = icmp ne i64 %38, 0<br>
-/// br i1 %39, label %res_block, label %loadbb3<br>
-/// loadbb3: ; preds = %loadbb2<br>
-/// %40 = bitcast i32* %buffer2 to i8*<br>
-/// %41 = bitcast i32* %buffer1 to i8*<br>
-/// %42 = getelementptr i8, i8* %41, i8 14<br>
-/// %43 = getelementptr i8, i8* %40, i8 14<br>
-/// %44 = load i8, i8* %42<br>
-/// %45 = load i8, i8* %43<br>
-/// %46 = zext i8 %44 to i32<br>
-/// %47 = zext i8 %45 to i32<br>
-/// %48 = sub i32 %46, %47<br>
-/// br label %endblock<br>
-/// endblock: ; preds = %res_block,<br>
-/// %loadbb3<br>
-/// %phi.res = phi i32 [ %48, %loadbb3 ], [ %11, %res_block ]<br>
-/// ret i32 %phi.res<br>
-static bool expandMemCmp(CallInst *CI, const TargetTransformInfo *TTI,<br>
- const TargetLowering *TLI, const DataLayout *DL) {<br>
- NumMemCmpCalls++;<br>
-<br>
- // Early exit from expansion if -Oz.<br>
- if (CI->getFunction()->hasMinSize())<br>
- return false;<br>
-<br>
- // Early exit from expansion if size is not a constant.<br>
- ConstantInt *SizeCast = dyn_cast<ConstantInt>(CI->getArgOperand(2));<br>
- if (!SizeCast) {<br>
- NumMemCmpNotConstant++;<br>
- return false;<br>
- }<br>
- const uint64_t SizeVal = SizeCast->getZExtValue();<br>
-<br>
- if (SizeVal == 0) {<br>
- return false;<br>
- }<br>
- // TTI call to check if target would like to expand memcmp. Also, get the<br>
- // available load sizes.<br>
- const bool IsUsedForZeroCmp = isOnlyUsedInZeroEqualityComparison(CI);<br>
- auto Options = TTI->enableMemCmpExpansion(CI->getFunction()->hasOptSize(),<br>
- IsUsedForZeroCmp);<br>
- if (!Options) return false;<br>
-<br>
- if (MemCmpEqZeroNumLoadsPerBlock.getNumOccurrences())<br>
- Options.NumLoadsPerBlock = MemCmpEqZeroNumLoadsPerBlock;<br>
-<br>
- if (CI->getFunction()->hasOptSize() &&<br>
- MaxLoadsPerMemcmpOptSize.getNumOccurrences())<br>
- Options.MaxNumLoads = MaxLoadsPerMemcmpOptSize;<br>
-<br>
- if (!CI->getFunction()->hasOptSize() && MaxLoadsPerMemcmp.getNumOccurrences())<br>
- Options.MaxNumLoads = MaxLoadsPerMemcmp;<br>
-<br>
- MemCmpExpansion Expansion(CI, SizeVal, Options, IsUsedForZeroCmp, *DL);<br>
-<br>
- // Don't expand if this will require more loads than desired by the target.<br>
- if (Expansion.getNumLoads() == 0) {<br>
- NumMemCmpGreaterThanMax++;<br>
- return false;<br>
- }<br>
-<br>
- NumMemCmpInlined++;<br>
-<br>
- Value *Res = Expansion.getMemCmpExpansion();<br>
-<br>
- // Replace call with result of expansion and erase call.<br>
- CI->replaceAllUsesWith(Res);<br>
- CI->eraseFromParent();<br>
-<br>
- return true;<br>
-}<br>
-<br>
-<br>
-<br>
-class ExpandMemCmpPass : public FunctionPass {<br>
-public:<br>
- static char ID;<br>
-<br>
- ExpandMemCmpPass() : FunctionPass(ID) {<br>
- initializeExpandMemCmpPassPass(*PassRegistry::getPassRegistry());<br>
- }<br>
-<br>
- bool runOnFunction(Function &F) override {<br>
- if (skipFunction(F)) return false;<br>
-<br>
- auto *TPC = getAnalysisIfAvailable<TargetPassConfig>();<br>
- if (!TPC) {<br>
- return false;<br>
- }<br>
- const TargetLowering* TL =<br>
- TPC->getTM<TargetMachine>().getSubtargetImpl(F)->getTargetLowering();<br>
-<br>
- const TargetLibraryInfo *TLI =<br>
- &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);<br>
- const TargetTransformInfo *TTI =<br>
- &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);<br>
- auto PA = runImpl(F, TLI, TTI, TL);<br>
- return !PA.areAllPreserved();<br>
- }<br>
-<br>
-private:<br>
- void getAnalysisUsage(AnalysisUsage &AU) const override {<br>
- AU.addRequired<TargetLibraryInfoWrapperPass>();<br>
- AU.addRequired<TargetTransformInfoWrapperPass>();<br>
- FunctionPass::getAnalysisUsage(AU);<br>
- }<br>
-<br>
- PreservedAnalyses runImpl(Function &F, const TargetLibraryInfo *TLI,<br>
- const TargetTransformInfo *TTI,<br>
- const TargetLowering* TL);<br>
- // Returns true if a change was made.<br>
- bool runOnBlock(BasicBlock &BB, const TargetLibraryInfo *TLI,<br>
- const TargetTransformInfo *TTI, const TargetLowering* TL,<br>
- const DataLayout& DL);<br>
-};<br>
-<br>
-bool ExpandMemCmpPass::runOnBlock(<br>
- BasicBlock &BB, const TargetLibraryInfo *TLI,<br>
- const TargetTransformInfo *TTI, const TargetLowering* TL,<br>
- const DataLayout& DL) {<br>
- for (Instruction& I : BB) {<br>
- CallInst *CI = dyn_cast<CallInst>(&I);<br>
- if (!CI) {<br>
- continue;<br>
- }<br>
- LibFunc Func;<br>
- if (TLI->getLibFunc(ImmutableCallSite(CI), Func) &&<br>
- (Func == LibFunc_memcmp || Func == LibFunc_bcmp) &&<br>
- expandMemCmp(CI, TTI, TL, &DL)) {<br>
- return true;<br>
- }<br>
- }<br>
- return false;<br>
-}<br>
-<br>
-<br>
-PreservedAnalyses ExpandMemCmpPass::runImpl(<br>
- Function &F, const TargetLibraryInfo *TLI, const TargetTransformInfo *TTI,<br>
- const TargetLowering* TL) {<br>
- const DataLayout& DL = F.getParent()->getDataLayout();<br>
- bool MadeChanges = false;<br>
- for (auto BBIt = F.begin(); BBIt != F.end();) {<br>
- if (runOnBlock(*BBIt, TLI, TTI, TL, DL)) {<br>
- MadeChanges = true;<br>
- // If changes were made, restart the function from the beginning, since<br>
- // the structure of the function was changed.<br>
- BBIt = F.begin();<br>
- } else {<br>
- ++BBIt;<br>
- }<br>
- }<br>
- return MadeChanges ? PreservedAnalyses::none() : PreservedAnalyses::all();<br>
-}<br>
-<br>
-} // namespace<br>
-<br>
-char ExpandMemCmpPass::ID = 0;<br>
-INITIALIZE_PASS_BEGIN(ExpandMemCmpPass, "expandmemcmp",<br>
- "Expand memcmp() to load/stores", false, false)<br>
-INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfoWrapperPass)<br>
-INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)<br>
-INITIALIZE_PASS_END(ExpandMemCmpPass, "expandmemcmp",<br>
- "Expand memcmp() to load/stores", false, false)<br>
-<br>
-FunctionPass *llvm::createExpandMemCmpPass() {<br>
- return new ExpandMemCmpPass();<br>
-}<br>
<br>
Modified: llvm/trunk/lib/CodeGen/TargetPassConfig.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetPassConfig.cpp?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetPassConfig.cpp?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/TargetPassConfig.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/TargetPassConfig.cpp Tue Sep 10 02:18:00 2019<br>
@@ -100,9 +100,6 @@ static cl::opt<bool> EnableImplicitNullC<br>
"enable-implicit-null-checks",<br>
cl::desc("Fold null checks into faulting memory operations"),<br>
cl::init(false), cl::Hidden);<br>
-static cl::opt<bool> DisableMergeICmps("disable-mergeicmps",<br>
- cl::desc("Disable MergeICmps Pass"),<br>
- cl::init(false), cl::Hidden);<br>
static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,<br>
cl::desc("Print LLVM IR produced by the loop-reduce pass"));<br>
static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,<br>
@@ -643,16 +640,6 @@ void TargetPassConfig::addIRPasses() {<br>
addPass(createPrintFunctionPass(dbgs(), "\n\n*** Code after LSR ***\n"));<br>
}<br>
<br>
- if (getOptLevel() != CodeGenOpt::None) {<br>
- // The MergeICmpsPass tries to create memcmp calls by grouping sequences of<br>
- // loads and compares. ExpandMemCmpPass then tries to expand those calls<br>
- // into optimally-sized loads and compares. The transforms are enabled by a<br>
- // target lowering hook.<br>
- if (!DisableMergeICmps)<br>
- addPass(createMergeICmpsLegacyPass());<br>
- addPass(createExpandMemCmpPass());<br>
- }<br>
-<br>
// Run GC lowering passes for builtin collectors<br>
// TODO: add a pass insertion point here<br>
addPass(createGCLoweringPass());<br>
<br>
Modified: llvm/trunk/lib/Transforms/IPO/PassManagerBuilder.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PassManagerBuilder.cpp?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PassManagerBuilder.cpp?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Transforms/IPO/PassManagerBuilder.cpp (original)<br>
+++ llvm/trunk/lib/Transforms/IPO/PassManagerBuilder.cpp Tue Sep 10 02:18:00 2019<br>
@@ -246,6 +246,18 @@ void PassManagerBuilder::addInstructionC<br>
PM.add(createInstructionCombiningPass(ExpensiveCombines));<br>
}<br>
<br>
+void PassManagerBuilder::addMemcmpPasses(legacy::PassManagerBase &PM) const {<br>
+ if (OptLevel > 0) {<br>
+ // The MergeICmpsPass tries to create memcmp calls by grouping sequences of<br>
+ // loads and compares. ExpandMemCmpPass then tries to expand those calls<br>
+ // into optimally-sized loads and compares. The transforms are enabled by a<br>
+ // target transform info hook.<br>
+ PM.add(createMergeICmpsLegacyPass());<br>
+ PM.add(createExpandMemCmpPass());<br>
+ PM.add(createEarlyCSEPass());<br>
+ }<br>
+}<br>
+<br>
void PassManagerBuilder::populateFunctionPassManager(<br>
legacy::FunctionPassManager &FPM) {<br>
addExtensionsToPM(EP_EarlyAsPossible, FPM);<br>
@@ -409,6 +421,7 @@ void PassManagerBuilder::addFunctionSimp<br>
<br>
addExtensionsToPM(EP_ScalarOptimizerLate, MPM);<br>
<br>
+ addMemcmpPasses(MPM); // Merge/Expand comparisons.<br>
if (RerollLoops)<br>
MPM.add(createLoopRerollPass());<br>
<br>
@@ -910,6 +923,7 @@ void PassManagerBuilder::addLTOOptimizat<br>
PM.add(NewGVN ? createNewGVNPass()<br>
: createGVNPass(DisableGVNLoadPRE)); // Remove redundancies.<br>
PM.add(createMemCpyOptPass()); // Remove dead memcpys.<br>
+ addMemcmpPasses(PM); // Merge/Expand comparisons.<br>
<br>
// Nuke dead stores.<br>
PM.add(createDeadStoreEliminationPass());<br>
<br>
Modified: llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt (original)<br>
+++ llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt Tue Sep 10 02:18:00 2019<br>
@@ -10,6 +10,7 @@ add_llvm_library(LLVMScalarOpts<br>
DeadStoreElimination.cpp<br>
DivRemPairs.cpp<br>
EarlyCSE.cpp<br>
+ ExpandMemCmp.cpp<br>
FlattenCFGPass.cpp<br>
Float2Int.cpp<br>
GuardWidening.cpp<br>
<br>
Added: llvm/trunk/lib/Transforms/Scalar/ExpandMemCmp.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ExpandMemCmp.cpp?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ExpandMemCmp.cpp?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Transforms/Scalar/ExpandMemCmp.cpp (added)<br>
+++ llvm/trunk/lib/Transforms/Scalar/ExpandMemCmp.cpp Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,895 @@<br>
+//===--- ExpandMemCmp.cpp - Expand memcmp() to load/stores ----------------===//<br>
+//<br>
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.<br>
+// See <a href="https://llvm.org/LICENSE.txt" rel="noreferrer" target="_blank">https://llvm.org/LICENSE.txt</a> for license information.<br>
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception<br>
+//<br>
+//===----------------------------------------------------------------------===//<br>
+//<br>
+// This pass tries to expand memcmp() calls into optimally-sized loads and<br>
+// compares for the target.<br>
+//<br>
+//===----------------------------------------------------------------------===//<br>
+<br>
+#include "llvm/ADT/Statistic.h"<br>
+#include "llvm/Analysis/ConstantFolding.h"<br>
+#include "llvm/Analysis/DomTreeUpdater.h"<br>
+#include "llvm/Analysis/GlobalsModRef.h"<br>
+#include "llvm/Analysis/TargetLibraryInfo.h"<br>
+#include "llvm/Analysis/TargetTransformInfo.h"<br>
+#include "llvm/Analysis/ValueTracking.h"<br>
+#include "llvm/CodeGen/TargetSubtargetInfo.h"<br></blockquote><div><br></div><div>Scalar opts shouldn't depend on CodeGen. Is this include used at all?</div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
+#include "llvm/IR/Dominators.h"<br>
+#include "llvm/IR/IRBuilder.h"<br>
+#include "llvm/Transforms/Scalar.h"<br>
+<br>
+using namespace llvm;<br>
+<br>
+#define DEBUG_TYPE "expandmemcmp"<br>
+<br>
+STATISTIC(NumMemCmpCalls, "Number of memcmp calls");<br>
+STATISTIC(NumMemCmpNotConstant, "Number of memcmp calls without constant size");<br>
+STATISTIC(NumMemCmpGreaterThanMax,<br>
+ "Number of memcmp calls with size greater than max size");<br>
+STATISTIC(NumMemCmpInlined, "Number of inlined memcmp calls");<br>
+<br>
+static cl::opt<unsigned> MemCmpEqZeroNumLoadsPerBlock(<br>
+ "memcmp-num-loads-per-block", cl::Hidden, cl::init(1),<br>
+ cl::desc("The number of loads per basic block for inline expansion of "<br>
+ "memcmp that is only being compared against zero."));<br>
+<br>
+static cl::opt<unsigned> MaxLoadsPerMemcmp(<br>
+ "max-loads-per-memcmp", cl::Hidden,<br>
+ cl::desc("Set maximum number of loads used in expanded memcmp"));<br>
+<br>
+static cl::opt<unsigned> MaxLoadsPerMemcmpOptSize(<br>
+ "max-loads-per-memcmp-opt-size", cl::Hidden,<br>
+ cl::desc("Set maximum number of loads used in expanded memcmp for -Os/Oz"));<br>
+<br>
+namespace {<br>
+<br>
+// This class provides helper functions to expand a memcmp library call into an<br>
+// inline expansion.<br>
+class MemCmpExpansion {<br>
+ struct ResultBlock {<br>
+ BasicBlock *BB = nullptr;<br>
+ PHINode *PhiSrc1 = nullptr;<br>
+ PHINode *PhiSrc2 = nullptr;<br>
+<br>
+ ResultBlock() = default;<br>
+ };<br>
+<br>
+ CallInst *const CI;<br>
+ ResultBlock ResBlock;<br>
+ const uint64_t Size;<br>
+ unsigned MaxLoadSize;<br>
+ uint64_t NumLoadsNonOneByte;<br>
+ const uint64_t NumLoadsPerBlockForZeroCmp;<br>
+ std::vector<BasicBlock *> LoadCmpBlocks;<br>
+ BasicBlock *EndBlock = nullptr;<br>
+ PHINode *PhiRes;<br>
+ const bool IsUsedForZeroCmp;<br>
+ const DataLayout &DL;<br>
+ IRBuilder<> Builder;<br>
+ DomTreeUpdater DTU;<br>
+ // Represents the decomposition in blocks of the expansion. For example,<br>
+ // comparing 33 bytes on X86+sse can be done with 2x16-byte loads and<br>
+ // 1x1-byte load, which would be represented as [{16, 0}, {16, 16}, {32, 1}.<br>
+ struct LoadEntry {<br>
+ LoadEntry(unsigned LoadSize, uint64_t Offset)<br>
+ : LoadSize(LoadSize), Offset(Offset) {}<br>
+<br>
+ // The size of the load for this block, in bytes.<br>
+ unsigned LoadSize;<br>
+ // The offset of this load from the base pointer, in bytes.<br>
+ uint64_t Offset;<br>
+ };<br>
+ using LoadEntryVector = SmallVector<LoadEntry, 8>;<br>
+ LoadEntryVector LoadSequence;<br>
+<br>
+ void createLoadCmpBlocks();<br>
+ void createResultBlock();<br>
+ void setupResultBlockPHINodes();<br>
+ void setupEndBlockPHINodes();<br>
+ Value *getCompareLoadPairs(unsigned BlockIndex, unsigned &LoadIndex);<br>
+ void emitLoadCompareBlock(unsigned BlockIndex);<br>
+ void emitLoadCompareBlockMultipleLoads(unsigned BlockIndex,<br>
+ unsigned &LoadIndex);<br>
+ void emitLoadCompareByteBlock(unsigned BlockIndex, unsigned OffsetBytes);<br>
+ void emitMemCmpResultBlock();<br>
+ Value *getMemCmpExpansionZeroCase();<br>
+ Value *getMemCmpEqZeroOneBlock();<br>
+ Value *getMemCmpOneBlock();<br>
+ Value *getPtrToElementAtOffset(Value *Source, Type *LoadSizeType,<br>
+ uint64_t OffsetBytes);<br>
+<br>
+ static LoadEntryVector<br>
+ computeGreedyLoadSequence(uint64_t Size, llvm::ArrayRef<unsigned> LoadSizes,<br>
+ unsigned MaxNumLoads, unsigned &NumLoadsNonOneByte);<br>
+ static LoadEntryVector<br>
+ computeOverlappingLoadSequence(uint64_t Size, unsigned MaxLoadSize,<br>
+ unsigned MaxNumLoads,<br>
+ unsigned &NumLoadsNonOneByte);<br>
+<br>
+public:<br>
+ MemCmpExpansion(CallInst *CI, uint64_t Size,<br>
+ const TargetTransformInfo::MemCmpExpansionOptions &Options,<br>
+ const bool IsUsedForZeroCmp, const DataLayout &TheDataLayout,<br>
+ DominatorTree *DT);<br>
+<br>
+ unsigned getNumBlocks();<br>
+ uint64_t getNumLoads() const { return LoadSequence.size(); }<br>
+<br>
+ Value *getMemCmpExpansion();<br>
+};<br>
+<br>
+MemCmpExpansion::LoadEntryVector MemCmpExpansion::computeGreedyLoadSequence(<br>
+ uint64_t Size, llvm::ArrayRef<unsigned> LoadSizes,<br>
+ const unsigned MaxNumLoads, unsigned &NumLoadsNonOneByte) {<br>
+ NumLoadsNonOneByte = 0;<br>
+ LoadEntryVector LoadSequence;<br>
+ uint64_t Offset = 0;<br>
+ while (Size && !LoadSizes.empty()) {<br>
+ const unsigned LoadSize = LoadSizes.front();<br>
+ const uint64_t NumLoadsForThisSize = Size / LoadSize;<br>
+ if (LoadSequence.size() + NumLoadsForThisSize > MaxNumLoads) {<br>
+ // Do not expand if the total number of loads is larger than what the<br>
+ // target allows. Note that it's important that we exit before completing<br>
+ // the expansion to avoid using a ton of memory to store the expansion for<br>
+ // large sizes.<br>
+ return {};<br>
+ }<br>
+ if (NumLoadsForThisSize > 0) {<br>
+ for (uint64_t I = 0; I < NumLoadsForThisSize; ++I) {<br>
+ LoadSequence.push_back({LoadSize, Offset});<br>
+ Offset += LoadSize;<br>
+ }<br>
+ if (LoadSize > 1)<br>
+ ++NumLoadsNonOneByte;<br>
+ Size = Size % LoadSize;<br>
+ }<br>
+ LoadSizes = LoadSizes.drop_front();<br>
+ }<br>
+ return LoadSequence;<br>
+}<br>
+<br>
+MemCmpExpansion::LoadEntryVector<br>
+MemCmpExpansion::computeOverlappingLoadSequence(uint64_t Size,<br>
+ const unsigned MaxLoadSize,<br>
+ const unsigned MaxNumLoads,<br>
+ unsigned &NumLoadsNonOneByte) {<br>
+ // These are already handled by the greedy approach.<br>
+ if (Size < 2 || MaxLoadSize < 2)<br>
+ return {};<br>
+<br>
+ // We try to do as many non-overlapping loads as possible starting from the<br>
+ // beginning.<br>
+ const uint64_t NumNonOverlappingLoads = Size / MaxLoadSize;<br>
+ assert(NumNonOverlappingLoads && "there must be at least one load");<br>
+ // There remain 0 to (MaxLoadSize - 1) bytes to load, this will be done with<br>
+ // an overlapping load.<br>
+ Size = Size - NumNonOverlappingLoads * MaxLoadSize;<br>
+ // Bail if we do not need an overloapping store, this is already handled by<br>
+ // the greedy approach.<br>
+ if (Size == 0)<br>
+ return {};<br>
+ // Bail if the number of loads (non-overlapping + potential overlapping one)<br>
+ // is larger than the max allowed.<br>
+ if ((NumNonOverlappingLoads + 1) > MaxNumLoads)<br>
+ return {};<br>
+<br>
+ // Add non-overlapping loads.<br>
+ LoadEntryVector LoadSequence;<br>
+ uint64_t Offset = 0;<br>
+ for (uint64_t I = 0; I < NumNonOverlappingLoads; ++I) {<br>
+ LoadSequence.push_back({MaxLoadSize, Offset});<br>
+ Offset += MaxLoadSize;<br>
+ }<br>
+<br>
+ // Add the last overlapping load.<br>
+ assert(Size > 0 && Size < MaxLoadSize && "broken invariant");<br>
+ LoadSequence.push_back({MaxLoadSize, Offset - (MaxLoadSize - Size)});<br>
+ NumLoadsNonOneByte = 1;<br>
+ return LoadSequence;<br>
+}<br>
+<br>
+// Initialize the basic block structure required for expansion of memcmp call<br>
+// with given maximum load size and memcmp size parameter.<br>
+// This structure includes:<br>
+// 1. A list of load compare blocks - LoadCmpBlocks.<br>
+// 2. An EndBlock, split from original instruction point, which is the block to<br>
+// return from.<br>
+// 3. ResultBlock, block to branch to for early exit when a<br>
+// LoadCmpBlock finds a difference.<br>
+MemCmpExpansion::MemCmpExpansion(<br>
+ CallInst *const CI, uint64_t Size,<br>
+ const TargetTransformInfo::MemCmpExpansionOptions &Options,<br>
+ const bool IsUsedForZeroCmp, const DataLayout &TheDataLayout,<br>
+ DominatorTree *DT)<br>
+ : CI(CI), Size(Size), MaxLoadSize(0), NumLoadsNonOneByte(0),<br>
+ NumLoadsPerBlockForZeroCmp(Options.NumLoadsPerBlock),<br>
+ IsUsedForZeroCmp(IsUsedForZeroCmp), DL(TheDataLayout), Builder(CI),<br>
+ DTU(DT, /*PostDominator*/ nullptr,<br>
+ DomTreeUpdater::UpdateStrategy::Eager) {<br>
+ assert(Size > 0 && "zero blocks");<br>
+ // Scale the max size down if the target can load more bytes than we need.<br>
+ llvm::ArrayRef<unsigned> LoadSizes(Options.LoadSizes);<br>
+ while (!LoadSizes.empty() && LoadSizes.front() > Size) {<br>
+ LoadSizes = LoadSizes.drop_front();<br>
+ }<br>
+ assert(!LoadSizes.empty() && "cannot load Size bytes");<br>
+ MaxLoadSize = LoadSizes.front();<br>
+ // Compute the decomposition.<br>
+ unsigned GreedyNumLoadsNonOneByte = 0;<br>
+ LoadSequence = computeGreedyLoadSequence(Size, LoadSizes, Options.MaxNumLoads,<br>
+ GreedyNumLoadsNonOneByte);<br>
+ NumLoadsNonOneByte = GreedyNumLoadsNonOneByte;<br>
+ assert(LoadSequence.size() <= Options.MaxNumLoads && "broken invariant");<br>
+ // If we allow overlapping loads and the load sequence is not already optimal,<br>
+ // use overlapping loads.<br>
+ if (Options.AllowOverlappingLoads &&<br>
+ (LoadSequence.empty() || LoadSequence.size() > 2)) {<br>
+ unsigned OverlappingNumLoadsNonOneByte = 0;<br>
+ auto OverlappingLoads = computeOverlappingLoadSequence(<br>
+ Size, MaxLoadSize, Options.MaxNumLoads, OverlappingNumLoadsNonOneByte);<br>
+ if (!OverlappingLoads.empty() &&<br>
+ (LoadSequence.empty() ||<br>
+ OverlappingLoads.size() < LoadSequence.size())) {<br>
+ LoadSequence = OverlappingLoads;<br>
+ NumLoadsNonOneByte = OverlappingNumLoadsNonOneByte;<br>
+ }<br>
+ }<br>
+ assert(LoadSequence.size() <= Options.MaxNumLoads && "broken invariant");<br>
+}<br>
+<br>
+unsigned MemCmpExpansion::getNumBlocks() {<br>
+ if (IsUsedForZeroCmp)<br>
+ return getNumLoads() / NumLoadsPerBlockForZeroCmp +<br>
+ (getNumLoads() % NumLoadsPerBlockForZeroCmp != 0 ? 1 : 0);<br>
+ return getNumLoads();<br>
+}<br>
+<br>
+void MemCmpExpansion::createLoadCmpBlocks() {<br>
+ assert(ResBlock.BB && "ResBlock must be created before LoadCmpBlocks");<br>
+ for (unsigned i = 0; i < getNumBlocks(); i++) {<br>
+ BasicBlock *BB = BasicBlock::Create(CI->getContext(), "loadbb",<br>
+ EndBlock->getParent(), EndBlock);<br>
+ LoadCmpBlocks.push_back(BB);<br>
+ }<br>
+}<br>
+<br>
+void MemCmpExpansion::createResultBlock() {<br>
+ assert(EndBlock && "EndBlock must be created before ResultBlock");<br>
+ ResBlock.BB = BasicBlock::Create(CI->getContext(), "res_block",<br>
+ EndBlock->getParent(), EndBlock);<br>
+}<br>
+<br>
+/// Return a pointer to an element of type `LoadSizeType` at offset<br>
+/// `OffsetBytes`.<br>
+Value *MemCmpExpansion::getPtrToElementAtOffset(Value *Source,<br>
+ Type *LoadSizeType,<br>
+ uint64_t OffsetBytes) {<br>
+ if (OffsetBytes > 0) {<br>
+ auto *ByteType = Type::getInt8Ty(CI->getContext());<br>
+ Source = Builder.CreateGEP(<br>
+ ByteType, Builder.CreateBitCast(Source, ByteType->getPointerTo()),<br>
+ ConstantInt::get(ByteType, OffsetBytes));<br>
+ }<br>
+ return Builder.CreateBitCast(Source, LoadSizeType->getPointerTo());<br>
+}<br>
+<br>
+// This function creates the IR instructions for loading and comparing 1 byte.<br>
+// It loads 1 byte from each source of the memcmp parameters with the given<br>
+// GEPIndex. It then subtracts the two loaded values and adds this result to the<br>
+// final phi node for selecting the memcmp result.<br>
+void MemCmpExpansion::emitLoadCompareByteBlock(unsigned BlockIndex,<br>
+ unsigned OffsetBytes) {<br>
+ BasicBlock *const BB = LoadCmpBlocks[BlockIndex];<br>
+ Builder.SetInsertPoint(BB);<br>
+ Type *LoadSizeType = Type::getInt8Ty(CI->getContext());<br>
+ Value *Source1 =<br>
+ getPtrToElementAtOffset(CI->getArgOperand(0), LoadSizeType, OffsetBytes);<br>
+ Value *Source2 =<br>
+ getPtrToElementAtOffset(CI->getArgOperand(1), LoadSizeType, OffsetBytes);<br>
+<br>
+ Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);<br>
+ Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);<br>
+<br>
+ LoadSrc1 = Builder.CreateZExt(LoadSrc1, Type::getInt32Ty(CI->getContext()));<br>
+ LoadSrc2 = Builder.CreateZExt(LoadSrc2, Type::getInt32Ty(CI->getContext()));<br>
+ Value *Diff = Builder.CreateSub(LoadSrc1, LoadSrc2);<br>
+<br>
+ PhiRes->addIncoming(Diff, LoadCmpBlocks[BlockIndex]);<br>
+<br>
+ if (BlockIndex < (LoadCmpBlocks.size() - 1)) {<br>
+ // Early exit branch if difference found to EndBlock. Otherwise, continue to<br>
+ // next LoadCmpBlock,<br>
+ Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_NE, Diff,<br>
+ ConstantInt::get(Diff->getType(), 0));<br>
+ BasicBlock *const NextBB = LoadCmpBlocks[BlockIndex + 1];<br>
+ BranchInst *CmpBr = BranchInst::Create(EndBlock, NextBB, Cmp);<br>
+ Builder.Insert(CmpBr);<br>
+ DTU.applyUpdates({{DominatorTree::Insert, BB, EndBlock},<br>
+ {DominatorTree::Insert, BB, NextBB}});<br>
+ } else {<br>
+ // The last block has an unconditional branch to EndBlock.<br>
+ BranchInst *CmpBr = BranchInst::Create(EndBlock);<br>
+ Builder.Insert(CmpBr);<br>
+ DTU.applyUpdates({{DominatorTree::Insert, BB, EndBlock}});<br>
+ }<br>
+}<br>
+<br>
+/// Generate an equality comparison for one or more pairs of loaded values.<br>
+/// This is used in the case where the memcmp() call is compared equal or not<br>
+/// equal to zero.<br>
+Value *MemCmpExpansion::getCompareLoadPairs(unsigned BlockIndex,<br>
+ unsigned &LoadIndex) {<br>
+ assert(LoadIndex < getNumLoads() &&<br>
+ "getCompareLoadPairs() called with no remaining loads");<br>
+ std::vector<Value *> XorList, OrList;<br>
+ Value *Diff = nullptr;<br>
+<br>
+ const unsigned NumLoads =<br>
+ std::min(getNumLoads() - LoadIndex, NumLoadsPerBlockForZeroCmp);<br>
+<br>
+ // For a single-block expansion, start inserting before the memcmp call.<br>
+ if (LoadCmpBlocks.empty())<br>
+ Builder.SetInsertPoint(CI);<br>
+ else<br>
+ Builder.SetInsertPoint(LoadCmpBlocks[BlockIndex]);<br>
+<br>
+ Value *Cmp = nullptr;<br>
+ // If we have multiple loads per block, we need to generate a composite<br>
+ // comparison using xor+or. The type for the combinations is the largest load<br>
+ // type.<br>
+ IntegerType *const MaxLoadType =<br>
+ NumLoads == 1 ? nullptr<br>
+ : IntegerType::get(CI->getContext(), MaxLoadSize * 8);<br>
+ for (unsigned i = 0; i < NumLoads; ++i, ++LoadIndex) {<br>
+ const LoadEntry &CurLoadEntry = LoadSequence[LoadIndex];<br>
+<br>
+ IntegerType *LoadSizeType =<br>
+ IntegerType::get(CI->getContext(), CurLoadEntry.LoadSize * 8);<br>
+<br>
+ Value *Source1 = getPtrToElementAtOffset(CI->getArgOperand(0), LoadSizeType,<br>
+ CurLoadEntry.Offset);<br>
+ Value *Source2 = getPtrToElementAtOffset(CI->getArgOperand(1), LoadSizeType,<br>
+ CurLoadEntry.Offset);<br>
+<br>
+ // Get a constant or load a value for each source address.<br>
+ Value *LoadSrc1 = nullptr;<br>
+ if (auto *Source1C = dyn_cast<Constant>(Source1))<br>
+ LoadSrc1 = ConstantFoldLoadFromConstPtr(Source1C, LoadSizeType, DL);<br>
+ if (!LoadSrc1)<br>
+ LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);<br>
+<br>
+ Value *LoadSrc2 = nullptr;<br>
+ if (auto *Source2C = dyn_cast<Constant>(Source2))<br>
+ LoadSrc2 = ConstantFoldLoadFromConstPtr(Source2C, LoadSizeType, DL);<br>
+ if (!LoadSrc2)<br>
+ LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);<br>
+<br>
+ if (NumLoads != 1) {<br>
+ if (LoadSizeType != MaxLoadType) {<br>
+ LoadSrc1 = Builder.CreateZExt(LoadSrc1, MaxLoadType);<br>
+ LoadSrc2 = Builder.CreateZExt(LoadSrc2, MaxLoadType);<br>
+ }<br>
+ // If we have multiple loads per block, we need to generate a composite<br>
+ // comparison using xor+or.<br>
+ Diff = Builder.CreateXor(LoadSrc1, LoadSrc2);<br>
+ Diff = Builder.CreateZExt(Diff, MaxLoadType);<br>
+ XorList.push_back(Diff);<br>
+ } else {<br>
+ // If there's only one load per block, we just compare the loaded values.<br>
+ Cmp = Builder.CreateICmpNE(LoadSrc1, LoadSrc2);<br>
+ }<br>
+ }<br>
+<br>
+ auto pairWiseOr = [&](std::vector<Value *> &InList) -> std::vector<Value *> {<br>
+ std::vector<Value *> OutList;<br>
+ for (unsigned i = 0; i < InList.size() - 1; i = i + 2) {<br>
+ Value *Or = Builder.CreateOr(InList[i], InList[i + 1]);<br>
+ OutList.push_back(Or);<br>
+ }<br>
+ if (InList.size() % 2 != 0)<br>
+ OutList.push_back(InList.back());<br>
+ return OutList;<br>
+ };<br>
+<br>
+ if (!Cmp) {<br>
+ // Pairwise OR the XOR results.<br>
+ OrList = pairWiseOr(XorList);<br>
+<br>
+ // Pairwise OR the OR results until one result left.<br>
+ while (OrList.size() != 1) {<br>
+ OrList = pairWiseOr(OrList);<br>
+ }<br>
+<br>
+ assert(Diff && "Failed to find comparison diff");<br>
+ Cmp = Builder.CreateICmpNE(OrList[0], ConstantInt::get(Diff->getType(), 0));<br>
+ }<br>
+<br>
+ return Cmp;<br>
+}<br>
+<br>
+void MemCmpExpansion::emitLoadCompareBlockMultipleLoads(unsigned BlockIndex,<br>
+ unsigned &LoadIndex) {<br>
+ Value *Cmp = getCompareLoadPairs(BlockIndex, LoadIndex);<br>
+<br>
+ BasicBlock *NextBB = (BlockIndex == (LoadCmpBlocks.size() - 1))<br>
+ ? EndBlock<br>
+ : LoadCmpBlocks[BlockIndex + 1];<br>
+ // Early exit branch if difference found to ResultBlock. Otherwise,<br>
+ // continue to next LoadCmpBlock or EndBlock.<br>
+ BranchInst *CmpBr = BranchInst::Create(ResBlock.BB, NextBB, Cmp);<br>
+ Builder.Insert(CmpBr);<br>
+ BasicBlock *const BB = LoadCmpBlocks[BlockIndex];<br>
+<br>
+ // Add a phi edge for the last LoadCmpBlock to Endblock with a value of 0<br>
+ // since early exit to ResultBlock was not taken (no difference was found in<br>
+ // any of the bytes).<br>
+ if (BlockIndex == LoadCmpBlocks.size() - 1) {<br>
+ Value *Zero = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 0);<br>
+ PhiRes->addIncoming(Zero, BB);<br>
+ }<br>
+ DTU.applyUpdates({{DominatorTree::Insert, BB, ResBlock.BB},<br>
+ {DominatorTree::Insert, BB, NextBB}});<br>
+}<br>
+<br>
+// This function creates the IR intructions for loading and comparing using the<br>
+// given LoadSize. It loads the number of bytes specified by LoadSize from each<br>
+// source of the memcmp parameters. It then does a subtract to see if there was<br>
+// a difference in the loaded values. If a difference is found, it branches<br>
+// with an early exit to the ResultBlock for calculating which source was<br>
+// larger. Otherwise, it falls through to the either the next LoadCmpBlock or<br>
+// the EndBlock if this is the last LoadCmpBlock. Loading 1 byte is handled with<br>
+// a special case through emitLoadCompareByteBlock. The special handling can<br>
+// simply subtract the loaded values and add it to the result phi node.<br>
+void MemCmpExpansion::emitLoadCompareBlock(unsigned BlockIndex) {<br>
+ // There is one load per block in this case, BlockIndex == LoadIndex.<br>
+ const LoadEntry &CurLoadEntry = LoadSequence[BlockIndex];<br>
+<br>
+ if (CurLoadEntry.LoadSize == 1) {<br>
+ MemCmpExpansion::emitLoadCompareByteBlock(BlockIndex, CurLoadEntry.Offset);<br>
+ return;<br>
+ }<br>
+<br>
+ Type *LoadSizeType =<br>
+ IntegerType::get(CI->getContext(), CurLoadEntry.LoadSize * 8);<br>
+ Type *MaxLoadType = IntegerType::get(CI->getContext(), MaxLoadSize * 8);<br>
+ assert(CurLoadEntry.LoadSize <= MaxLoadSize && "Unexpected load type");<br>
+<br>
+ BasicBlock *const BB = LoadCmpBlocks[BlockIndex];<br>
+ Builder.SetInsertPoint(BB);<br>
+<br>
+ Value *Source1 = getPtrToElementAtOffset(CI->getArgOperand(0), LoadSizeType,<br>
+ CurLoadEntry.Offset);<br>
+ Value *Source2 = getPtrToElementAtOffset(CI->getArgOperand(1), LoadSizeType,<br>
+ CurLoadEntry.Offset);<br>
+<br>
+ // Load LoadSizeType from the base address.<br>
+ Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);<br>
+ Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);<br>
+<br>
+ if (DL.isLittleEndian()) {<br>
+ Function *Bswap = Intrinsic::getDeclaration(CI->getModule(),<br>
+ Intrinsic::bswap, LoadSizeType);<br>
+ LoadSrc1 = Builder.CreateCall(Bswap, LoadSrc1);<br>
+ LoadSrc2 = Builder.CreateCall(Bswap, LoadSrc2);<br>
+ }<br>
+<br>
+ if (LoadSizeType != MaxLoadType) {<br>
+ LoadSrc1 = Builder.CreateZExt(LoadSrc1, MaxLoadType);<br>
+ LoadSrc2 = Builder.CreateZExt(LoadSrc2, MaxLoadType);<br>
+ }<br>
+<br>
+ // Add the loaded values to the phi nodes for calculating memcmp result only<br>
+ // if result is not used in a zero equality.<br>
+ if (!IsUsedForZeroCmp) {<br>
+ ResBlock.PhiSrc1->addIncoming(LoadSrc1, LoadCmpBlocks[BlockIndex]);<br>
+ ResBlock.PhiSrc2->addIncoming(LoadSrc2, LoadCmpBlocks[BlockIndex]);<br>
+ }<br>
+<br>
+ Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_EQ, LoadSrc1, LoadSrc2);<br>
+ BasicBlock *NextBB = (BlockIndex == (LoadCmpBlocks.size() - 1))<br>
+ ? EndBlock<br>
+ : LoadCmpBlocks[BlockIndex + 1];<br>
+ // Early exit branch if difference found to ResultBlock. Otherwise, continue<br>
+ // to next LoadCmpBlock or EndBlock.<br>
+ BranchInst *CmpBr = BranchInst::Create(NextBB, ResBlock.BB, Cmp);<br>
+ Builder.Insert(CmpBr);<br>
+<br>
+ // Add a phi edge for the last LoadCmpBlock to Endblock with a value of 0<br>
+ // since early exit to ResultBlock was not taken (no difference was found in<br>
+ // any of the bytes).<br>
+ if (BlockIndex == LoadCmpBlocks.size() - 1) {<br>
+ Value *Zero = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 0);<br>
+ PhiRes->addIncoming(Zero, BB);<br>
+ }<br>
+ DTU.applyUpdates({{DominatorTree::Insert, BB, ResBlock.BB},<br>
+ {DominatorTree::Insert, BB, NextBB}});<br>
+}<br>
+<br>
+// This function populates the ResultBlock with a sequence to calculate the<br>
+// memcmp result. It compares the two loaded source values and returns -1 if<br>
+// src1 < src2 and 1 if src1 > src2.<br>
+void MemCmpExpansion::emitMemCmpResultBlock() {<br>
+ // Special case: if memcmp result is used in a zero equality, result does not<br>
+ // need to be calculated and can simply return 1.<br>
+ if (IsUsedForZeroCmp) {<br>
+ BasicBlock::iterator InsertPt = ResBlock.BB->getFirstInsertionPt();<br>
+ Builder.SetInsertPoint(ResBlock.BB, InsertPt);<br>
+ Value *Res = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 1);<br>
+ PhiRes->addIncoming(Res, ResBlock.BB);<br>
+ BranchInst *NewBr = BranchInst::Create(EndBlock);<br>
+ Builder.Insert(NewBr);<br>
+ DTU.applyUpdates({{DominatorTree::Insert, ResBlock.BB, EndBlock}});<br>
+ return;<br>
+ }<br>
+ BasicBlock::iterator InsertPt = ResBlock.BB->getFirstInsertionPt();<br>
+ Builder.SetInsertPoint(ResBlock.BB, InsertPt);<br>
+<br>
+ Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_ULT, ResBlock.PhiSrc1,<br>
+ ResBlock.PhiSrc2);<br>
+<br>
+ Value *Res =<br>
+ Builder.CreateSelect(Cmp, ConstantInt::get(Builder.getInt32Ty(), -1),<br>
+ ConstantInt::get(Builder.getInt32Ty(), 1));<br>
+<br>
+ BranchInst *NewBr = BranchInst::Create(EndBlock);<br>
+ Builder.Insert(NewBr);<br>
+ PhiRes->addIncoming(Res, ResBlock.BB);<br>
+ DTU.applyUpdates({{DominatorTree::Insert, ResBlock.BB, EndBlock}});<br>
+}<br>
+<br>
+void MemCmpExpansion::setupResultBlockPHINodes() {<br>
+ Type *MaxLoadType = IntegerType::get(CI->getContext(), MaxLoadSize * 8);<br>
+ Builder.SetInsertPoint(ResBlock.BB);<br>
+ // Note: this assumes one load per block.<br>
+ ResBlock.PhiSrc1 =<br>
+ Builder.CreatePHI(MaxLoadType, NumLoadsNonOneByte, "phi.src1");<br>
+ ResBlock.PhiSrc2 =<br>
+ Builder.CreatePHI(MaxLoadType, NumLoadsNonOneByte, "phi.src2");<br>
+}<br>
+<br>
+void MemCmpExpansion::setupEndBlockPHINodes() {<br>
+ Builder.SetInsertPoint(&EndBlock->front());<br>
+ PhiRes = Builder.CreatePHI(Type::getInt32Ty(CI->getContext()), 2, "phi.res");<br>
+}<br>
+<br>
+Value *MemCmpExpansion::getMemCmpExpansionZeroCase() {<br>
+ unsigned LoadIndex = 0;<br>
+ // This loop populates each of the LoadCmpBlocks with the IR sequence to<br>
+ // handle multiple loads per block.<br>
+ for (unsigned I = 0; I < getNumBlocks(); ++I) {<br>
+ emitLoadCompareBlockMultipleLoads(I, LoadIndex);<br>
+ }<br>
+<br>
+ emitMemCmpResultBlock();<br>
+ return PhiRes;<br>
+}<br>
+<br>
+/// A memcmp expansion that compares equality with 0 and only has one block of<br>
+/// load and compare can bypass the compare, branch, and phi IR that is required<br>
+/// in the general case.<br>
+Value *MemCmpExpansion::getMemCmpEqZeroOneBlock() {<br>
+ unsigned LoadIndex = 0;<br>
+ Value *Cmp = getCompareLoadPairs(0, LoadIndex);<br>
+ assert(LoadIndex == getNumLoads() && "some entries were not consumed");<br>
+ return Builder.CreateZExt(Cmp, Type::getInt32Ty(CI->getContext()));<br>
+}<br>
+<br>
+/// A memcmp expansion that only has one block of load and compare can bypass<br>
+/// the compare, branch, and phi IR that is required in the general case.<br>
+Value *MemCmpExpansion::getMemCmpOneBlock() {<br>
+ Type *LoadSizeType = IntegerType::get(CI->getContext(), Size * 8);<br>
+ Value *Source1 = CI->getArgOperand(0);<br>
+ Value *Source2 = CI->getArgOperand(1);<br>
+<br>
+ // Cast source to LoadSizeType*.<br>
+ if (Source1->getType() != LoadSizeType)<br>
+ Source1 = Builder.CreateBitCast(Source1, LoadSizeType->getPointerTo());<br>
+ if (Source2->getType() != LoadSizeType)<br>
+ Source2 = Builder.CreateBitCast(Source2, LoadSizeType->getPointerTo());<br>
+<br>
+ // Load LoadSizeType from the base address.<br>
+ Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);<br>
+ Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);<br>
+<br>
+ if (DL.isLittleEndian() && Size != 1) {<br>
+ Function *Bswap = Intrinsic::getDeclaration(CI->getModule(),<br>
+ Intrinsic::bswap, LoadSizeType);<br>
+ LoadSrc1 = Builder.CreateCall(Bswap, LoadSrc1);<br>
+ LoadSrc2 = Builder.CreateCall(Bswap, LoadSrc2);<br>
+ }<br>
+<br>
+ if (Size < 4) {<br>
+ // The i8 and i16 cases don't need compares. We zext the loaded values and<br>
+ // subtract them to get the suitable negative, zero, or positive i32 result.<br>
+ LoadSrc1 = Builder.CreateZExt(LoadSrc1, Builder.getInt32Ty());<br>
+ LoadSrc2 = Builder.CreateZExt(LoadSrc2, Builder.getInt32Ty());<br>
+ return Builder.CreateSub(LoadSrc1, LoadSrc2);<br>
+ }<br>
+<br>
+ // The result of memcmp is negative, zero, or positive, so produce that by<br>
+ // subtracting 2 extended compare bits: sub (ugt, ult).<br>
+ // If a target prefers to use selects to get -1/0/1, they should be able<br>
+ // to transform this later. The inverse transform (going from selects to math)<br>
+ // may not be possible in the DAG because the selects got converted into<br>
+ // branches before we got there.<br>
+ Value *CmpUGT = Builder.CreateICmpUGT(LoadSrc1, LoadSrc2);<br>
+ Value *CmpULT = Builder.CreateICmpULT(LoadSrc1, LoadSrc2);<br>
+ Value *ZextUGT = Builder.CreateZExt(CmpUGT, Builder.getInt32Ty());<br>
+ Value *ZextULT = Builder.CreateZExt(CmpULT, Builder.getInt32Ty());<br>
+ return Builder.CreateSub(ZextUGT, ZextULT);<br>
+}<br>
+<br>
+// This function expands the memcmp call into an inline expansion and returns<br>
+// the memcmp result.<br>
+Value *MemCmpExpansion::getMemCmpExpansion() {<br>
+ // Create the basic block framework for a multi-block expansion.<br>
+ if (getNumBlocks() != 1) {<br>
+ BasicBlock *StartBlock = CI->getParent();<br>
+ EndBlock = StartBlock->splitBasicBlock(CI, "endblock");<br>
+ DTU.applyUpdates({{DominatorTree::Insert, StartBlock, EndBlock}});<br>
+ setupEndBlockPHINodes();<br>
+ createResultBlock();<br>
+<br>
+ // If return value of memcmp is not used in a zero equality, we need to<br>
+ // calculate which source was larger. The calculation requires the<br>
+ // two loaded source values of each load compare block.<br>
+ // These will be saved in the phi nodes created by setupResultBlockPHINodes.<br>
+ if (!IsUsedForZeroCmp)<br>
+ setupResultBlockPHINodes();<br>
+<br>
+ // Create the number of required load compare basic blocks.<br>
+ createLoadCmpBlocks();<br>
+<br>
+ // Update the terminator added by splitBasicBlock to branch to the first<br>
+ // LoadCmpBlock.<br>
+ BasicBlock *const FirstLoadBB = LoadCmpBlocks[0];<br>
+ StartBlock->getTerminator()->setSuccessor(0, FirstLoadBB);<br>
+ DTU.applyUpdates({{DominatorTree::Delete, StartBlock, EndBlock},<br>
+ {DominatorTree::Insert, StartBlock, FirstLoadBB}});<br>
+ }<br>
+<br>
+ Builder.SetCurrentDebugLocation(CI->getDebugLoc());<br>
+<br>
+ if (IsUsedForZeroCmp)<br>
+ return getNumBlocks() == 1 ? getMemCmpEqZeroOneBlock()<br>
+ : getMemCmpExpansionZeroCase();<br>
+<br>
+ if (getNumBlocks() == 1)<br>
+ return getMemCmpOneBlock();<br>
+<br>
+ for (unsigned I = 0; I < getNumBlocks(); ++I) {<br>
+ emitLoadCompareBlock(I);<br>
+ }<br>
+<br>
+ emitMemCmpResultBlock();<br>
+ return PhiRes;<br>
+}<br>
+<br>
+// This function checks to see if an expansion of memcmp can be generated.<br>
+// It checks for constant compare size that is less than the max inline size.<br>
+// If an expansion cannot occur, returns false to leave as a library call.<br>
+// Otherwise, the library call is replaced with a new IR instruction sequence.<br>
+/// We want to transform:<br>
+/// %call = call signext i32 @memcmp(i8* %0, i8* %1, i64 15)<br>
+/// To:<br>
+/// loadbb:<br>
+/// %0 = bitcast i32* %buffer2 to i8*<br>
+/// %1 = bitcast i32* %buffer1 to i8*<br>
+/// %2 = bitcast i8* %1 to i64*<br>
+/// %3 = bitcast i8* %0 to i64*<br>
+/// %4 = load i64, i64* %2<br>
+/// %5 = load i64, i64* %3<br>
+/// %6 = call i64 @llvm.bswap.i64(i64 %4)<br>
+/// %7 = call i64 @llvm.bswap.i64(i64 %5)<br>
+/// %8 = sub i64 %6, %7<br>
+/// %9 = icmp ne i64 %8, 0<br>
+/// br i1 %9, label %res_block, label %loadbb1<br>
+/// res_block: ; preds = %loadbb2,<br>
+/// %loadbb1, %loadbb<br>
+/// %phi.src1 = phi i64 [ %6, %loadbb ], [ %22, %loadbb1 ], [ %36, %loadbb2 ]<br>
+/// %phi.src2 = phi i64 [ %7, %loadbb ], [ %23, %loadbb1 ], [ %37, %loadbb2 ]<br>
+/// %10 = icmp ult i64 %phi.src1, %phi.src2<br>
+/// %11 = select i1 %10, i32 -1, i32 1<br>
+/// br label %endblock<br>
+/// loadbb1: ; preds = %loadbb<br>
+/// %12 = bitcast i32* %buffer2 to i8*<br>
+/// %13 = bitcast i32* %buffer1 to i8*<br>
+/// %14 = bitcast i8* %13 to i32*<br>
+/// %15 = bitcast i8* %12 to i32*<br>
+/// %16 = getelementptr i32, i32* %14, i32 2<br>
+/// %17 = getelementptr i32, i32* %15, i32 2<br>
+/// %18 = load i32, i32* %16<br>
+/// %19 = load i32, i32* %17<br>
+/// %20 = call i32 @llvm.bswap.i32(i32 %18)<br>
+/// %21 = call i32 @llvm.bswap.i32(i32 %19)<br>
+/// %22 = zext i32 %20 to i64<br>
+/// %23 = zext i32 %21 to i64<br>
+/// %24 = sub i64 %22, %23<br>
+/// %25 = icmp ne i64 %24, 0<br>
+/// br i1 %25, label %res_block, label %loadbb2<br>
+/// loadbb2: ; preds = %loadbb1<br>
+/// %26 = bitcast i32* %buffer2 to i8*<br>
+/// %27 = bitcast i32* %buffer1 to i8*<br>
+/// %28 = bitcast i8* %27 to i16*<br>
+/// %29 = bitcast i8* %26 to i16*<br>
+/// %30 = getelementptr i16, i16* %28, i16 6<br>
+/// %31 = getelementptr i16, i16* %29, i16 6<br>
+/// %32 = load i16, i16* %30<br>
+/// %33 = load i16, i16* %31<br>
+/// %34 = call i16 @llvm.bswap.i16(i16 %32)<br>
+/// %35 = call i16 @llvm.bswap.i16(i16 %33)<br>
+/// %36 = zext i16 %34 to i64<br>
+/// %37 = zext i16 %35 to i64<br>
+/// %38 = sub i64 %36, %37<br>
+/// %39 = icmp ne i64 %38, 0<br>
+/// br i1 %39, label %res_block, label %loadbb3<br>
+/// loadbb3: ; preds = %loadbb2<br>
+/// %40 = bitcast i32* %buffer2 to i8*<br>
+/// %41 = bitcast i32* %buffer1 to i8*<br>
+/// %42 = getelementptr i8, i8* %41, i8 14<br>
+/// %43 = getelementptr i8, i8* %40, i8 14<br>
+/// %44 = load i8, i8* %42<br>
+/// %45 = load i8, i8* %43<br>
+/// %46 = zext i8 %44 to i32<br>
+/// %47 = zext i8 %45 to i32<br>
+/// %48 = sub i32 %46, %47<br>
+/// br label %endblock<br>
+/// endblock: ; preds = %res_block,<br>
+/// %loadbb3<br>
+/// %phi.res = phi i32 [ %48, %loadbb3 ], [ %11, %res_block ]<br>
+/// ret i32 %phi.res<br>
+static bool expandMemCmp(CallInst *CI, const TargetTransformInfo *TTI,<br>
+ const DataLayout *DL, DominatorTree *DT) {<br>
+ NumMemCmpCalls++;<br>
+<br>
+ // Early exit from expansion if -Oz.<br>
+ if (CI->getFunction()->hasMinSize())<br>
+ return false;<br>
+<br>
+ // Early exit from expansion if size is not a constant.<br>
+ ConstantInt *SizeCast = dyn_cast<ConstantInt>(CI->getArgOperand(2));<br>
+ if (!SizeCast) {<br>
+ NumMemCmpNotConstant++;<br>
+ return false;<br>
+ }<br>
+ const uint64_t SizeVal = SizeCast->getZExtValue();<br>
+<br>
+ if (SizeVal == 0) {<br>
+ return false;<br>
+ }<br>
+ // TTI call to check if target would like to expand memcmp. Also, get the<br>
+ // available load sizes.<br>
+ const bool IsUsedForZeroCmp = isOnlyUsedInZeroEqualityComparison(CI);<br>
+ auto Options = TTI->enableMemCmpExpansion(CI->getFunction()->hasOptSize(),<br>
+ IsUsedForZeroCmp);<br>
+ if (!Options)<br>
+ return false;<br>
+<br>
+ if (MemCmpEqZeroNumLoadsPerBlock.getNumOccurrences())<br>
+ Options.NumLoadsPerBlock = MemCmpEqZeroNumLoadsPerBlock;<br>
+<br>
+ if (CI->getFunction()->hasOptSize() &&<br>
+ MaxLoadsPerMemcmpOptSize.getNumOccurrences())<br>
+ Options.MaxNumLoads = MaxLoadsPerMemcmpOptSize;<br>
+<br>
+ if (!CI->getFunction()->hasOptSize() && MaxLoadsPerMemcmp.getNumOccurrences())<br>
+ Options.MaxNumLoads = MaxLoadsPerMemcmp;<br>
+<br>
+ MemCmpExpansion Expansion(CI, SizeVal, Options, IsUsedForZeroCmp, *DL, DT);<br>
+<br>
+ // Don't expand if this will require more loads than desired by the target.<br>
+ if (Expansion.getNumLoads() == 0) {<br>
+ NumMemCmpGreaterThanMax++;<br>
+ return false;<br>
+ }<br>
+<br>
+ NumMemCmpInlined++;<br>
+<br>
+ Value *Res = Expansion.getMemCmpExpansion();<br>
+<br>
+ // Replace call with result of expansion and erase call.<br>
+ CI->replaceAllUsesWith(Res);<br>
+ CI->eraseFromParent();<br>
+<br>
+ return true;<br>
+}<br>
+<br>
+class ExpandMemCmpPass : public FunctionPass {<br>
+public:<br>
+ static char ID;<br>
+<br>
+ ExpandMemCmpPass() : FunctionPass(ID) {<br>
+ initializeExpandMemCmpPassPass(*PassRegistry::getPassRegistry());<br>
+ }<br>
+<br>
+ bool runOnFunction(Function &F) override {<br>
+ if (skipFunction(F))<br>
+ return false;<br>
+<br>
+ const TargetLibraryInfo *TLI =<br>
+ &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);<br>
+ const TargetTransformInfo *TTI =<br>
+ &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);<br>
+ // ExpandMemCmp does not need the DominatorTree, but we update it if it's<br>
+ // already available.<br>
+ auto *DTWP = getAnalysisIfAvailable<DominatorTreeWrapperPass>();<br>
+ auto PA = runImpl(F, TLI, TTI, DTWP ? &DTWP->getDomTree() : nullptr);<br>
+ return !PA.areAllPreserved();<br>
+ }<br>
+<br>
+private:<br>
+ void getAnalysisUsage(AnalysisUsage &AU) const override {<br>
+ AU.addRequired<TargetLibraryInfoWrapperPass>();<br>
+ AU.addRequired<TargetTransformInfoWrapperPass>();<br>
+ AU.addUsedIfAvailable<DominatorTreeWrapperPass>();<br>
+ AU.addPreserved<GlobalsAAWrapperPass>();<br>
+ AU.addPreserved<DominatorTreeWrapperPass>();<br>
+ FunctionPass::getAnalysisUsage(AU);<br>
+ }<br>
+<br>
+ PreservedAnalyses runImpl(Function &F, const TargetLibraryInfo *TLI,<br>
+ const TargetTransformInfo *TTI, DominatorTree *DT);<br>
+ // Returns true if a change was made.<br>
+ bool runOnBlock(BasicBlock &BB, const TargetLibraryInfo *TLI,<br>
+ const TargetTransformInfo *TTI, const DataLayout &DL,<br>
+ DominatorTree *DT);<br>
+};<br>
+<br>
+bool ExpandMemCmpPass::runOnBlock(BasicBlock &BB, const TargetLibraryInfo *TLI,<br>
+ const TargetTransformInfo *TTI,<br>
+ const DataLayout &DL, DominatorTree *DT) {<br>
+ for (Instruction &I : BB) {<br>
+ CallInst *CI = dyn_cast<CallInst>(&I);<br>
+ if (!CI) {<br>
+ continue;<br>
+ }<br>
+ LibFunc Func;<br>
+ if (TLI->getLibFunc(ImmutableCallSite(CI), Func) &&<br>
+ (Func == LibFunc_memcmp || Func == LibFunc_bcmp) &&<br>
+ expandMemCmp(CI, TTI, &DL, DT)) {<br>
+ return true;<br>
+ }<br>
+ }<br>
+ return false;<br>
+}<br>
+<br>
+PreservedAnalyses ExpandMemCmpPass::runImpl(Function &F,<br>
+ const TargetLibraryInfo *TLI,<br>
+ const TargetTransformInfo *TTI,<br>
+ DominatorTree *DT) {<br>
+ const DataLayout &DL = F.getParent()->getDataLayout();<br>
+ bool MadeChanges = false;<br>
+ for (auto BBIt = F.begin(); BBIt != F.end();) {<br>
+ if (runOnBlock(*BBIt, TLI, TTI, DL, DT)) {<br>
+ MadeChanges = true;<br>
+ // If changes were made, restart the function from the beginning, since<br>
+ // the structure of the function was changed.<br>
+ BBIt = F.begin();<br>
+ } else {<br>
+ ++BBIt;<br>
+ }<br>
+ }<br>
+ if (!MadeChanges)<br>
+ return PreservedAnalyses::all();<br>
+ PreservedAnalyses PA;<br>
+ PA.preserve<GlobalsAA>();<br>
+ PA.preserve<DominatorTreeAnalysis>();<br>
+ return PA;<br>
+}<br>
+<br>
+} // namespace<br>
+<br>
+char ExpandMemCmpPass::ID = 0;<br>
+INITIALIZE_PASS_BEGIN(ExpandMemCmpPass, "expandmemcmp",<br>
+ "Expand memcmp() to load/stores", false, false)<br>
+INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfoWrapperPass)<br>
+INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)<br>
+INITIALIZE_PASS_END(ExpandMemCmpPass, "expandmemcmp",<br>
+ "Expand memcmp() to load/stores", false, false)<br>
+<br>
+Pass *llvm::createExpandMemCmpPass() { return new ExpandMemCmpPass(); }<br>
<br>
Modified: llvm/trunk/lib/Transforms/Scalar/MergeICmps.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MergeICmps.cpp?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MergeICmps.cpp?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Transforms/Scalar/MergeICmps.cpp (original)<br>
+++ llvm/trunk/lib/Transforms/Scalar/MergeICmps.cpp Tue Sep 10 02:18:00 2019<br>
@@ -866,7 +866,7 @@ static bool runImpl(Function &F, const T<br>
<br>
// We only try merging comparisons if the target wants to expand memcmp later.<br>
// The rationale is to avoid turning small chains into memcmp calls.<br>
- if (!TTI.enableMemCmpExpansion(F.hasOptSize(), true))<br>
+ if (!TTI.enableMemCmpExpansion(F.hasOptSize(), /*IsZeroCmp*/ true))<br>
return false;<br>
<br>
// If we don't have memcmp avaiable we can't emit calls to it.<br>
<br>
Modified: llvm/trunk/lib/Transforms/Scalar/Scalar.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Scalar.cpp?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Scalar.cpp?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Transforms/Scalar/Scalar.cpp (original)<br>
+++ llvm/trunk/lib/Transforms/Scalar/Scalar.cpp Tue Sep 10 02:18:00 2019<br>
@@ -84,6 +84,7 @@ void llvm::initializeScalarOpts(PassRegi<br>
initializeLowerWidenableConditionLegacyPassPass(Registry);<br>
initializeMemCpyOptLegacyPassPass(Registry);<br>
initializeMergeICmpsLegacyPassPass(Registry);<br>
+ initializeExpandMemCmpPassPass(Registry);<br>
initializeMergedLoadStoreMotionLegacyPassPass(Registry);<br>
initializeNaryReassociateLegacyPassPass(Registry);<br>
initializePartiallyInlineLibCallsLegacyPassPass(Registry);<br>
<br>
Modified: llvm/trunk/test/CodeGen/AArch64/O3-pipeline.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/O3-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/O3-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/AArch64/O3-pipeline.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AArch64/O3-pipeline.ll Tue Sep 10 02:18:00 2019<br>
@@ -32,10 +32,6 @@<br>
; CHECK-NEXT: Loop Pass Manager<br>
; CHECK-NEXT: Induction Variable Users<br>
; CHECK-NEXT: Loop Strength Reduction<br>
-; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)<br>
-; CHECK-NEXT: Function Alias Analysis Results<br>
-; CHECK-NEXT: Merge contiguous icmps into a memcmp<br>
-; CHECK-NEXT: Expand memcmp() to load/stores<br>
; CHECK-NEXT: Lower Garbage Collection Instructions<br>
; CHECK-NEXT: Shadow Stack GC Lowering<br>
; CHECK-NEXT: Remove unreachable blocks from the CFG<br>
<br>
Removed: llvm/trunk/test/CodeGen/AArch64/bcmp-inline-small.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/bcmp-inline-small.ll?rev=371501&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/bcmp-inline-small.ll?rev=371501&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/AArch64/bcmp-inline-small.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AArch64/bcmp-inline-small.ll (removed)<br>
@@ -1,44 +0,0 @@<br>
-; RUN: llc -O2 < %s -mtriple=aarch64-linux-gnu | FileCheck %s --check-prefixes=CHECK,CHECKN<br>
-; RUN: llc -O2 < %s -mtriple=aarch64-linux-gnu -mattr=strict-align | FileCheck %s --check-prefixes=CHECK,CHECKS<br>
-<br>
-declare i32 @bcmp(i8*, i8*, i64) nounwind readonly<br>
-declare i32 @memcmp(i8*, i8*, i64) nounwind readonly<br>
-<br>
-define i1 @bcmp_b2(i8* %s1, i8* %s2) {<br>
-entry:<br>
- %bcmp = call i32 @bcmp(i8* %s1, i8* %s2, i64 15)<br>
- %ret = icmp eq i32 %bcmp, 0<br>
- ret i1 %ret<br>
-<br>
-; CHECK-LABEL: bcmp_b2:<br>
-; CHECK-NOT: bl bcmp<br>
-; CHECKN: ldr x<br>
-; CHECKN-NEXT: ldr x<br>
-; CHECKN-NEXT: ldur x<br>
-; CHECKN-NEXT: ldur x<br>
-; CHECKS: ldr x<br>
-; CHECKS-NEXT: ldr x<br>
-; CHECKS-NEXT: ldr w<br>
-; CHECKS-NEXT: ldr w<br>
-; CHECKS-NEXT: ldrh w<br>
-; CHECKS-NEXT: ldrh w<br>
-; CHECKS-NEXT: ldrb w<br>
-; CHECKS-NEXT: ldrb w<br>
-}<br>
-<br>
-define i1 @bcmp_bs(i8* %s1, i8* %s2) optsize {<br>
-entry:<br>
- %memcmp = call i32 @memcmp(i8* %s1, i8* %s2, i64 31)<br>
- %ret = icmp eq i32 %memcmp, 0<br>
- ret i1 %ret<br>
-<br>
-; CHECK-LABEL: bcmp_bs:<br>
-; CHECKN-NOT: bl memcmp<br>
-; CHECKN: ldp x<br>
-; CHECKN-NEXT: ldp x<br>
-; CHECKN-NEXT: ldr x<br>
-; CHECKN-NEXT: ldr x<br>
-; CHECKN-NEXT: ldur x<br>
-; CHECKN-NEXT: ldur x<br>
-; CHECKS: bl memcmp<br>
-}<br>
<br>
Modified: llvm/trunk/test/CodeGen/ARM/O3-pipeline.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/O3-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/O3-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/ARM/O3-pipeline.ll (original)<br>
+++ llvm/trunk/test/CodeGen/ARM/O3-pipeline.ll Tue Sep 10 02:18:00 2019<br>
@@ -16,10 +16,6 @@<br>
; CHECK-NEXT: Loop Pass Manager<br>
; CHECK-NEXT: Induction Variable Users<br>
; CHECK-NEXT: Loop Strength Reduction<br>
-; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)<br>
-; CHECK-NEXT: Function Alias Analysis Results<br>
-; CHECK-NEXT: Merge contiguous icmps into a memcmp<br>
-; CHECK-NEXT: Expand memcmp() to load/stores<br>
; CHECK-NEXT: Lower Garbage Collection Instructions<br>
; CHECK-NEXT: Shadow Stack GC Lowering<br>
; CHECK-NEXT: Remove unreachable blocks from the CFG<br>
<br>
Modified: llvm/trunk/test/CodeGen/Generic/llc-start-stop.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/llc-start-stop.ll?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/llc-start-stop.ll?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/Generic/llc-start-stop.ll (original)<br>
+++ llvm/trunk/test/CodeGen/Generic/llc-start-stop.ll Tue Sep 10 02:18:00 2019<br>
@@ -13,15 +13,15 @@<br>
; STOP-BEFORE-NOT: Loop Strength Reduction<br>
<br>
; RUN: llc < %s -debug-pass=Structure -start-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=START-AFTER<br>
-; START-AFTER: -aa -mergeicmps<br>
+; START-AFTER: -gc-lowering<br>
; START-AFTER: FunctionPass Manager<br>
-; START-AFTER-NEXT: Dominator Tree Construction<br>
+; START-AFTER-NEXT: Lower Garbage Collection Instructions<br>
<br>
; RUN: llc < %s -debug-pass=Structure -start-before=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=START-BEFORE<br>
; START-BEFORE: -machine-branch-prob -domtree<br>
; START-BEFORE: FunctionPass Manager<br>
; START-BEFORE: Loop Strength Reduction<br>
-; START-BEFORE-NEXT: Basic Alias Analysis (stateless AA impl)<br>
+; START-BEFORE-NEXT: Lower Garbage Collection Instructions<br>
<br>
; RUN: not llc < %s -start-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-BEFORE<br>
; RUN: not llc < %s -stop-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-BEFORE<br>
<br>
Removed: llvm/trunk/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll?rev=371501&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll?rev=371501&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll (original)<br>
+++ llvm/trunk/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll (removed)<br>
@@ -1,218 +0,0 @@<br>
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py<br>
-; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs -mcpu=pwr8 < %s | FileCheck %s<br>
-target datalayout = "e-m:e-i64:64-n32:64"<br>
-target triple = "powerpc64le-unknown-linux-gnu"<br>
-<br>
-@zeroEqualityTest01.buffer1 = private unnamed_addr constant [3 x i32] [i32 1, i32 2, i32 4], align 4<br>
-@zeroEqualityTest01.buffer2 = private unnamed_addr constant [3 x i32] [i32 1, i32 2, i32 3], align 4<br>
-@zeroEqualityTest02.buffer1 = private unnamed_addr constant [4 x i32] [i32 4, i32 0, i32 0, i32 0], align 4<br>
-@zeroEqualityTest02.buffer2 = private unnamed_addr constant [4 x i32] [i32 3, i32 0, i32 0, i32 0], align 4<br>
-@zeroEqualityTest03.buffer1 = private unnamed_addr constant [4 x i32] [i32 0, i32 0, i32 0, i32 3], align 4<br>
-@zeroEqualityTest03.buffer2 = private unnamed_addr constant [4 x i32] [i32 0, i32 0, i32 0, i32 4], align 4<br>
-@zeroEqualityTest04.buffer1 = private unnamed_addr constant [15 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14], align 4<br>
-@zeroEqualityTest04.buffer2 = private unnamed_addr constant [15 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 13], align 4<br>
-<br>
-declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1<br>
-<br>
-; Check 4 bytes - requires 1 load for each param.<br>
-define signext i32 @zeroEqualityTest02(i8* %x, i8* %y) {<br>
-; CHECK-LABEL: zeroEqualityTest02:<br>
-; CHECK: # %bb.0:<br>
-; CHECK-NEXT: lwz 3, 0(3)<br>
-; CHECK-NEXT: lwz 4, 0(4)<br>
-; CHECK-NEXT: xor 3, 3, 4<br>
-; CHECK-NEXT: cntlzw 3, 3<br>
-; CHECK-NEXT: srwi 3, 3, 5<br>
-; CHECK-NEXT: xori 3, 3, 1<br>
-; CHECK-NEXT: blr<br>
- %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 4)<br>
- %not.cmp = icmp ne i32 %call, 0<br>
- %. = zext i1 %not.cmp to i32<br>
- ret i32 %.<br>
-}<br>
-<br>
-; Check 16 bytes - requires 2 loads for each param (or use vectors?).<br>
-define signext i32 @zeroEqualityTest01(i8* %x, i8* %y) {<br>
-; CHECK-LABEL: zeroEqualityTest01:<br>
-; CHECK: # %bb.0:<br>
-; CHECK-NEXT: ld 5, 0(3)<br>
-; CHECK-NEXT: ld 6, 0(4)<br>
-; CHECK-NEXT: cmpld 5, 6<br>
-; CHECK-NEXT: bne 0, .LBB1_2<br>
-; CHECK-NEXT: # %bb.1: # %loadbb1<br>
-; CHECK-NEXT: ld 3, 8(3)<br>
-; CHECK-NEXT: ld 4, 8(4)<br>
-; CHECK-NEXT: cmpld 3, 4<br>
-; CHECK-NEXT: li 3, 0<br>
-; CHECK-NEXT: beq 0, .LBB1_3<br>
-; CHECK-NEXT: .LBB1_2: # %res_block<br>
-; CHECK-NEXT: li 3, 1<br>
-; CHECK-NEXT: .LBB1_3: # %endblock<br>
-; CHECK-NEXT: clrldi 3, 3, 32<br>
-; CHECK-NEXT: blr<br>
- %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 16)<br>
- %not.tobool = icmp ne i32 %call, 0<br>
- %. = zext i1 %not.tobool to i32<br>
- ret i32 %.<br>
-}<br>
-<br>
-; Check 7 bytes - requires 3 loads for each param.<br>
-define signext i32 @zeroEqualityTest03(i8* %x, i8* %y) {<br>
-; CHECK-LABEL: zeroEqualityTest03:<br>
-; CHECK: # %bb.0:<br>
-; CHECK-NEXT: lwz 5, 0(3)<br>
-; CHECK-NEXT: lwz 6, 0(4)<br>
-; CHECK-NEXT: cmplw 5, 6<br>
-; CHECK-NEXT: bne 0, .LBB2_3<br>
-; CHECK-NEXT: # %bb.1: # %loadbb1<br>
-; CHECK-NEXT: lhz 5, 4(3)<br>
-; CHECK-NEXT: lhz 6, 4(4)<br>
-; CHECK-NEXT: cmplw 5, 6<br>
-; CHECK-NEXT: bne 0, .LBB2_3<br>
-; CHECK-NEXT: # %bb.2: # %loadbb2<br>
-; CHECK-NEXT: lbz 3, 6(3)<br>
-; CHECK-NEXT: lbz 4, 6(4)<br>
-; CHECK-NEXT: cmplw 3, 4<br>
-; CHECK-NEXT: li 3, 0<br>
-; CHECK-NEXT: beq 0, .LBB2_4<br>
-; CHECK-NEXT: .LBB2_3: # %res_block<br>
-; CHECK-NEXT: li 3, 1<br>
-; CHECK-NEXT: .LBB2_4: # %endblock<br>
-; CHECK-NEXT: clrldi 3, 3, 32<br>
-; CHECK-NEXT: blr<br>
- %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 7)<br>
- %not.lnot = icmp ne i32 %call, 0<br>
- %cond = zext i1 %not.lnot to i32<br>
- ret i32 %cond<br>
-}<br>
-<br>
-; Validate with > 0<br>
-define signext i32 @zeroEqualityTest04() {<br>
-; CHECK-LABEL: zeroEqualityTest04:<br>
-; CHECK: # %bb.0:<br>
-; CHECK-NEXT: addis 3, 2, .LzeroEqualityTest02.buffer1@toc@ha<br>
-; CHECK-NEXT: addis 4, 2, .LzeroEqualityTest02.buffer2@toc@ha<br>
-; CHECK-NEXT: addi 6, 3, .LzeroEqualityTest02.buffer1@toc@l<br>
-; CHECK-NEXT: addi 5, 4, .LzeroEqualityTest02.buffer2@toc@l<br>
-; CHECK-NEXT: ldbrx 3, 0, 6<br>
-; CHECK-NEXT: ldbrx 4, 0, 5<br>
-; CHECK-NEXT: cmpld 3, 4<br>
-; CHECK-NEXT: bne 0, .LBB3_2<br>
-; CHECK-NEXT: # %bb.1: # %loadbb1<br>
-; CHECK-NEXT: li 4, 8<br>
-; CHECK-NEXT: ldbrx 3, 6, 4<br>
-; CHECK-NEXT: ldbrx 4, 5, 4<br>
-; CHECK-NEXT: li 5, 0<br>
-; CHECK-NEXT: cmpld 3, 4<br>
-; CHECK-NEXT: beq 0, .LBB3_3<br>
-; CHECK-NEXT: .LBB3_2: # %res_block<br>
-; CHECK-NEXT: cmpld 3, 4<br>
-; CHECK-NEXT: li 3, 1<br>
-; CHECK-NEXT: li 4, -1<br>
-; CHECK-NEXT: isel 5, 4, 3, 0<br>
-; CHECK-NEXT: .LBB3_3: # %endblock<br>
-; CHECK-NEXT: extsw 3, 5<br>
-; CHECK-NEXT: neg 3, 3<br>
-; CHECK-NEXT: rldicl 3, 3, 1, 63<br>
-; CHECK-NEXT: xori 3, 3, 1<br>
-; CHECK-NEXT: blr<br>
- %call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer2 to i8*), i64 16)<br>
- %not.cmp = icmp slt i32 %call, 1<br>
- %. = zext i1 %not.cmp to i32<br>
- ret i32 %.<br>
-}<br>
-<br>
-; Validate with < 0<br>
-define signext i32 @zeroEqualityTest05() {<br>
-; CHECK-LABEL: zeroEqualityTest05:<br>
-; CHECK: # %bb.0:<br>
-; CHECK-NEXT: addis 3, 2, .LzeroEqualityTest03.buffer1@toc@ha<br>
-; CHECK-NEXT: addis 4, 2, .LzeroEqualityTest03.buffer2@toc@ha<br>
-; CHECK-NEXT: addi 6, 3, .LzeroEqualityTest03.buffer1@toc@l<br>
-; CHECK-NEXT: addi 5, 4, .LzeroEqualityTest03.buffer2@toc@l<br>
-; CHECK-NEXT: ldbrx 3, 0, 6<br>
-; CHECK-NEXT: ldbrx 4, 0, 5<br>
-; CHECK-NEXT: cmpld 3, 4<br>
-; CHECK-NEXT: bne 0, .LBB4_2<br>
-; CHECK-NEXT: # %bb.1: # %loadbb1<br>
-; CHECK-NEXT: li 4, 8<br>
-; CHECK-NEXT: ldbrx 3, 6, 4<br>
-; CHECK-NEXT: ldbrx 4, 5, 4<br>
-; CHECK-NEXT: li 5, 0<br>
-; CHECK-NEXT: cmpld 3, 4<br>
-; CHECK-NEXT: beq 0, .LBB4_3<br>
-; CHECK-NEXT: .LBB4_2: # %res_block<br>
-; CHECK-NEXT: cmpld 3, 4<br>
-; CHECK-NEXT: li 3, 1<br>
-; CHECK-NEXT: li 4, -1<br>
-; CHECK-NEXT: isel 5, 4, 3, 0<br>
-; CHECK-NEXT: .LBB4_3: # %endblock<br>
-; CHECK-NEXT: nor 3, 5, 5<br>
-; CHECK-NEXT: rlwinm 3, 3, 1, 31, 31<br>
-; CHECK-NEXT: blr<br>
- %call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer2 to i8*), i64 16)<br>
- %call.lobit = lshr i32 %call, 31<br>
- %call.lobit.not = xor i32 %call.lobit, 1<br>
- ret i32 %call.lobit.not<br>
-}<br>
-<br>
-; Validate with memcmp()?:<br>
-define signext i32 @equalityFoldTwoConstants() {<br>
-; CHECK-LABEL: equalityFoldTwoConstants:<br>
-; CHECK: # %bb.0: # %loadbb<br>
-; CHECK-NEXT: li 3, 1<br>
-; CHECK-NEXT: blr<br>
- %call = tail call signext i32 @memcmp(i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer1 to i8*), i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer2 to i8*), i64 16)<br>
- %not.tobool = icmp eq i32 %call, 0<br>
- %cond = zext i1 %not.tobool to i32<br>
- ret i32 %cond<br>
-}<br>
-<br>
-define signext i32 @equalityFoldOneConstant(i8* %X) {<br>
-; CHECK-LABEL: equalityFoldOneConstant:<br>
-; CHECK: # %bb.0:<br>
-; CHECK-NEXT: ld 4, 0(3)<br>
-; CHECK-NEXT: li 5, 1<br>
-; CHECK-NEXT: sldi 5, 5, 32<br>
-; CHECK-NEXT: cmpld 4, 5<br>
-; CHECK-NEXT: bne 0, .LBB6_2<br>
-; CHECK-NEXT: # %bb.1: # %loadbb1<br>
-; CHECK-NEXT: li 4, 3<br>
-; CHECK-NEXT: ld 3, 8(3)<br>
-; CHECK-NEXT: sldi 4, 4, 32<br>
-; CHECK-NEXT: ori 4, 4, 2<br>
-; CHECK-NEXT: cmpld 3, 4<br>
-; CHECK-NEXT: li 3, 0<br>
-; CHECK-NEXT: beq 0, .LBB6_3<br>
-; CHECK-NEXT: .LBB6_2: # %res_block<br>
-; CHECK-NEXT: li 3, 1<br>
-; CHECK-NEXT: .LBB6_3: # %endblock<br>
-; CHECK-NEXT: cntlzw 3, 3<br>
-; CHECK-NEXT: srwi 3, 3, 5<br>
-; CHECK-NEXT: blr<br>
- %call = tail call signext i32 @memcmp(i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer1 to i8*), i8* %X, i64 16)<br>
- %not.tobool = icmp eq i32 %call, 0<br>
- %cond = zext i1 %not.tobool to i32<br>
- ret i32 %cond<br>
-}<br>
-<br>
-define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind {<br>
-; CHECK-LABEL: length2_eq_nobuiltin_attr:<br>
-; CHECK: # %bb.0:<br>
-; CHECK-NEXT: mflr 0<br>
-; CHECK-NEXT: std 0, 16(1)<br>
-; CHECK-NEXT: stdu 1, -32(1)<br>
-; CHECK-NEXT: li 5, 2<br>
-; CHECK-NEXT: bl memcmp<br>
-; CHECK-NEXT: nop<br>
-; CHECK-NEXT: cntlzw 3, 3<br>
-; CHECK-NEXT: rlwinm 3, 3, 27, 31, 31<br>
-; CHECK-NEXT: addi 1, 1, 32<br>
-; CHECK-NEXT: ld 0, 16(1)<br>
-; CHECK-NEXT: mtlr 0<br>
-; CHECK-NEXT: blr<br>
- %m = tail call signext i32 @memcmp(i8* %X, i8* %Y, i64 2) nobuiltin<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
<br>
Removed: llvm/trunk/test/CodeGen/PowerPC/memcmp-mergeexpand.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/memcmp-mergeexpand.ll?rev=371501&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/memcmp-mergeexpand.ll?rev=371501&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/PowerPC/memcmp-mergeexpand.ll (original)<br>
+++ llvm/trunk/test/CodeGen/PowerPC/memcmp-mergeexpand.ll (removed)<br>
@@ -1,40 +0,0 @@<br>
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py<br>
-; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux < %s | FileCheck %s -check-prefix=PPC64LE<br>
-<br>
-; This tests interaction between MergeICmp and ExpandMemCmp.<br>
-<br>
-%"struct.std::pair" = type { i32, i32 }<br>
-<br>
-define zeroext i1 @opeq1(<br>
-; PPC64LE-LABEL: opeq1:<br>
-; PPC64LE: # %bb.0: # %"entry+land.rhs.i"<br>
-; PPC64LE-NEXT: ld 3, 0(3)<br>
-; PPC64LE-NEXT: ld 4, 0(4)<br>
-; PPC64LE-NEXT: xor 3, 3, 4<br>
-; PPC64LE-NEXT: cntlzd 3, 3<br>
-; PPC64LE-NEXT: rldicl 3, 3, 58, 63<br>
-; PPC64LE-NEXT: blr<br>
- %"struct.std::pair"* nocapture readonly dereferenceable(8) %a,<br>
- %"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 {<br>
-entry:<br>
- %first.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 0<br>
- %0 = load i32, i32* %first.i, align 4<br>
- %first1.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 0<br>
- %1 = load i32, i32* %first1.i, align 4<br>
- %cmp.i = icmp eq i32 %0, %1<br>
- br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit<br>
-<br>
-land.rhs.i:<br>
- %second.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 1<br>
- %2 = load i32, i32* %second.i, align 4<br>
- %second2.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 1<br>
- %3 = load i32, i32* %second2.i, align 4<br>
- %cmp3.i = icmp eq i32 %2, %3<br>
- br label %opeq1.exit<br>
-<br>
-opeq1.exit:<br>
- %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ]<br>
- ret i1 %4<br>
-}<br>
-<br>
-<br>
<br>
Removed: llvm/trunk/test/CodeGen/PowerPC/memcmp.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/memcmp.ll?rev=371501&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/memcmp.ll?rev=371501&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/PowerPC/memcmp.ll (original)<br>
+++ llvm/trunk/test/CodeGen/PowerPC/memcmp.ll (removed)<br>
@@ -1,70 +0,0 @@<br>
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py<br>
-; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux < %s | FileCheck %s -check-prefix=CHECK<br>
-<br>
-define signext i32 @memcmp8(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
-; CHECK-LABEL: memcmp8:<br>
-; CHECK: # %bb.0:<br>
-; CHECK-NEXT: ldbrx 3, 0, 3<br>
-; CHECK-NEXT: ldbrx 4, 0, 4<br>
-; CHECK-NEXT: subfc 5, 3, 4<br>
-; CHECK-NEXT: subfe 5, 4, 4<br>
-; CHECK-NEXT: subfc 4, 4, 3<br>
-; CHECK-NEXT: subfe 3, 3, 3<br>
-; CHECK-NEXT: neg 4, 5<br>
-; CHECK-NEXT: neg 3, 3<br>
-; CHECK-NEXT: subf 3, 3, 4<br>
-; CHECK-NEXT: extsw 3, 3<br>
-; CHECK-NEXT: blr<br>
- %t0 = bitcast i32* %buffer1 to i8*<br>
- %t1 = bitcast i32* %buffer2 to i8*<br>
- %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 8)<br>
- ret i32 %call<br>
-}<br>
-<br>
-define signext i32 @memcmp4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
-; CHECK-LABEL: memcmp4:<br>
-; CHECK: # %bb.0:<br>
-; CHECK-NEXT: lwbrx 3, 0, 3<br>
-; CHECK-NEXT: lwbrx 4, 0, 4<br>
-; CHECK-NEXT: sub 5, 4, 3<br>
-; CHECK-NEXT: sub 3, 3, 4<br>
-; CHECK-NEXT: rldicl 4, 5, 1, 63<br>
-; CHECK-NEXT: rldicl 3, 3, 1, 63<br>
-; CHECK-NEXT: subf 3, 3, 4<br>
-; CHECK-NEXT: extsw 3, 3<br>
-; CHECK-NEXT: blr<br>
- %t0 = bitcast i32* %buffer1 to i8*<br>
- %t1 = bitcast i32* %buffer2 to i8*<br>
- %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 4)<br>
- ret i32 %call<br>
-}<br>
-<br>
-define signext i32 @memcmp2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
-; CHECK-LABEL: memcmp2:<br>
-; CHECK: # %bb.0:<br>
-; CHECK-NEXT: lhbrx 3, 0, 3<br>
-; CHECK-NEXT: lhbrx 4, 0, 4<br>
-; CHECK-NEXT: subf 3, 4, 3<br>
-; CHECK-NEXT: extsw 3, 3<br>
-; CHECK-NEXT: blr<br>
- %t0 = bitcast i32* %buffer1 to i8*<br>
- %t1 = bitcast i32* %buffer2 to i8*<br>
- %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 2)<br>
- ret i32 %call<br>
-}<br>
-<br>
-define signext i32 @memcmp1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
-; CHECK-LABEL: memcmp1:<br>
-; CHECK: # %bb.0:<br>
-; CHECK-NEXT: lbz 3, 0(3)<br>
-; CHECK-NEXT: lbz 4, 0(4)<br>
-; CHECK-NEXT: subf 3, 4, 3<br>
-; CHECK-NEXT: extsw 3, 3<br>
-; CHECK-NEXT: blr<br>
- %t0 = bitcast i32* %buffer1 to i8*<br>
- %t1 = bitcast i32* %buffer2 to i8*<br>
- %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 1) #2<br>
- ret i32 %call<br>
-}<br>
-<br>
-declare signext i32 @memcmp(i8*, i8*, i64)<br>
<br>
Removed: llvm/trunk/test/CodeGen/PowerPC/memcmpIR.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/memcmpIR.ll?rev=371501&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/memcmpIR.ll?rev=371501&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/PowerPC/memcmpIR.ll (original)<br>
+++ llvm/trunk/test/CodeGen/PowerPC/memcmpIR.ll (removed)<br>
@@ -1,192 +0,0 @@<br>
-; RUN: llc -o - -mtriple=powerpc64le-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s<br>
-; RUN: llc -o - -mtriple=powerpc64-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s --check-prefix=CHECK-BE<br>
-<br>
-define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
-entry:<br>
- ; CHECK-LABEL: @test1(<br>
- ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64*<br>
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*<br>
- ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])<br>
- ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])<br>
- ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]]<br>
- ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block<br>
-<br>
- ; CHECK-LABEL: res_block:{{.*}}<br>
- ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64<br>
- ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1<br>
- ; CHECK-NEXT: br label %endblock<br>
-<br>
- ; CHECK-LABEL: loadbb1:{{.*}}<br>
- ; CHECK: [[BCC1:%[0-9]+]] = bitcast i32* {{.*}} to i8*<br>
- ; CHECK-NEXT: [[BCC2:%[0-9]+]] = bitcast i32* {{.*}} to i8*<br>
- ; CHECK-NEXT: [[GEP1:%[0-9]+]] = getelementptr i8, i8* [[BCC2]], i8 8<br>
- ; CHECK-NEXT: [[BCL1:%[0-9]+]] = bitcast i8* [[GEP1]] to i64*<br>
- ; CHECK-NEXT: [[GEP2:%[0-9]+]] = getelementptr i8, i8* [[BCC1]], i8 8<br>
- ; CHECK-NEXT: [[BCL2:%[0-9]+]] = bitcast i8* [[GEP2]] to i64*<br>
- ; CHECK-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[BCL1]]<br>
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[BCL2]]<br>
- ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])<br>
- ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])<br>
- ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]]<br>
- ; CHECK-NEXT: br i1 [[ICMP]], label %endblock, label %res_block<br>
-<br>
- ; CHECK-BE-LABEL: @test1(<br>
- ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64*<br>
- ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*<br>
- ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]]<br>
- ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block<br>
-<br>
- ; CHECK-BE-LABEL: res_block:{{.*}}<br>
- ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64<br>
- ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1<br>
- ; CHECK-BE-NEXT: br label %endblock<br>
-<br>
- ; CHECK-BE-LABEL: loadbb1:{{.*}}<br>
- ; CHECK-BE: [[BCC1:%[0-9]+]] = bitcast i32* {{.*}} to i8*<br>
- ; CHECK-BE-NEXT: [[BCC2:%[0-9]+]] = bitcast i32* {{.*}} to i8*<br>
- ; CHECK-BE-NEXT: [[GEP1:%[0-9]+]] = getelementptr i8, i8* [[BCC2]], i8 8<br>
- ; CHECK-BE-NEXT: [[BCL1:%[0-9]+]] = bitcast i8* [[GEP1]] to i64*<br>
- ; CHECK-BE-NEXT: [[GEP2:%[0-9]+]] = getelementptr i8, i8* [[BCC1]], i8 8<br>
- ; CHECK-BE-NEXT: [[BCL2:%[0-9]+]] = bitcast i8* [[GEP2]] to i64*<br>
- ; CHECK-BE-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[BCL1]]<br>
- ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[BCL2]]<br>
- ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]]<br>
- ; CHECK-BE-NEXT: br i1 [[ICMP]], label %endblock, label %res_block<br>
-<br>
- %0 = bitcast i32* %buffer1 to i8*<br>
- %1 = bitcast i32* %buffer2 to i8*<br>
- %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 16)<br>
- ret i32 %call<br>
-}<br>
-<br>
-declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1<br>
-<br>
-define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
- ; CHECK-LABEL: @test2(<br>
- ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32*<br>
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*<br>
- ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]])<br>
- ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]])<br>
- ; CHECK-NEXT: [[CMP1:%[0-9]+]] = icmp ugt i32 [[BSWAP1]], [[BSWAP2]]<br>
- ; CHECK-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[BSWAP1]], [[BSWAP2]]<br>
- ; CHECK-NEXT: [[Z1:%[0-9]+]] = zext i1 [[CMP1]] to i32<br>
- ; CHECK-NEXT: [[Z2:%[0-9]+]] = zext i1 [[CMP2]] to i32<br>
- ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i32 [[Z1]], [[Z2]]<br>
- ; CHECK-NEXT: ret i32 [[SUB]]<br>
-<br>
- ; CHECK-BE-LABEL: @test2(<br>
- ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32*<br>
- ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*<br>
- ; CHECK-BE-NEXT: [[CMP1:%[0-9]+]] = icmp ugt i32 [[LOAD1]], [[LOAD2]]<br>
- ; CHECK-BE-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[LOAD1]], [[LOAD2]]<br>
- ; CHECK-BE-NEXT: [[Z1:%[0-9]+]] = zext i1 [[CMP1]] to i32<br>
- ; CHECK-BE-NEXT: [[Z2:%[0-9]+]] = zext i1 [[CMP2]] to i32<br>
- ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i32 [[Z1]], [[Z2]]<br>
- ; CHECK-BE-NEXT: ret i32 [[SUB]]<br>
-<br>
-entry:<br>
- %0 = bitcast i32* %buffer1 to i8*<br>
- %1 = bitcast i32* %buffer2 to i8*<br>
- %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4)<br>
- ret i32 %call<br>
-}<br>
-<br>
-define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
- ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64*<br>
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*<br>
- ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])<br>
- ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])<br>
- ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]]<br>
- ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block<br>
-<br>
- ; CHECK-LABEL: res_block:{{.*}}<br>
- ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64<br>
- ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1<br>
- ; CHECK-NEXT: br label %endblock<br>
-<br>
- ; CHECK-LABEL: loadbb1:{{.*}}<br>
- ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32*<br>
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*<br>
- ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]])<br>
- ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]])<br>
- ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[BSWAP1]] to i64<br>
- ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[BSWAP2]] to i64<br>
- ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]<br>
- ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb2, label %res_block<br>
-<br>
- ; CHECK-LABEL: loadbb2:{{.*}}<br>
- ; CHECK: [[LOAD1:%[0-9]+]] = load i16, i16*<br>
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16*<br>
- ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD1]])<br>
- ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD2]])<br>
- ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[BSWAP1]] to i64<br>
- ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[BSWAP2]] to i64<br>
- ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]<br>
- ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb3, label %res_block<br>
-<br>
- ; CHECK-LABEL: loadbb3:{{.*}}<br>
- ; CHECK: [[LOAD1:%[0-9]+]] = load i8, i8*<br>
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8*<br>
- ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32<br>
- ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32<br>
- ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]]<br>
- ; CHECK-NEXT: br label %endblock<br>
-<br>
- ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64*<br>
- ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*<br>
- ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]]<br>
- ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block<br>
-<br>
- ; CHECK-BE-LABEL: res_block:{{.*}}<br>
- ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64<br>
- ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1<br>
- ; CHECK-BE-NEXT: br label %endblock<br>
-<br>
- ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32*<br>
- ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*<br>
- ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[LOAD1]] to i64<br>
- ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[LOAD2]] to i64<br>
- ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]<br>
- ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb2, label %res_block<br>
-<br>
- ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i16, i16*<br>
- ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16*<br>
- ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[LOAD1]] to i64<br>
- ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[LOAD2]] to i64<br>
- ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]<br>
- ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb3, label %res_block<br>
-<br>
- ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i8, i8*<br>
- ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8*<br>
- ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32<br>
- ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32<br>
- ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]]<br>
- ; CHECK-BE-NEXT: br label %endblock<br>
-<br>
-entry:<br>
- %0 = bitcast i32* %buffer1 to i8*<br>
- %1 = bitcast i32* %buffer2 to i8*<br>
- %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 15)<br>
- ret i32 %call<br>
-}<br>
- ; CHECK: call = tail call signext i32 @memcmp<br>
- ; CHECK-BE: call = tail call signext i32 @memcmp<br>
-define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
-<br>
-entry:<br>
- %0 = bitcast i32* %buffer1 to i8*<br>
- %1 = bitcast i32* %buffer2 to i8*<br>
- %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 65)<br>
- ret i32 %call<br>
-}<br>
-<br>
-define signext i32 @test5(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2, i32 signext %SIZE) {<br>
- ; CHECK: call = tail call signext i32 @memcmp<br>
- ; CHECK-BE: call = tail call signext i32 @memcmp<br>
-entry:<br>
- %0 = bitcast i32* %buffer1 to i8*<br>
- %1 = bitcast i32* %buffer2 to i8*<br>
- %conv = sext i32 %SIZE to i64<br>
- %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 %conv)<br>
- ret i32 %call<br>
-}<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/O3-pipeline.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/O3-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/O3-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/O3-pipeline.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/O3-pipeline.ll Tue Sep 10 02:18:00 2019<br>
@@ -29,10 +29,6 @@<br>
; CHECK-NEXT: Loop Pass Manager<br>
; CHECK-NEXT: Induction Variable Users<br>
; CHECK-NEXT: Loop Strength Reduction<br>
-; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)<br>
-; CHECK-NEXT: Function Alias Analysis Results<br>
-; CHECK-NEXT: Merge contiguous icmps into a memcmp<br>
-; CHECK-NEXT: Expand memcmp() to load/stores<br>
; CHECK-NEXT: Lower Garbage Collection Instructions<br>
; CHECK-NEXT: Shadow Stack GC Lowering<br>
; CHECK-NEXT: Remove unreachable blocks from the CFG<br>
<br>
Removed: llvm/trunk/test/CodeGen/X86/memcmp-mergeexpand.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memcmp-mergeexpand.ll?rev=371501&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memcmp-mergeexpand.ll?rev=371501&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/memcmp-mergeexpand.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/memcmp-mergeexpand.ll (removed)<br>
@@ -1,51 +0,0 @@<br>
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py<br>
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86<br>
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64<br>
-<br>
-; This tests interaction between MergeICmp and ExpandMemCmp.<br>
-<br>
-%"struct.std::pair" = type { i32, i32 }<br>
-<br>
-define zeroext i1 @opeq1(<br>
-; X86-LABEL: opeq1:<br>
-; X86: # %bb.0: # %"entry+land.rhs.i"<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %edx<br>
-; X86-NEXT: movl 4(%ecx), %ecx<br>
-; X86-NEXT: xorl (%eax), %edx<br>
-; X86-NEXT: xorl 4(%eax), %ecx<br>
-; X86-NEXT: orl %edx, %ecx<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: opeq1:<br>
-; X64: # %bb.0: # %"entry+land.rhs.i"<br>
-; X64-NEXT: movq (%rdi), %rax<br>
-; X64-NEXT: cmpq (%rsi), %rax<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %"struct.std::pair"* nocapture readonly dereferenceable(8) %a,<br>
- %"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 {<br>
-entry:<br>
- %first.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 0<br>
- %0 = load i32, i32* %first.i, align 4<br>
- %first1.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 0<br>
- %1 = load i32, i32* %first1.i, align 4<br>
- %cmp.i = icmp eq i32 %0, %1<br>
- br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit<br>
-<br>
-land.rhs.i:<br>
- %second.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 1<br>
- %2 = load i32, i32* %second.i, align 4<br>
- %second2.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 1<br>
- %3 = load i32, i32* %second2.i, align 4<br>
- %cmp3.i = icmp eq i32 %2, %3<br>
- br label %opeq1.exit<br>
-<br>
-opeq1.exit:<br>
- %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ]<br>
- ret i1 %4<br>
-}<br>
-<br>
-<br>
<br>
Removed: llvm/trunk/test/CodeGen/X86/memcmp-optsize.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memcmp-optsize.ll?rev=371501&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memcmp-optsize.ll?rev=371501&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/memcmp-optsize.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/memcmp-optsize.ll (removed)<br>
@@ -1,1013 +0,0 @@<br>
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py<br>
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=cmov | FileCheck %s --check-prefix=X86 --check-prefix=X86-NOSSE<br>
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE2<br>
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2<br>
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX2<br>
-<br>
-; This tests codegen time inlining/optimization of memcmp<br>
-; rdar://6480398<br>
-<br>
-@.str = private constant [65 x i8] c"0123456789012345678901234567890123456789012345678901234567890123\00", align 1<br>
-<br>
-declare i32 @memcmp(i8*, i8*, i64)<br>
-declare i32 @bcmp(i8*, i8*, i64)<br>
-<br>
-define i32 @length2(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length2:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movzwl (%ecx), %ecx<br>
-; X86-NEXT: movzwl (%eax), %edx<br>
-; X86-NEXT: rolw $8, %cx<br>
-; X86-NEXT: rolw $8, %dx<br>
-; X86-NEXT: movzwl %cx, %eax<br>
-; X86-NEXT: movzwl %dx, %ecx<br>
-; X86-NEXT: subl %ecx, %eax<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length2:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: movzwl (%rsi), %ecx<br>
-; X64-NEXT: rolw $8, %ax<br>
-; X64-NEXT: rolw $8, %cx<br>
-; X64-NEXT: movzwl %ax, %eax<br>
-; X64-NEXT: movzwl %cx, %ecx<br>
-; X64-NEXT: subl %ecx, %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length2_eq(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length2_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movzwl (%ecx), %ecx<br>
-; X86-NEXT: cmpw (%eax), %cx<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length2_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: cmpw (%rsi), %ax<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length2_eq_const(i8* %X) nounwind optsize {<br>
-; X86-LABEL: length2_eq_const:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movzwl (%eax), %eax<br>
-; X86-NEXT: cmpl $12849, %eax # imm = 0x3231<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length2_eq_const:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: cmpl $12849, %eax # imm = 0x3231<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 2) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length2_eq_nobuiltin_attr:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $2<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length2_eq_nobuiltin_attr:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: pushq %rax<br>
-; X64-NEXT: movl $2, %edx<br>
-; X64-NEXT: callq memcmp<br>
-; X64-NEXT: testl %eax, %eax<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: popq %rcx<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind nobuiltin<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length3(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length3:<br>
-; X86: # %bb.0: # %loadbb<br>
-; X86-NEXT: pushl %esi<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movzwl (%eax), %edx<br>
-; X86-NEXT: movzwl (%ecx), %esi<br>
-; X86-NEXT: rolw $8, %dx<br>
-; X86-NEXT: rolw $8, %si<br>
-; X86-NEXT: cmpw %si, %dx<br>
-; X86-NEXT: jne .LBB4_1<br>
-; X86-NEXT: # %bb.2: # %loadbb1<br>
-; X86-NEXT: movzbl 2(%eax), %eax<br>
-; X86-NEXT: movzbl 2(%ecx), %ecx<br>
-; X86-NEXT: subl %ecx, %eax<br>
-; X86-NEXT: jmp .LBB4_3<br>
-; X86-NEXT: .LBB4_1: # %res_block<br>
-; X86-NEXT: setae %al<br>
-; X86-NEXT: movzbl %al, %eax<br>
-; X86-NEXT: leal -1(%eax,%eax), %eax<br>
-; X86-NEXT: .LBB4_3: # %endblock<br>
-; X86-NEXT: popl %esi<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length3:<br>
-; X64: # %bb.0: # %loadbb<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: movzwl (%rsi), %ecx<br>
-; X64-NEXT: rolw $8, %ax<br>
-; X64-NEXT: rolw $8, %cx<br>
-; X64-NEXT: cmpw %cx, %ax<br>
-; X64-NEXT: jne .LBB4_1<br>
-; X64-NEXT: # %bb.2: # %loadbb1<br>
-; X64-NEXT: movzbl 2(%rdi), %eax<br>
-; X64-NEXT: movzbl 2(%rsi), %ecx<br>
-; X64-NEXT: subl %ecx, %eax<br>
-; X64-NEXT: retq<br>
-; X64-NEXT: .LBB4_1: # %res_block<br>
-; X64-NEXT: setae %al<br>
-; X64-NEXT: movzbl %al, %eax<br>
-; X64-NEXT: leal -1(%rax,%rax), %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length3_eq(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length3_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movzwl (%ecx), %edx<br>
-; X86-NEXT: xorw (%eax), %dx<br>
-; X86-NEXT: movb 2(%ecx), %cl<br>
-; X86-NEXT: xorb 2(%eax), %cl<br>
-; X86-NEXT: movzbl %cl, %eax<br>
-; X86-NEXT: orw %dx, %ax<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length3_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: xorw (%rsi), %ax<br>
-; X64-NEXT: movb 2(%rdi), %cl<br>
-; X64-NEXT: xorb 2(%rsi), %cl<br>
-; X64-NEXT: movzbl %cl, %ecx<br>
-; X64-NEXT: orw %ax, %cx<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length4(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length4:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %ecx<br>
-; X86-NEXT: movl (%eax), %edx<br>
-; X86-NEXT: bswapl %ecx<br>
-; X86-NEXT: bswapl %edx<br>
-; X86-NEXT: xorl %eax, %eax<br>
-; X86-NEXT: cmpl %edx, %ecx<br>
-; X86-NEXT: seta %al<br>
-; X86-NEXT: sbbl $0, %eax<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length4:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl (%rdi), %ecx<br>
-; X64-NEXT: movl (%rsi), %edx<br>
-; X64-NEXT: bswapl %ecx<br>
-; X64-NEXT: bswapl %edx<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpl %edx, %ecx<br>
-; X64-NEXT: seta %al<br>
-; X64-NEXT: sbbl $0, %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length4_eq(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length4_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %ecx<br>
-; X86-NEXT: cmpl (%eax), %ecx<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length4_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl (%rdi), %eax<br>
-; X64-NEXT: cmpl (%rsi), %eax<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length4_eq_const(i8* %X) nounwind optsize {<br>
-; X86-LABEL: length4_eq_const:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: cmpl $875770417, (%eax) # imm = 0x34333231<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length4_eq_const:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: cmpl $875770417, (%rdi) # imm = 0x34333231<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 4) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length5(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length5:<br>
-; X86: # %bb.0: # %loadbb<br>
-; X86-NEXT: pushl %esi<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl (%eax), %edx<br>
-; X86-NEXT: movl (%ecx), %esi<br>
-; X86-NEXT: bswapl %edx<br>
-; X86-NEXT: bswapl %esi<br>
-; X86-NEXT: cmpl %esi, %edx<br>
-; X86-NEXT: jne .LBB9_1<br>
-; X86-NEXT: # %bb.2: # %loadbb1<br>
-; X86-NEXT: movzbl 4(%eax), %eax<br>
-; X86-NEXT: movzbl 4(%ecx), %ecx<br>
-; X86-NEXT: subl %ecx, %eax<br>
-; X86-NEXT: jmp .LBB9_3<br>
-; X86-NEXT: .LBB9_1: # %res_block<br>
-; X86-NEXT: setae %al<br>
-; X86-NEXT: movzbl %al, %eax<br>
-; X86-NEXT: leal -1(%eax,%eax), %eax<br>
-; X86-NEXT: .LBB9_3: # %endblock<br>
-; X86-NEXT: popl %esi<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length5:<br>
-; X64: # %bb.0: # %loadbb<br>
-; X64-NEXT: movl (%rdi), %eax<br>
-; X64-NEXT: movl (%rsi), %ecx<br>
-; X64-NEXT: bswapl %eax<br>
-; X64-NEXT: bswapl %ecx<br>
-; X64-NEXT: cmpl %ecx, %eax<br>
-; X64-NEXT: jne .LBB9_1<br>
-; X64-NEXT: # %bb.2: # %loadbb1<br>
-; X64-NEXT: movzbl 4(%rdi), %eax<br>
-; X64-NEXT: movzbl 4(%rsi), %ecx<br>
-; X64-NEXT: subl %ecx, %eax<br>
-; X64-NEXT: retq<br>
-; X64-NEXT: .LBB9_1: # %res_block<br>
-; X64-NEXT: setae %al<br>
-; X64-NEXT: movzbl %al, %eax<br>
-; X64-NEXT: leal -1(%rax,%rax), %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length5_eq(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length5_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %edx<br>
-; X86-NEXT: xorl (%eax), %edx<br>
-; X86-NEXT: movb 4(%ecx), %cl<br>
-; X86-NEXT: xorb 4(%eax), %cl<br>
-; X86-NEXT: movzbl %cl, %eax<br>
-; X86-NEXT: orl %edx, %eax<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length5_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl (%rdi), %eax<br>
-; X64-NEXT: xorl (%rsi), %eax<br>
-; X64-NEXT: movb 4(%rdi), %cl<br>
-; X64-NEXT: xorb 4(%rsi), %cl<br>
-; X64-NEXT: movzbl %cl, %ecx<br>
-; X64-NEXT: orl %eax, %ecx<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length8(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length8:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl %esi<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi<br>
-; X86-NEXT: movl (%esi), %ecx<br>
-; X86-NEXT: movl (%eax), %edx<br>
-; X86-NEXT: bswapl %ecx<br>
-; X86-NEXT: bswapl %edx<br>
-; X86-NEXT: cmpl %edx, %ecx<br>
-; X86-NEXT: jne .LBB11_2<br>
-; X86-NEXT: # %bb.1: # %loadbb1<br>
-; X86-NEXT: movl 4(%esi), %ecx<br>
-; X86-NEXT: movl 4(%eax), %edx<br>
-; X86-NEXT: bswapl %ecx<br>
-; X86-NEXT: bswapl %edx<br>
-; X86-NEXT: xorl %eax, %eax<br>
-; X86-NEXT: cmpl %edx, %ecx<br>
-; X86-NEXT: je .LBB11_3<br>
-; X86-NEXT: .LBB11_2: # %res_block<br>
-; X86-NEXT: xorl %eax, %eax<br>
-; X86-NEXT: cmpl %edx, %ecx<br>
-; X86-NEXT: setae %al<br>
-; X86-NEXT: leal -1(%eax,%eax), %eax<br>
-; X86-NEXT: .LBB11_3: # %endblock<br>
-; X86-NEXT: popl %esi<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length8:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rcx<br>
-; X64-NEXT: movq (%rsi), %rdx<br>
-; X64-NEXT: bswapq %rcx<br>
-; X64-NEXT: bswapq %rdx<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: seta %al<br>
-; X64-NEXT: sbbl $0, %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length8_eq(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length8_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %edx<br>
-; X86-NEXT: movl 4(%ecx), %ecx<br>
-; X86-NEXT: xorl (%eax), %edx<br>
-; X86-NEXT: xorl 4(%eax), %ecx<br>
-; X86-NEXT: orl %edx, %ecx<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length8_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rax<br>
-; X64-NEXT: cmpq (%rsi), %rax<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length8_eq_const(i8* %X) nounwind optsize {<br>
-; X86-LABEL: length8_eq_const:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl $858927408, %ecx # imm = 0x33323130<br>
-; X86-NEXT: xorl (%eax), %ecx<br>
-; X86-NEXT: movl $926299444, %edx # imm = 0x37363534<br>
-; X86-NEXT: xorl 4(%eax), %edx<br>
-; X86-NEXT: orl %ecx, %edx<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length8_eq_const:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movabsq $3978425819141910832, %rax # imm = 0x3736353433323130<br>
-; X64-NEXT: cmpq %rax, (%rdi)<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 8) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length12_eq(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length12_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $12<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length12_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rax<br>
-; X64-NEXT: xorq (%rsi), %rax<br>
-; X64-NEXT: movl 8(%rdi), %ecx<br>
-; X64-NEXT: xorl 8(%rsi), %ecx<br>
-; X64-NEXT: orq %rax, %rcx<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length12(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length12:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $12<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length12:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rcx<br>
-; X64-NEXT: movq (%rsi), %rdx<br>
-; X64-NEXT: bswapq %rcx<br>
-; X64-NEXT: bswapq %rdx<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: jne .LBB15_2<br>
-; X64-NEXT: # %bb.1: # %loadbb1<br>
-; X64-NEXT: movl 8(%rdi), %ecx<br>
-; X64-NEXT: movl 8(%rsi), %edx<br>
-; X64-NEXT: bswapl %ecx<br>
-; X64-NEXT: bswapl %edx<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: je .LBB15_3<br>
-; X64-NEXT: .LBB15_2: # %res_block<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: setae %al<br>
-; X64-NEXT: leal -1(%rax,%rax), %eax<br>
-; X64-NEXT: .LBB15_3: # %endblock<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-; PR33329 - <a href="https://bugs.llvm.org/show_bug.cgi?id=33329" rel="noreferrer" target="_blank">https://bugs.llvm.org/show_bug.cgi?id=33329</a><br>
-<br>
-define i32 @length16(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length16:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $16<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length16:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rcx<br>
-; X64-NEXT: movq (%rsi), %rdx<br>
-; X64-NEXT: bswapq %rcx<br>
-; X64-NEXT: bswapq %rdx<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: jne .LBB16_2<br>
-; X64-NEXT: # %bb.1: # %loadbb1<br>
-; X64-NEXT: movq 8(%rdi), %rcx<br>
-; X64-NEXT: movq 8(%rsi), %rdx<br>
-; X64-NEXT: bswapq %rcx<br>
-; X64-NEXT: bswapq %rdx<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: je .LBB16_3<br>
-; X64-NEXT: .LBB16_2: # %res_block<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: setae %al<br>
-; X64-NEXT: leal -1(%rax,%rax), %eax<br>
-; X64-NEXT: .LBB16_3: # %endblock<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 16) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length16_eq(i8* %x, i8* %y) nounwind optsize {<br>
-; X86-NOSSE-LABEL: length16_eq:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $16<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: setne %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length16_eq:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-SSE2-NEXT: movdqu (%ecx), %xmm0<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm1<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm1<br>
-; X86-SSE2-NEXT: pmovmskb %xmm1, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: setne %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length16_eq:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: movdqu (%rsi), %xmm1<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm1<br>
-; X64-SSE2-NEXT: pmovmskb %xmm1, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: setne %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length16_eq:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %xmm0<br>
-; X64-AVX2-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0<br>
-; X64-AVX2-NEXT: vpmovmskb %xmm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-AVX2-NEXT: setne %al<br>
-; X64-AVX2-NEXT: retq<br>
- %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16) nounwind<br>
- %cmp = icmp ne i32 %call, 0<br>
- ret i1 %cmp<br>
-}<br>
-<br>
-define i1 @length16_eq_const(i8* %X) nounwind optsize {<br>
-; X86-NOSSE-LABEL: length16_eq_const:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $16<br>
-; X86-NOSSE-NEXT: pushl $.L.str<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: sete %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length16_eq_const:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm0<br>
-; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0<br>
-; X86-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: sete %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length16_eq_const:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0<br>
-; X64-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: sete %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length16_eq_const:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %xmm0<br>
-; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0<br>
-; X64-AVX2-NEXT: vpmovmskb %xmm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-AVX2-NEXT: sete %al<br>
-; X64-AVX2-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 16) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-; PR33914 - <a href="https://bugs.llvm.org/show_bug.cgi?id=33914" rel="noreferrer" target="_blank">https://bugs.llvm.org/show_bug.cgi?id=33914</a><br>
-<br>
-define i32 @length24(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length24:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $24<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length24:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl $24, %edx<br>
-; X64-NEXT: jmp memcmp # TAILCALL<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 24) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length24_eq(i8* %x, i8* %y) nounwind optsize {<br>
-; X86-NOSSE-LABEL: length24_eq:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $24<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: sete %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length24_eq:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-SSE2-NEXT: movdqu (%ecx), %xmm0<br>
-; X86-SSE2-NEXT: movdqu 8(%ecx), %xmm1<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm2<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm2<br>
-; X86-SSE2-NEXT: movdqu 8(%eax), %xmm0<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm1, %xmm0<br>
-; X86-SSE2-NEXT: pand %xmm2, %xmm0<br>
-; X86-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: sete %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length24_eq:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: movdqu (%rsi), %xmm1<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm1<br>
-; X64-SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero<br>
-; X64-SSE2-NEXT: movq {{.*#+}} xmm2 = mem[0],zero<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm2<br>
-; X64-SSE2-NEXT: pand %xmm1, %xmm2<br>
-; X64-SSE2-NEXT: pmovmskb %xmm2, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: sete %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length24_eq:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %xmm0<br>
-; X64-AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero<br>
-; X64-AVX2-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero<br>
-; X64-AVX2-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1<br>
-; X64-AVX2-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0<br>
-; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0<br>
-; X64-AVX2-NEXT: vpmovmskb %xmm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-AVX2-NEXT: sete %al<br>
-; X64-AVX2-NEXT: retq<br>
- %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 24) nounwind<br>
- %cmp = icmp eq i32 %call, 0<br>
- ret i1 %cmp<br>
-}<br>
-<br>
-define i1 @length24_eq_const(i8* %X) nounwind optsize {<br>
-; X86-NOSSE-LABEL: length24_eq_const:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $24<br>
-; X86-NOSSE-NEXT: pushl $.L.str<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: setne %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length24_eq_const:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm0<br>
-; X86-SSE2-NEXT: movdqu 8(%eax), %xmm1<br>
-; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm1<br>
-; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0<br>
-; X86-SSE2-NEXT: pand %xmm1, %xmm0<br>
-; X86-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: setne %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length24_eq_const:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero<br>
-; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm1<br>
-; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0<br>
-; X64-SSE2-NEXT: pand %xmm1, %xmm0<br>
-; X64-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: setne %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length24_eq_const:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %xmm0<br>
-; X64-AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero<br>
-; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %xmm1, %xmm1<br>
-; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0<br>
-; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0<br>
-; X64-AVX2-NEXT: vpmovmskb %xmm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-AVX2-NEXT: setne %al<br>
-; X64-AVX2-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 24) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length32(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length32:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $32<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length32:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl $32, %edx<br>
-; X64-NEXT: jmp memcmp # TAILCALL<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 32) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-; PR33325 - <a href="https://bugs.llvm.org/show_bug.cgi?id=33325" rel="noreferrer" target="_blank">https://bugs.llvm.org/show_bug.cgi?id=33325</a><br>
-<br>
-define i1 @length32_eq(i8* %x, i8* %y) nounwind optsize {<br>
-; X86-NOSSE-LABEL: length32_eq:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $32<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: sete %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length32_eq:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-SSE2-NEXT: movdqu (%ecx), %xmm0<br>
-; X86-SSE2-NEXT: movdqu 16(%ecx), %xmm1<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm2<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm2<br>
-; X86-SSE2-NEXT: movdqu 16(%eax), %xmm0<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm1, %xmm0<br>
-; X86-SSE2-NEXT: pand %xmm2, %xmm0<br>
-; X86-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: sete %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length32_eq:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1<br>
-; X64-SSE2-NEXT: movdqu (%rsi), %xmm2<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm2<br>
-; X64-SSE2-NEXT: movdqu 16(%rsi), %xmm0<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm1, %xmm0<br>
-; X64-SSE2-NEXT: pand %xmm2, %xmm0<br>
-; X64-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: sete %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length32_eq:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0<br>
-; X64-AVX2-NEXT: vpcmpeqb (%rsi), %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $-1, %eax<br>
-; X64-AVX2-NEXT: sete %al<br>
-; X64-AVX2-NEXT: vzeroupper<br>
-; X64-AVX2-NEXT: retq<br>
- %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 32) nounwind<br>
- %cmp = icmp eq i32 %call, 0<br>
- ret i1 %cmp<br>
-}<br>
-<br>
-define i1 @length32_eq_const(i8* %X) nounwind optsize {<br>
-; X86-NOSSE-LABEL: length32_eq_const:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $32<br>
-; X86-NOSSE-NEXT: pushl $.L.str<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: setne %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length32_eq_const:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm0<br>
-; X86-SSE2-NEXT: movdqu 16(%eax), %xmm1<br>
-; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm1<br>
-; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0<br>
-; X86-SSE2-NEXT: pand %xmm1, %xmm0<br>
-; X86-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: setne %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length32_eq_const:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1<br>
-; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm1<br>
-; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0<br>
-; X64-SSE2-NEXT: pand %xmm1, %xmm0<br>
-; X64-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: setne %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length32_eq_const:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0<br>
-; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $-1, %eax<br>
-; X64-AVX2-NEXT: setne %al<br>
-; X64-AVX2-NEXT: vzeroupper<br>
-; X64-AVX2-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 32) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length64(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: length64:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $64<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length64:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl $64, %edx<br>
-; X64-NEXT: jmp memcmp # TAILCALL<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 64) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length64_eq(i8* %x, i8* %y) nounwind optsize {<br>
-; X86-LABEL: length64_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $64<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length64_eq:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: pushq %rax<br>
-; X64-SSE2-NEXT: movl $64, %edx<br>
-; X64-SSE2-NEXT: callq memcmp<br>
-; X64-SSE2-NEXT: testl %eax, %eax<br>
-; X64-SSE2-NEXT: setne %al<br>
-; X64-SSE2-NEXT: popq %rcx<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length64_eq:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0<br>
-; X64-AVX2-NEXT: vmovdqu 32(%rdi), %ymm1<br>
-; X64-AVX2-NEXT: vpcmpeqb 32(%rsi), %ymm1, %ymm1<br>
-; X64-AVX2-NEXT: vpcmpeqb (%rsi), %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $-1, %eax<br>
-; X64-AVX2-NEXT: setne %al<br>
-; X64-AVX2-NEXT: vzeroupper<br>
-; X64-AVX2-NEXT: retq<br>
- %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 64) nounwind<br>
- %cmp = icmp ne i32 %call, 0<br>
- ret i1 %cmp<br>
-}<br>
-<br>
-define i1 @length64_eq_const(i8* %X) nounwind optsize {<br>
-; X86-LABEL: length64_eq_const:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $64<br>
-; X86-NEXT: pushl $.L.str<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length64_eq_const:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: pushq %rax<br>
-; X64-SSE2-NEXT: movl $.L.str, %esi<br>
-; X64-SSE2-NEXT: movl $64, %edx<br>
-; X64-SSE2-NEXT: callq memcmp<br>
-; X64-SSE2-NEXT: testl %eax, %eax<br>
-; X64-SSE2-NEXT: sete %al<br>
-; X64-SSE2-NEXT: popq %rcx<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length64_eq_const:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0<br>
-; X64-AVX2-NEXT: vmovdqu 32(%rdi), %ymm1<br>
-; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm1, %ymm1<br>
-; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $-1, %eax<br>
-; X64-AVX2-NEXT: sete %al<br>
-; X64-AVX2-NEXT: vzeroupper<br>
-; X64-AVX2-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 64) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @bcmp_length2(i8* %X, i8* %Y) nounwind optsize {<br>
-; X86-LABEL: bcmp_length2:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movzwl (%ecx), %ecx<br>
-; X86-NEXT: movzwl (%eax), %edx<br>
-; X86-NEXT: rolw $8, %cx<br>
-; X86-NEXT: rolw $8, %dx<br>
-; X86-NEXT: movzwl %cx, %eax<br>
-; X86-NEXT: movzwl %dx, %ecx<br>
-; X86-NEXT: subl %ecx, %eax<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: bcmp_length2:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: movzwl (%rsi), %ecx<br>
-; X64-NEXT: rolw $8, %ax<br>
-; X64-NEXT: rolw $8, %cx<br>
-; X64-NEXT: movzwl %ax, %eax<br>
-; X64-NEXT: movzwl %cx, %ecx<br>
-; X64-NEXT: subl %ecx, %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @bcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
<br>
Removed: llvm/trunk/test/CodeGen/X86/memcmp.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memcmp.ll?rev=371501&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memcmp.ll?rev=371501&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/memcmp.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/memcmp.ll (removed)<br>
@@ -1,1685 +0,0 @@<br>
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py<br>
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=cmov | FileCheck %s --check-prefix=X86 --check-prefix=X86-NOSSE<br>
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse | FileCheck %s --check-prefix=X86 --check-prefix=SSE --check-prefix=X86-SSE1<br>
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=SSE --check-prefix=X86-SSE2<br>
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2<br>
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX1<br>
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX2<br>
-<br>
-; This tests codegen time inlining/optimization of memcmp<br>
-; rdar://6480398<br>
-<br>
-@.str = private constant [65 x i8] c"0123456789012345678901234567890123456789012345678901234567890123\00", align 1<br>
-<br>
-declare i32 @memcmp(i8*, i8*, i64)<br>
-<br>
-define i32 @length0(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length0:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: xorl %eax, %eax<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length0:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind<br>
- ret i32 %m<br>
- }<br>
-<br>
-define i1 @length0_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length0_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movb $1, %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length0_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movb $1, %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length0_lt(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length0_lt:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: xorl %eax, %eax<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length0_lt:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind<br>
- %c = icmp slt i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length2(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length2:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movzwl (%ecx), %ecx<br>
-; X86-NEXT: movzwl (%eax), %edx<br>
-; X86-NEXT: rolw $8, %cx<br>
-; X86-NEXT: rolw $8, %dx<br>
-; X86-NEXT: movzwl %cx, %eax<br>
-; X86-NEXT: movzwl %dx, %ecx<br>
-; X86-NEXT: subl %ecx, %eax<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length2:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: movzwl (%rsi), %ecx<br>
-; X64-NEXT: rolw $8, %ax<br>
-; X64-NEXT: rolw $8, %cx<br>
-; X64-NEXT: movzwl %ax, %eax<br>
-; X64-NEXT: movzwl %cx, %ecx<br>
-; X64-NEXT: subl %ecx, %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length2_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length2_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movzwl (%ecx), %ecx<br>
-; X86-NEXT: cmpw (%eax), %cx<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length2_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: cmpw (%rsi), %ax<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length2_lt(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length2_lt:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movzwl (%ecx), %ecx<br>
-; X86-NEXT: movzwl (%eax), %edx<br>
-; X86-NEXT: rolw $8, %cx<br>
-; X86-NEXT: rolw $8, %dx<br>
-; X86-NEXT: movzwl %cx, %eax<br>
-; X86-NEXT: movzwl %dx, %ecx<br>
-; X86-NEXT: subl %ecx, %eax<br>
-; X86-NEXT: shrl $31, %eax<br>
-; X86-NEXT: # kill: def $al killed $al killed $eax<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length2_lt:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: movzwl (%rsi), %ecx<br>
-; X64-NEXT: rolw $8, %ax<br>
-; X64-NEXT: rolw $8, %cx<br>
-; X64-NEXT: movzwl %ax, %eax<br>
-; X64-NEXT: movzwl %cx, %ecx<br>
-; X64-NEXT: subl %ecx, %eax<br>
-; X64-NEXT: shrl $31, %eax<br>
-; X64-NEXT: # kill: def $al killed $al killed $eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
- %c = icmp slt i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length2_gt(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length2_gt:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movzwl (%ecx), %ecx<br>
-; X86-NEXT: movzwl (%eax), %eax<br>
-; X86-NEXT: rolw $8, %cx<br>
-; X86-NEXT: rolw $8, %ax<br>
-; X86-NEXT: movzwl %cx, %ecx<br>
-; X86-NEXT: movzwl %ax, %eax<br>
-; X86-NEXT: subl %eax, %ecx<br>
-; X86-NEXT: testl %ecx, %ecx<br>
-; X86-NEXT: setg %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length2_gt:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: movzwl (%rsi), %ecx<br>
-; X64-NEXT: rolw $8, %ax<br>
-; X64-NEXT: rolw $8, %cx<br>
-; X64-NEXT: movzwl %ax, %eax<br>
-; X64-NEXT: movzwl %cx, %ecx<br>
-; X64-NEXT: subl %ecx, %eax<br>
-; X64-NEXT: testl %eax, %eax<br>
-; X64-NEXT: setg %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
- %c = icmp sgt i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length2_eq_const(i8* %X) nounwind {<br>
-; X86-LABEL: length2_eq_const:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movzwl (%eax), %eax<br>
-; X86-NEXT: cmpl $12849, %eax # imm = 0x3231<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length2_eq_const:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: cmpl $12849, %eax # imm = 0x3231<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 2) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length2_eq_nobuiltin_attr:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $2<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length2_eq_nobuiltin_attr:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: pushq %rax<br>
-; X64-NEXT: movl $2, %edx<br>
-; X64-NEXT: callq memcmp<br>
-; X64-NEXT: testl %eax, %eax<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: popq %rcx<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind nobuiltin<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length3(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length3:<br>
-; X86: # %bb.0: # %loadbb<br>
-; X86-NEXT: pushl %esi<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movzwl (%eax), %edx<br>
-; X86-NEXT: movzwl (%ecx), %esi<br>
-; X86-NEXT: rolw $8, %dx<br>
-; X86-NEXT: rolw $8, %si<br>
-; X86-NEXT: cmpw %si, %dx<br>
-; X86-NEXT: jne .LBB9_1<br>
-; X86-NEXT: # %bb.2: # %loadbb1<br>
-; X86-NEXT: movzbl 2(%eax), %eax<br>
-; X86-NEXT: movzbl 2(%ecx), %ecx<br>
-; X86-NEXT: subl %ecx, %eax<br>
-; X86-NEXT: popl %esi<br>
-; X86-NEXT: retl<br>
-; X86-NEXT: .LBB9_1: # %res_block<br>
-; X86-NEXT: setae %al<br>
-; X86-NEXT: movzbl %al, %eax<br>
-; X86-NEXT: leal -1(%eax,%eax), %eax<br>
-; X86-NEXT: popl %esi<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length3:<br>
-; X64: # %bb.0: # %loadbb<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: movzwl (%rsi), %ecx<br>
-; X64-NEXT: rolw $8, %ax<br>
-; X64-NEXT: rolw $8, %cx<br>
-; X64-NEXT: cmpw %cx, %ax<br>
-; X64-NEXT: jne .LBB9_1<br>
-; X64-NEXT: # %bb.2: # %loadbb1<br>
-; X64-NEXT: movzbl 2(%rdi), %eax<br>
-; X64-NEXT: movzbl 2(%rsi), %ecx<br>
-; X64-NEXT: subl %ecx, %eax<br>
-; X64-NEXT: retq<br>
-; X64-NEXT: .LBB9_1: # %res_block<br>
-; X64-NEXT: setae %al<br>
-; X64-NEXT: movzbl %al, %eax<br>
-; X64-NEXT: leal -1(%rax,%rax), %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length3_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length3_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movzwl (%ecx), %edx<br>
-; X86-NEXT: xorw (%eax), %dx<br>
-; X86-NEXT: movb 2(%ecx), %cl<br>
-; X86-NEXT: xorb 2(%eax), %cl<br>
-; X86-NEXT: movzbl %cl, %eax<br>
-; X86-NEXT: orw %dx, %ax<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length3_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movzwl (%rdi), %eax<br>
-; X64-NEXT: xorw (%rsi), %ax<br>
-; X64-NEXT: movb 2(%rdi), %cl<br>
-; X64-NEXT: xorb 2(%rsi), %cl<br>
-; X64-NEXT: movzbl %cl, %ecx<br>
-; X64-NEXT: orw %ax, %cx<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length4(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length4:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %ecx<br>
-; X86-NEXT: movl (%eax), %edx<br>
-; X86-NEXT: bswapl %ecx<br>
-; X86-NEXT: bswapl %edx<br>
-; X86-NEXT: xorl %eax, %eax<br>
-; X86-NEXT: cmpl %edx, %ecx<br>
-; X86-NEXT: seta %al<br>
-; X86-NEXT: sbbl $0, %eax<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length4:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl (%rdi), %ecx<br>
-; X64-NEXT: movl (%rsi), %edx<br>
-; X64-NEXT: bswapl %ecx<br>
-; X64-NEXT: bswapl %edx<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpl %edx, %ecx<br>
-; X64-NEXT: seta %al<br>
-; X64-NEXT: sbbl $0, %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length4_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length4_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %ecx<br>
-; X86-NEXT: cmpl (%eax), %ecx<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length4_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl (%rdi), %eax<br>
-; X64-NEXT: cmpl (%rsi), %eax<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length4_lt(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length4_lt:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %ecx<br>
-; X86-NEXT: movl (%eax), %edx<br>
-; X86-NEXT: bswapl %ecx<br>
-; X86-NEXT: bswapl %edx<br>
-; X86-NEXT: xorl %eax, %eax<br>
-; X86-NEXT: cmpl %edx, %ecx<br>
-; X86-NEXT: seta %al<br>
-; X86-NEXT: sbbl $0, %eax<br>
-; X86-NEXT: shrl $31, %eax<br>
-; X86-NEXT: # kill: def $al killed $al killed $eax<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length4_lt:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl (%rdi), %ecx<br>
-; X64-NEXT: movl (%rsi), %edx<br>
-; X64-NEXT: bswapl %ecx<br>
-; X64-NEXT: bswapl %edx<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpl %edx, %ecx<br>
-; X64-NEXT: seta %al<br>
-; X64-NEXT: sbbl $0, %eax<br>
-; X64-NEXT: shrl $31, %eax<br>
-; X64-NEXT: # kill: def $al killed $al killed $eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind<br>
- %c = icmp slt i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length4_gt(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length4_gt:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %ecx<br>
-; X86-NEXT: movl (%eax), %eax<br>
-; X86-NEXT: bswapl %ecx<br>
-; X86-NEXT: bswapl %eax<br>
-; X86-NEXT: xorl %edx, %edx<br>
-; X86-NEXT: cmpl %eax, %ecx<br>
-; X86-NEXT: seta %dl<br>
-; X86-NEXT: sbbl $0, %edx<br>
-; X86-NEXT: testl %edx, %edx<br>
-; X86-NEXT: setg %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length4_gt:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl (%rdi), %eax<br>
-; X64-NEXT: movl (%rsi), %ecx<br>
-; X64-NEXT: bswapl %eax<br>
-; X64-NEXT: bswapl %ecx<br>
-; X64-NEXT: xorl %edx, %edx<br>
-; X64-NEXT: cmpl %ecx, %eax<br>
-; X64-NEXT: seta %dl<br>
-; X64-NEXT: sbbl $0, %edx<br>
-; X64-NEXT: testl %edx, %edx<br>
-; X64-NEXT: setg %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind<br>
- %c = icmp sgt i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length4_eq_const(i8* %X) nounwind {<br>
-; X86-LABEL: length4_eq_const:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: cmpl $875770417, (%eax) # imm = 0x34333231<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length4_eq_const:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: cmpl $875770417, (%rdi) # imm = 0x34333231<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 4) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length5(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length5:<br>
-; X86: # %bb.0: # %loadbb<br>
-; X86-NEXT: pushl %esi<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl (%eax), %edx<br>
-; X86-NEXT: movl (%ecx), %esi<br>
-; X86-NEXT: bswapl %edx<br>
-; X86-NEXT: bswapl %esi<br>
-; X86-NEXT: cmpl %esi, %edx<br>
-; X86-NEXT: jne .LBB16_1<br>
-; X86-NEXT: # %bb.2: # %loadbb1<br>
-; X86-NEXT: movzbl 4(%eax), %eax<br>
-; X86-NEXT: movzbl 4(%ecx), %ecx<br>
-; X86-NEXT: subl %ecx, %eax<br>
-; X86-NEXT: popl %esi<br>
-; X86-NEXT: retl<br>
-; X86-NEXT: .LBB16_1: # %res_block<br>
-; X86-NEXT: setae %al<br>
-; X86-NEXT: movzbl %al, %eax<br>
-; X86-NEXT: leal -1(%eax,%eax), %eax<br>
-; X86-NEXT: popl %esi<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length5:<br>
-; X64: # %bb.0: # %loadbb<br>
-; X64-NEXT: movl (%rdi), %eax<br>
-; X64-NEXT: movl (%rsi), %ecx<br>
-; X64-NEXT: bswapl %eax<br>
-; X64-NEXT: bswapl %ecx<br>
-; X64-NEXT: cmpl %ecx, %eax<br>
-; X64-NEXT: jne .LBB16_1<br>
-; X64-NEXT: # %bb.2: # %loadbb1<br>
-; X64-NEXT: movzbl 4(%rdi), %eax<br>
-; X64-NEXT: movzbl 4(%rsi), %ecx<br>
-; X64-NEXT: subl %ecx, %eax<br>
-; X64-NEXT: retq<br>
-; X64-NEXT: .LBB16_1: # %res_block<br>
-; X64-NEXT: setae %al<br>
-; X64-NEXT: movzbl %al, %eax<br>
-; X64-NEXT: leal -1(%rax,%rax), %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length5_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length5_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %edx<br>
-; X86-NEXT: xorl (%eax), %edx<br>
-; X86-NEXT: movb 4(%ecx), %cl<br>
-; X86-NEXT: xorb 4(%eax), %cl<br>
-; X86-NEXT: movzbl %cl, %eax<br>
-; X86-NEXT: orl %edx, %eax<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length5_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl (%rdi), %eax<br>
-; X64-NEXT: xorl (%rsi), %eax<br>
-; X64-NEXT: movb 4(%rdi), %cl<br>
-; X64-NEXT: xorb 4(%rsi), %cl<br>
-; X64-NEXT: movzbl %cl, %ecx<br>
-; X64-NEXT: orl %eax, %ecx<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length5_lt(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length5_lt:<br>
-; X86: # %bb.0: # %loadbb<br>
-; X86-NEXT: pushl %esi<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl (%eax), %edx<br>
-; X86-NEXT: movl (%ecx), %esi<br>
-; X86-NEXT: bswapl %edx<br>
-; X86-NEXT: bswapl %esi<br>
-; X86-NEXT: cmpl %esi, %edx<br>
-; X86-NEXT: jne .LBB18_1<br>
-; X86-NEXT: # %bb.2: # %loadbb1<br>
-; X86-NEXT: movzbl 4(%eax), %eax<br>
-; X86-NEXT: movzbl 4(%ecx), %ecx<br>
-; X86-NEXT: subl %ecx, %eax<br>
-; X86-NEXT: jmp .LBB18_3<br>
-; X86-NEXT: .LBB18_1: # %res_block<br>
-; X86-NEXT: setae %al<br>
-; X86-NEXT: movzbl %al, %eax<br>
-; X86-NEXT: leal -1(%eax,%eax), %eax<br>
-; X86-NEXT: .LBB18_3: # %endblock<br>
-; X86-NEXT: shrl $31, %eax<br>
-; X86-NEXT: # kill: def $al killed $al killed $eax<br>
-; X86-NEXT: popl %esi<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length5_lt:<br>
-; X64: # %bb.0: # %loadbb<br>
-; X64-NEXT: movl (%rdi), %eax<br>
-; X64-NEXT: movl (%rsi), %ecx<br>
-; X64-NEXT: bswapl %eax<br>
-; X64-NEXT: bswapl %ecx<br>
-; X64-NEXT: cmpl %ecx, %eax<br>
-; X64-NEXT: jne .LBB18_1<br>
-; X64-NEXT: # %bb.2: # %loadbb1<br>
-; X64-NEXT: movzbl 4(%rdi), %eax<br>
-; X64-NEXT: movzbl 4(%rsi), %ecx<br>
-; X64-NEXT: subl %ecx, %eax<br>
-; X64-NEXT: shrl $31, %eax<br>
-; X64-NEXT: # kill: def $al killed $al killed $eax<br>
-; X64-NEXT: retq<br>
-; X64-NEXT: .LBB18_1: # %res_block<br>
-; X64-NEXT: setae %al<br>
-; X64-NEXT: movzbl %al, %eax<br>
-; X64-NEXT: leal -1(%rax,%rax), %eax<br>
-; X64-NEXT: shrl $31, %eax<br>
-; X64-NEXT: # kill: def $al killed $al killed $eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind<br>
- %c = icmp slt i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length7_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length7_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %edx<br>
-; X86-NEXT: movl 3(%ecx), %ecx<br>
-; X86-NEXT: xorl (%eax), %edx<br>
-; X86-NEXT: xorl 3(%eax), %ecx<br>
-; X86-NEXT: orl %edx, %ecx<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length7_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl (%rdi), %eax<br>
-; X64-NEXT: movl 3(%rdi), %ecx<br>
-; X64-NEXT: xorl (%rsi), %eax<br>
-; X64-NEXT: xorl 3(%rsi), %ecx<br>
-; X64-NEXT: orl %eax, %ecx<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 7) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length8(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length8:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl %esi<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi<br>
-; X86-NEXT: movl (%esi), %ecx<br>
-; X86-NEXT: movl (%eax), %edx<br>
-; X86-NEXT: bswapl %ecx<br>
-; X86-NEXT: bswapl %edx<br>
-; X86-NEXT: cmpl %edx, %ecx<br>
-; X86-NEXT: jne .LBB20_2<br>
-; X86-NEXT: # %bb.1: # %loadbb1<br>
-; X86-NEXT: movl 4(%esi), %ecx<br>
-; X86-NEXT: movl 4(%eax), %edx<br>
-; X86-NEXT: bswapl %ecx<br>
-; X86-NEXT: bswapl %edx<br>
-; X86-NEXT: xorl %eax, %eax<br>
-; X86-NEXT: cmpl %edx, %ecx<br>
-; X86-NEXT: je .LBB20_3<br>
-; X86-NEXT: .LBB20_2: # %res_block<br>
-; X86-NEXT: xorl %eax, %eax<br>
-; X86-NEXT: cmpl %edx, %ecx<br>
-; X86-NEXT: setae %al<br>
-; X86-NEXT: leal -1(%eax,%eax), %eax<br>
-; X86-NEXT: .LBB20_3: # %endblock<br>
-; X86-NEXT: popl %esi<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length8:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rcx<br>
-; X64-NEXT: movq (%rsi), %rdx<br>
-; X64-NEXT: bswapq %rcx<br>
-; X64-NEXT: bswapq %rdx<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: seta %al<br>
-; X64-NEXT: sbbl $0, %eax<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length8_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length8_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-NEXT: movl (%ecx), %edx<br>
-; X86-NEXT: movl 4(%ecx), %ecx<br>
-; X86-NEXT: xorl (%eax), %edx<br>
-; X86-NEXT: xorl 4(%eax), %ecx<br>
-; X86-NEXT: orl %edx, %ecx<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length8_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rax<br>
-; X64-NEXT: cmpq (%rsi), %rax<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length8_eq_const(i8* %X) nounwind {<br>
-; X86-LABEL: length8_eq_const:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-NEXT: movl $858927408, %ecx # imm = 0x33323130<br>
-; X86-NEXT: xorl (%eax), %ecx<br>
-; X86-NEXT: movl $926299444, %edx # imm = 0x37363534<br>
-; X86-NEXT: xorl 4(%eax), %edx<br>
-; X86-NEXT: orl %ecx, %edx<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length8_eq_const:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movabsq $3978425819141910832, %rax # imm = 0x3736353433323130<br>
-; X64-NEXT: cmpq %rax, (%rdi)<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 8) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length9_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length9_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $9<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length9_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rax<br>
-; X64-NEXT: xorq (%rsi), %rax<br>
-; X64-NEXT: movb 8(%rdi), %cl<br>
-; X64-NEXT: xorb 8(%rsi), %cl<br>
-; X64-NEXT: movzbl %cl, %ecx<br>
-; X64-NEXT: orq %rax, %rcx<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length10_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length10_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $10<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length10_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rax<br>
-; X64-NEXT: xorq (%rsi), %rax<br>
-; X64-NEXT: movzwl 8(%rdi), %ecx<br>
-; X64-NEXT: xorw 8(%rsi), %cx<br>
-; X64-NEXT: movzwl %cx, %ecx<br>
-; X64-NEXT: orq %rax, %rcx<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 10) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length11_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length11_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $11<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length11_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rax<br>
-; X64-NEXT: movq 3(%rdi), %rcx<br>
-; X64-NEXT: xorq (%rsi), %rax<br>
-; X64-NEXT: xorq 3(%rsi), %rcx<br>
-; X64-NEXT: orq %rax, %rcx<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 11) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length12_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length12_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $12<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length12_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rax<br>
-; X64-NEXT: xorq (%rsi), %rax<br>
-; X64-NEXT: movl 8(%rdi), %ecx<br>
-; X64-NEXT: xorl 8(%rsi), %ecx<br>
-; X64-NEXT: orq %rax, %rcx<br>
-; X64-NEXT: setne %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length12(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length12:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $12<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length12:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rcx<br>
-; X64-NEXT: movq (%rsi), %rdx<br>
-; X64-NEXT: bswapq %rcx<br>
-; X64-NEXT: bswapq %rdx<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: jne .LBB27_2<br>
-; X64-NEXT: # %bb.1: # %loadbb1<br>
-; X64-NEXT: movl 8(%rdi), %ecx<br>
-; X64-NEXT: movl 8(%rsi), %edx<br>
-; X64-NEXT: bswapl %ecx<br>
-; X64-NEXT: bswapl %edx<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: je .LBB27_3<br>
-; X64-NEXT: .LBB27_2: # %res_block<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: setae %al<br>
-; X64-NEXT: leal -1(%rax,%rax), %eax<br>
-; X64-NEXT: .LBB27_3: # %endblock<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length13_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length13_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $13<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length13_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rax<br>
-; X64-NEXT: movq 5(%rdi), %rcx<br>
-; X64-NEXT: xorq (%rsi), %rax<br>
-; X64-NEXT: xorq 5(%rsi), %rcx<br>
-; X64-NEXT: orq %rax, %rcx<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 13) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length14_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length14_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $14<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length14_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rax<br>
-; X64-NEXT: movq 6(%rdi), %rcx<br>
-; X64-NEXT: xorq (%rsi), %rax<br>
-; X64-NEXT: xorq 6(%rsi), %rcx<br>
-; X64-NEXT: orq %rax, %rcx<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 14) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i1 @length15_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length15_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $15<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length15_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rax<br>
-; X64-NEXT: movq 7(%rdi), %rcx<br>
-; X64-NEXT: xorq (%rsi), %rax<br>
-; X64-NEXT: xorq 7(%rsi), %rcx<br>
-; X64-NEXT: orq %rax, %rcx<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 15) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-; PR33329 - <a href="https://bugs.llvm.org/show_bug.cgi?id=33329" rel="noreferrer" target="_blank">https://bugs.llvm.org/show_bug.cgi?id=33329</a><br>
-<br>
-define i32 @length16(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length16:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $16<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length16:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movq (%rdi), %rcx<br>
-; X64-NEXT: movq (%rsi), %rdx<br>
-; X64-NEXT: bswapq %rcx<br>
-; X64-NEXT: bswapq %rdx<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: jne .LBB31_2<br>
-; X64-NEXT: # %bb.1: # %loadbb1<br>
-; X64-NEXT: movq 8(%rdi), %rcx<br>
-; X64-NEXT: movq 8(%rsi), %rdx<br>
-; X64-NEXT: bswapq %rcx<br>
-; X64-NEXT: bswapq %rdx<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: je .LBB31_3<br>
-; X64-NEXT: .LBB31_2: # %res_block<br>
-; X64-NEXT: xorl %eax, %eax<br>
-; X64-NEXT: cmpq %rdx, %rcx<br>
-; X64-NEXT: setae %al<br>
-; X64-NEXT: leal -1(%rax,%rax), %eax<br>
-; X64-NEXT: .LBB31_3: # %endblock<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 16) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length16_eq(i8* %x, i8* %y) nounwind {<br>
-; X86-NOSSE-LABEL: length16_eq:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $16<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: setne %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE1-LABEL: length16_eq:<br>
-; X86-SSE1: # %bb.0:<br>
-; X86-SSE1-NEXT: pushl $0<br>
-; X86-SSE1-NEXT: pushl $16<br>
-; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-SSE1-NEXT: calll memcmp<br>
-; X86-SSE1-NEXT: addl $16, %esp<br>
-; X86-SSE1-NEXT: testl %eax, %eax<br>
-; X86-SSE1-NEXT: setne %al<br>
-; X86-SSE1-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length16_eq:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-SSE2-NEXT: movdqu (%ecx), %xmm0<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm1<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm1<br>
-; X86-SSE2-NEXT: pmovmskb %xmm1, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: setne %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length16_eq:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: movdqu (%rsi), %xmm1<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm1<br>
-; X64-SSE2-NEXT: pmovmskb %xmm1, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: setne %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX-LABEL: length16_eq:<br>
-; X64-AVX: # %bb.0:<br>
-; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0<br>
-; X64-AVX-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0<br>
-; X64-AVX-NEXT: vpmovmskb %xmm0, %eax<br>
-; X64-AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-AVX-NEXT: setne %al<br>
-; X64-AVX-NEXT: retq<br>
- %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16) nounwind<br>
- %cmp = icmp ne i32 %call, 0<br>
- ret i1 %cmp<br>
-}<br>
-<br>
-define i1 @length16_eq_const(i8* %X) nounwind {<br>
-; X86-NOSSE-LABEL: length16_eq_const:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $16<br>
-; X86-NOSSE-NEXT: pushl $.L.str<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: sete %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE1-LABEL: length16_eq_const:<br>
-; X86-SSE1: # %bb.0:<br>
-; X86-SSE1-NEXT: pushl $0<br>
-; X86-SSE1-NEXT: pushl $16<br>
-; X86-SSE1-NEXT: pushl $.L.str<br>
-; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-SSE1-NEXT: calll memcmp<br>
-; X86-SSE1-NEXT: addl $16, %esp<br>
-; X86-SSE1-NEXT: testl %eax, %eax<br>
-; X86-SSE1-NEXT: sete %al<br>
-; X86-SSE1-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length16_eq_const:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm0<br>
-; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0<br>
-; X86-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: sete %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length16_eq_const:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0<br>
-; X64-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: sete %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX-LABEL: length16_eq_const:<br>
-; X64-AVX: # %bb.0:<br>
-; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0<br>
-; X64-AVX-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0<br>
-; X64-AVX-NEXT: vpmovmskb %xmm0, %eax<br>
-; X64-AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-AVX-NEXT: sete %al<br>
-; X64-AVX-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 16) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-; PR33914 - <a href="https://bugs.llvm.org/show_bug.cgi?id=33914" rel="noreferrer" target="_blank">https://bugs.llvm.org/show_bug.cgi?id=33914</a><br>
-<br>
-define i32 @length24(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length24:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $24<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length24:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl $24, %edx<br>
-; X64-NEXT: jmp memcmp # TAILCALL<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 24) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length24_eq(i8* %x, i8* %y) nounwind {<br>
-; X86-NOSSE-LABEL: length24_eq:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $24<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: sete %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE1-LABEL: length24_eq:<br>
-; X86-SSE1: # %bb.0:<br>
-; X86-SSE1-NEXT: pushl $0<br>
-; X86-SSE1-NEXT: pushl $24<br>
-; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-SSE1-NEXT: calll memcmp<br>
-; X86-SSE1-NEXT: addl $16, %esp<br>
-; X86-SSE1-NEXT: testl %eax, %eax<br>
-; X86-SSE1-NEXT: sete %al<br>
-; X86-SSE1-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length24_eq:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-SSE2-NEXT: movdqu (%ecx), %xmm0<br>
-; X86-SSE2-NEXT: movdqu 8(%ecx), %xmm1<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm2<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm2<br>
-; X86-SSE2-NEXT: movdqu 8(%eax), %xmm0<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm1, %xmm0<br>
-; X86-SSE2-NEXT: pand %xmm2, %xmm0<br>
-; X86-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: sete %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length24_eq:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: movdqu (%rsi), %xmm1<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm1<br>
-; X64-SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero<br>
-; X64-SSE2-NEXT: movq {{.*#+}} xmm2 = mem[0],zero<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm2<br>
-; X64-SSE2-NEXT: pand %xmm1, %xmm2<br>
-; X64-SSE2-NEXT: pmovmskb %xmm2, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: sete %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX-LABEL: length24_eq:<br>
-; X64-AVX: # %bb.0:<br>
-; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0<br>
-; X64-AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero<br>
-; X64-AVX-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero<br>
-; X64-AVX-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1<br>
-; X64-AVX-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0<br>
-; X64-AVX-NEXT: vpand %xmm1, %xmm0, %xmm0<br>
-; X64-AVX-NEXT: vpmovmskb %xmm0, %eax<br>
-; X64-AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-AVX-NEXT: sete %al<br>
-; X64-AVX-NEXT: retq<br>
- %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 24) nounwind<br>
- %cmp = icmp eq i32 %call, 0<br>
- ret i1 %cmp<br>
-}<br>
-<br>
-define i1 @length24_eq_const(i8* %X) nounwind {<br>
-; X86-NOSSE-LABEL: length24_eq_const:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $24<br>
-; X86-NOSSE-NEXT: pushl $.L.str<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: setne %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE1-LABEL: length24_eq_const:<br>
-; X86-SSE1: # %bb.0:<br>
-; X86-SSE1-NEXT: pushl $0<br>
-; X86-SSE1-NEXT: pushl $24<br>
-; X86-SSE1-NEXT: pushl $.L.str<br>
-; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-SSE1-NEXT: calll memcmp<br>
-; X86-SSE1-NEXT: addl $16, %esp<br>
-; X86-SSE1-NEXT: testl %eax, %eax<br>
-; X86-SSE1-NEXT: setne %al<br>
-; X86-SSE1-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length24_eq_const:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm0<br>
-; X86-SSE2-NEXT: movdqu 8(%eax), %xmm1<br>
-; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm1<br>
-; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0<br>
-; X86-SSE2-NEXT: pand %xmm1, %xmm0<br>
-; X86-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: setne %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length24_eq_const:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero<br>
-; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm1<br>
-; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0<br>
-; X64-SSE2-NEXT: pand %xmm1, %xmm0<br>
-; X64-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: setne %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX-LABEL: length24_eq_const:<br>
-; X64-AVX: # %bb.0:<br>
-; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0<br>
-; X64-AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero<br>
-; X64-AVX-NEXT: vpcmpeqb {{.*}}(%rip), %xmm1, %xmm1<br>
-; X64-AVX-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0<br>
-; X64-AVX-NEXT: vpand %xmm1, %xmm0, %xmm0<br>
-; X64-AVX-NEXT: vpmovmskb %xmm0, %eax<br>
-; X64-AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-AVX-NEXT: setne %al<br>
-; X64-AVX-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 24) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length32(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length32:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $32<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length32:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl $32, %edx<br>
-; X64-NEXT: jmp memcmp # TAILCALL<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 32) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-; PR33325 - <a href="https://bugs.llvm.org/show_bug.cgi?id=33325" rel="noreferrer" target="_blank">https://bugs.llvm.org/show_bug.cgi?id=33325</a><br>
-<br>
-define i1 @length32_eq(i8* %x, i8* %y) nounwind {<br>
-; X86-NOSSE-LABEL: length32_eq:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $32<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: sete %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE1-LABEL: length32_eq:<br>
-; X86-SSE1: # %bb.0:<br>
-; X86-SSE1-NEXT: pushl $0<br>
-; X86-SSE1-NEXT: pushl $32<br>
-; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-SSE1-NEXT: calll memcmp<br>
-; X86-SSE1-NEXT: addl $16, %esp<br>
-; X86-SSE1-NEXT: testl %eax, %eax<br>
-; X86-SSE1-NEXT: sete %al<br>
-; X86-SSE1-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length32_eq:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-SSE2-NEXT: movdqu (%ecx), %xmm0<br>
-; X86-SSE2-NEXT: movdqu 16(%ecx), %xmm1<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm2<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm2<br>
-; X86-SSE2-NEXT: movdqu 16(%eax), %xmm0<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm1, %xmm0<br>
-; X86-SSE2-NEXT: pand %xmm2, %xmm0<br>
-; X86-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: sete %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length32_eq:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1<br>
-; X64-SSE2-NEXT: movdqu (%rsi), %xmm2<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm2<br>
-; X64-SSE2-NEXT: movdqu 16(%rsi), %xmm0<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm1, %xmm0<br>
-; X64-SSE2-NEXT: pand %xmm2, %xmm0<br>
-; X64-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: sete %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX1-LABEL: length32_eq:<br>
-; X64-AVX1: # %bb.0:<br>
-; X64-AVX1-NEXT: vmovdqu (%rdi), %xmm0<br>
-; X64-AVX1-NEXT: vmovdqu 16(%rdi), %xmm1<br>
-; X64-AVX1-NEXT: vpcmpeqb 16(%rsi), %xmm1, %xmm1<br>
-; X64-AVX1-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0<br>
-; X64-AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0<br>
-; X64-AVX1-NEXT: vpmovmskb %xmm0, %eax<br>
-; X64-AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-AVX1-NEXT: sete %al<br>
-; X64-AVX1-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length32_eq:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0<br>
-; X64-AVX2-NEXT: vpcmpeqb (%rsi), %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $-1, %eax<br>
-; X64-AVX2-NEXT: sete %al<br>
-; X64-AVX2-NEXT: vzeroupper<br>
-; X64-AVX2-NEXT: retq<br>
- %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 32) nounwind<br>
- %cmp = icmp eq i32 %call, 0<br>
- ret i1 %cmp<br>
-}<br>
-<br>
-define i1 @length32_eq_prefer128(i8* %x, i8* %y) nounwind "prefer-vector-width"="128" {<br>
-; X86-NOSSE-LABEL: length32_eq_prefer128:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $32<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: sete %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE1-LABEL: length32_eq_prefer128:<br>
-; X86-SSE1: # %bb.0:<br>
-; X86-SSE1-NEXT: pushl $0<br>
-; X86-SSE1-NEXT: pushl $32<br>
-; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-SSE1-NEXT: calll memcmp<br>
-; X86-SSE1-NEXT: addl $16, %esp<br>
-; X86-SSE1-NEXT: testl %eax, %eax<br>
-; X86-SSE1-NEXT: sete %al<br>
-; X86-SSE1-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length32_eq_prefer128:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx<br>
-; X86-SSE2-NEXT: movdqu (%ecx), %xmm0<br>
-; X86-SSE2-NEXT: movdqu 16(%ecx), %xmm1<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm2<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm2<br>
-; X86-SSE2-NEXT: movdqu 16(%eax), %xmm0<br>
-; X86-SSE2-NEXT: pcmpeqb %xmm1, %xmm0<br>
-; X86-SSE2-NEXT: pand %xmm2, %xmm0<br>
-; X86-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: sete %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length32_eq_prefer128:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1<br>
-; X64-SSE2-NEXT: movdqu (%rsi), %xmm2<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm2<br>
-; X64-SSE2-NEXT: movdqu 16(%rsi), %xmm0<br>
-; X64-SSE2-NEXT: pcmpeqb %xmm1, %xmm0<br>
-; X64-SSE2-NEXT: pand %xmm2, %xmm0<br>
-; X64-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: sete %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX-LABEL: length32_eq_prefer128:<br>
-; X64-AVX: # %bb.0:<br>
-; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0<br>
-; X64-AVX-NEXT: vmovdqu 16(%rdi), %xmm1<br>
-; X64-AVX-NEXT: vpcmpeqb 16(%rsi), %xmm1, %xmm1<br>
-; X64-AVX-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0<br>
-; X64-AVX-NEXT: vpand %xmm1, %xmm0, %xmm0<br>
-; X64-AVX-NEXT: vpmovmskb %xmm0, %eax<br>
-; X64-AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-AVX-NEXT: sete %al<br>
-; X64-AVX-NEXT: retq<br>
- %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 32) nounwind<br>
- %cmp = icmp eq i32 %call, 0<br>
- ret i1 %cmp<br>
-}<br>
-<br>
-define i1 @length32_eq_const(i8* %X) nounwind {<br>
-; X86-NOSSE-LABEL: length32_eq_const:<br>
-; X86-NOSSE: # %bb.0:<br>
-; X86-NOSSE-NEXT: pushl $0<br>
-; X86-NOSSE-NEXT: pushl $32<br>
-; X86-NOSSE-NEXT: pushl $.L.str<br>
-; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NOSSE-NEXT: calll memcmp<br>
-; X86-NOSSE-NEXT: addl $16, %esp<br>
-; X86-NOSSE-NEXT: testl %eax, %eax<br>
-; X86-NOSSE-NEXT: setne %al<br>
-; X86-NOSSE-NEXT: retl<br>
-;<br>
-; X86-SSE1-LABEL: length32_eq_const:<br>
-; X86-SSE1: # %bb.0:<br>
-; X86-SSE1-NEXT: pushl $0<br>
-; X86-SSE1-NEXT: pushl $32<br>
-; X86-SSE1-NEXT: pushl $.L.str<br>
-; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-SSE1-NEXT: calll memcmp<br>
-; X86-SSE1-NEXT: addl $16, %esp<br>
-; X86-SSE1-NEXT: testl %eax, %eax<br>
-; X86-SSE1-NEXT: setne %al<br>
-; X86-SSE1-NEXT: retl<br>
-;<br>
-; X86-SSE2-LABEL: length32_eq_const:<br>
-; X86-SSE2: # %bb.0:<br>
-; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
-; X86-SSE2-NEXT: movdqu (%eax), %xmm0<br>
-; X86-SSE2-NEXT: movdqu 16(%eax), %xmm1<br>
-; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm1<br>
-; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0<br>
-; X86-SSE2-NEXT: pand %xmm1, %xmm0<br>
-; X86-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X86-SSE2-NEXT: setne %al<br>
-; X86-SSE2-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length32_eq_const:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: movdqu (%rdi), %xmm0<br>
-; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1<br>
-; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm1<br>
-; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0<br>
-; X64-SSE2-NEXT: pand %xmm1, %xmm0<br>
-; X64-SSE2-NEXT: pmovmskb %xmm0, %eax<br>
-; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-SSE2-NEXT: setne %al<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX1-LABEL: length32_eq_const:<br>
-; X64-AVX1: # %bb.0:<br>
-; X64-AVX1-NEXT: vmovdqu (%rdi), %xmm0<br>
-; X64-AVX1-NEXT: vmovdqu 16(%rdi), %xmm1<br>
-; X64-AVX1-NEXT: vpcmpeqb {{.*}}(%rip), %xmm1, %xmm1<br>
-; X64-AVX1-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0<br>
-; X64-AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0<br>
-; X64-AVX1-NEXT: vpmovmskb %xmm0, %eax<br>
-; X64-AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF<br>
-; X64-AVX1-NEXT: setne %al<br>
-; X64-AVX1-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length32_eq_const:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0<br>
-; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $-1, %eax<br>
-; X64-AVX2-NEXT: setne %al<br>
-; X64-AVX2-NEXT: vzeroupper<br>
-; X64-AVX2-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 32) nounwind<br>
- %c = icmp ne i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-define i32 @length64(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: length64:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $64<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: length64:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movl $64, %edx<br>
-; X64-NEXT: jmp memcmp # TAILCALL<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 64) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @length64_eq(i8* %x, i8* %y) nounwind {<br>
-; X86-LABEL: length64_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $64<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: setne %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length64_eq:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: pushq %rax<br>
-; X64-SSE2-NEXT: movl $64, %edx<br>
-; X64-SSE2-NEXT: callq memcmp<br>
-; X64-SSE2-NEXT: testl %eax, %eax<br>
-; X64-SSE2-NEXT: setne %al<br>
-; X64-SSE2-NEXT: popq %rcx<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX1-LABEL: length64_eq:<br>
-; X64-AVX1: # %bb.0:<br>
-; X64-AVX1-NEXT: pushq %rax<br>
-; X64-AVX1-NEXT: movl $64, %edx<br>
-; X64-AVX1-NEXT: callq memcmp<br>
-; X64-AVX1-NEXT: testl %eax, %eax<br>
-; X64-AVX1-NEXT: setne %al<br>
-; X64-AVX1-NEXT: popq %rcx<br>
-; X64-AVX1-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length64_eq:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0<br>
-; X64-AVX2-NEXT: vmovdqu 32(%rdi), %ymm1<br>
-; X64-AVX2-NEXT: vpcmpeqb 32(%rsi), %ymm1, %ymm1<br>
-; X64-AVX2-NEXT: vpcmpeqb (%rsi), %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $-1, %eax<br>
-; X64-AVX2-NEXT: setne %al<br>
-; X64-AVX2-NEXT: vzeroupper<br>
-; X64-AVX2-NEXT: retq<br>
- %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 64) nounwind<br>
- %cmp = icmp ne i32 %call, 0<br>
- ret i1 %cmp<br>
-}<br>
-<br>
-define i1 @length64_eq_const(i8* %X) nounwind {<br>
-; X86-LABEL: length64_eq_const:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $0<br>
-; X86-NEXT: pushl $64<br>
-; X86-NEXT: pushl $.L.str<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-SSE2-LABEL: length64_eq_const:<br>
-; X64-SSE2: # %bb.0:<br>
-; X64-SSE2-NEXT: pushq %rax<br>
-; X64-SSE2-NEXT: movl $.L.str, %esi<br>
-; X64-SSE2-NEXT: movl $64, %edx<br>
-; X64-SSE2-NEXT: callq memcmp<br>
-; X64-SSE2-NEXT: testl %eax, %eax<br>
-; X64-SSE2-NEXT: sete %al<br>
-; X64-SSE2-NEXT: popq %rcx<br>
-; X64-SSE2-NEXT: retq<br>
-;<br>
-; X64-AVX1-LABEL: length64_eq_const:<br>
-; X64-AVX1: # %bb.0:<br>
-; X64-AVX1-NEXT: pushq %rax<br>
-; X64-AVX1-NEXT: movl $.L.str, %esi<br>
-; X64-AVX1-NEXT: movl $64, %edx<br>
-; X64-AVX1-NEXT: callq memcmp<br>
-; X64-AVX1-NEXT: testl %eax, %eax<br>
-; X64-AVX1-NEXT: sete %al<br>
-; X64-AVX1-NEXT: popq %rcx<br>
-; X64-AVX1-NEXT: retq<br>
-;<br>
-; X64-AVX2-LABEL: length64_eq_const:<br>
-; X64-AVX2: # %bb.0:<br>
-; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0<br>
-; X64-AVX2-NEXT: vmovdqu 32(%rdi), %ymm1<br>
-; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm1, %ymm1<br>
-; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0<br>
-; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax<br>
-; X64-AVX2-NEXT: cmpl $-1, %eax<br>
-; X64-AVX2-NEXT: sete %al<br>
-; X64-AVX2-NEXT: vzeroupper<br>
-; X64-AVX2-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 64) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-; This checks that we do not do stupid things with huge sizes.<br>
-define i32 @huge_length(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: huge_length:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $2147483647 # imm = 0x7FFFFFFF<br>
-; X86-NEXT: pushl $-1<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: huge_length:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: movabsq $9223372036854775807, %rdx # imm = 0x7FFFFFFFFFFFFFFF<br>
-; X64-NEXT: jmp memcmp # TAILCALL<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9223372036854775807) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @huge_length_eq(i8* %X, i8* %Y) nounwind {<br>
-; X86-LABEL: huge_length_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl $2147483647 # imm = 0x7FFFFFFF<br>
-; X86-NEXT: pushl $-1<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: huge_length_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: pushq %rax<br>
-; X64-NEXT: movabsq $9223372036854775807, %rdx # imm = 0x7FFFFFFFFFFFFFFF<br>
-; X64-NEXT: callq memcmp<br>
-; X64-NEXT: testl %eax, %eax<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: popq %rcx<br>
-; X64-NEXT: retq<br>
-<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9223372036854775807) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
-<br>
-; This checks non-constant sizes.<br>
-define i32 @nonconst_length(i8* %X, i8* %Y, i64 %size) nounwind {<br>
-; X86-LABEL: nonconst_length:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: jmp memcmp # TAILCALL<br>
-;<br>
-; X64-LABEL: nonconst_length:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: jmp memcmp # TAILCALL<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 %size) nounwind<br>
- ret i32 %m<br>
-}<br>
-<br>
-define i1 @nonconst_length_eq(i8* %X, i8* %Y, i64 %size) nounwind {<br>
-; X86-LABEL: nonconst_length_eq:<br>
-; X86: # %bb.0:<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: pushl {{[0-9]+}}(%esp)<br>
-; X86-NEXT: calll memcmp<br>
-; X86-NEXT: addl $16, %esp<br>
-; X86-NEXT: testl %eax, %eax<br>
-; X86-NEXT: sete %al<br>
-; X86-NEXT: retl<br>
-;<br>
-; X64-LABEL: nonconst_length_eq:<br>
-; X64: # %bb.0:<br>
-; X64-NEXT: pushq %rax<br>
-; X64-NEXT: callq memcmp<br>
-; X64-NEXT: testl %eax, %eax<br>
-; X64-NEXT: sete %al<br>
-; X64-NEXT: popq %rcx<br>
-; X64-NEXT: retq<br>
- %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 %size) nounwind<br>
- %c = icmp eq i32 %m, 0<br>
- ret i1 %c<br>
-}<br>
<br>
Modified: llvm/trunk/test/Other/opt-O2-pipeline.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/opt-O2-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/opt-O2-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Other/opt-O2-pipeline.ll (original)<br>
+++ llvm/trunk/test/Other/opt-O2-pipeline.ll Tue Sep 10 02:18:00 2019<br>
@@ -164,6 +164,9 @@<br>
; CHECK-NEXT: Scalar Evolution Analysis<br>
; CHECK-NEXT: Loop Pass Manager<br>
; CHECK-NEXT: Loop Invariant Code Motion<br>
+; CHECK-NEXT: Merge contiguous icmps into a memcmp<br>
+; CHECK-NEXT: Expand memcmp() to load/stores<br>
+; CHECK-NEXT: Early CSE<br>
; CHECK-NEXT: Post-Dominator Tree Construction<br>
; CHECK-NEXT: Aggressive Dead Code Elimination<br>
; CHECK-NEXT: Simplify the CFG<br>
<br>
Modified: llvm/trunk/test/Other/opt-O3-pipeline.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/opt-O3-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/opt-O3-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Other/opt-O3-pipeline.ll (original)<br>
+++ llvm/trunk/test/Other/opt-O3-pipeline.ll Tue Sep 10 02:18:00 2019<br>
@@ -169,6 +169,9 @@<br>
; CHECK-NEXT: Scalar Evolution Analysis<br>
; CHECK-NEXT: Loop Pass Manager<br>
; CHECK-NEXT: Loop Invariant Code Motion<br>
+; CHECK-NEXT: Merge contiguous icmps into a memcmp<br>
+; CHECK-NEXT: Expand memcmp() to load/stores<br>
+; CHECK-NEXT: Early CSE<br>
; CHECK-NEXT: Post-Dominator Tree Construction<br>
; CHECK-NEXT: Aggressive Dead Code Elimination<br>
; CHECK-NEXT: Simplify the CFG<br>
<br>
Modified: llvm/trunk/test/Other/opt-Os-pipeline.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/opt-Os-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/opt-Os-pipeline.ll?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Other/opt-Os-pipeline.ll (original)<br>
+++ llvm/trunk/test/Other/opt-Os-pipeline.ll Tue Sep 10 02:18:00 2019<br>
@@ -151,6 +151,9 @@<br>
; CHECK-NEXT: Scalar Evolution Analysis<br>
; CHECK-NEXT: Loop Pass Manager<br>
; CHECK-NEXT: Loop Invariant Code Motion<br>
+; CHECK-NEXT: Merge contiguous icmps into a memcmp<br>
+; CHECK-NEXT: Expand memcmp() to load/stores<br>
+; CHECK-NEXT: Early CSE<br>
; CHECK-NEXT: Post-Dominator Tree Construction<br>
; CHECK-NEXT: Aggressive Dead Code Elimination<br>
; CHECK-NEXT: Simplify the CFG<br>
<br>
Added: llvm/trunk/test/Transforms/ExpandMemCmp/AArch64/memcmp.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ExpandMemCmp/AArch64/memcmp.ll?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ExpandMemCmp/AArch64/memcmp.ll?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/ExpandMemCmp/AArch64/memcmp.ll (added)<br>
+++ llvm/trunk/test/Transforms/ExpandMemCmp/AArch64/memcmp.ll Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,124 @@<br>
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
+; RUN: opt < %s -S -expandmemcmp -verify-dom-info -mtriple=aarch64-linux-gnu -data-layout="e-m:e-i64:64-n32:64" | FileCheck %s<br>
+; RUN: opt < %s -S -expandmemcmp -verify-dom-info -mtriple=aarch64-linux-gnu -mattr=strict-align -data-layout="E-m:e-i64:64-n32:64" | FileCheck %s --check-prefix=CHECK-STRICTALIGN<br>
+<br>
+declare i32 @bcmp(i8*, i8*, i64) nounwind readonly<br>
+declare i32 @memcmp(i8*, i8*, i64) nounwind readonly<br>
+<br>
+define i1 @bcmp_b2(i8* %s1, i8* %s2) {<br>
+; CHECK-LABEL: @bcmp_b2(<br>
+; CHECK-NEXT: entry:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[S1:%.*]] to i64*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[S2:%.*]] to i64*<br>
+; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]]<br>
+; CHECK-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]]<br>
+; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]]<br>
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[S1]], i8 7<br>
+; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64*<br>
+; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[S2]], i8 7<br>
+; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64*<br>
+; CHECK-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]]<br>
+; CHECK-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]]<br>
+; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP9]], [[TMP10]]<br>
+; CHECK-NEXT: [[TMP12:%.*]] = or i64 [[TMP4]], [[TMP11]]<br>
+; CHECK-NEXT: [[TMP13:%.*]] = icmp ne i64 [[TMP12]], 0<br>
+; CHECK-NEXT: [[TMP14:%.*]] = zext i1 [[TMP13]] to i32<br>
+; CHECK-NEXT: [[RET:%.*]] = icmp eq i32 [[TMP14]], 0<br>
+; CHECK-NEXT: ret i1 [[RET]]<br>
+;<br>
+; CHECK-STRICTALIGN-LABEL: @bcmp_b2(<br>
+; CHECK-STRICTALIGN-NEXT: entry:<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP0:%.*]] = bitcast i8* [[S1:%.*]] to i64*<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP1:%.*]] = bitcast i8* [[S2:%.*]] to i64*<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[S1]], i8 8<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i32*<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[S2]], i8 8<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP6]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP11:%.*]] = zext i32 [[TMP9]] to i64<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP12:%.*]] = zext i32 [[TMP10]] to i64<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP13:%.*]] = xor i64 [[TMP11]], [[TMP12]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP14:%.*]] = getelementptr i8, i8* [[S1]], i8 12<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP15:%.*]] = bitcast i8* [[TMP14]] to i16*<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP16:%.*]] = getelementptr i8, i8* [[S2]], i8 12<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i16*<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP18:%.*]] = load i16, i16* [[TMP15]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP19:%.*]] = load i16, i16* [[TMP17]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP20:%.*]] = zext i16 [[TMP18]] to i64<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP21:%.*]] = zext i16 [[TMP19]] to i64<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP22:%.*]] = xor i64 [[TMP20]], [[TMP21]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP23:%.*]] = getelementptr i8, i8* [[S1]], i8 14<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP24:%.*]] = getelementptr i8, i8* [[S2]], i8 14<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP25:%.*]] = load i8, i8* [[TMP23]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP26:%.*]] = load i8, i8* [[TMP24]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP27:%.*]] = zext i8 [[TMP25]] to i64<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP28:%.*]] = zext i8 [[TMP26]] to i64<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP29:%.*]] = xor i64 [[TMP27]], [[TMP28]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP30:%.*]] = or i64 [[TMP4]], [[TMP13]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP31:%.*]] = or i64 [[TMP22]], [[TMP29]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP32:%.*]] = or i64 [[TMP30]], [[TMP31]]<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP33:%.*]] = icmp ne i64 [[TMP32]], 0<br>
+; CHECK-STRICTALIGN-NEXT: [[TMP34:%.*]] = zext i1 [[TMP33]] to i32<br>
+; CHECK-STRICTALIGN-NEXT: [[RET:%.*]] = icmp eq i32 [[TMP34]], 0<br>
+; CHECK-STRICTALIGN-NEXT: ret i1 [[RET]]<br>
+;<br>
+entry:<br>
+ %bcmp = call i32 @bcmp(i8* %s1, i8* %s2, i64 15)<br>
+ %ret = icmp eq i32 %bcmp, 0<br>
+ ret i1 %ret<br>
+}<br>
+<br>
+define i1 @bcmp_bs(i8* %s1, i8* %s2) optsize {<br>
+; CHECK-LABEL: @bcmp_bs(<br>
+; CHECK-NEXT: entry:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[S1:%.*]] to i64*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[S2:%.*]] to i64*<br>
+; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]]<br>
+; CHECK-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]]<br>
+; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]]<br>
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[S1]], i8 8<br>
+; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64*<br>
+; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[S2]], i8 8<br>
+; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64*<br>
+; CHECK-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]]<br>
+; CHECK-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]]<br>
+; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP9]], [[TMP10]]<br>
+; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[S1]], i8 16<br>
+; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP12]] to i64*<br>
+; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, i8* [[S2]], i8 16<br>
+; CHECK-NEXT: [[TMP15:%.*]] = bitcast i8* [[TMP14]] to i64*<br>
+; CHECK-NEXT: [[TMP16:%.*]] = load i64, i64* [[TMP13]]<br>
+; CHECK-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]]<br>
+; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP16]], [[TMP17]]<br>
+; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[S1]], i8 23<br>
+; CHECK-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i64*<br>
+; CHECK-NEXT: [[TMP21:%.*]] = getelementptr i8, i8* [[S2]], i8 23<br>
+; CHECK-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to i64*<br>
+; CHECK-NEXT: [[TMP23:%.*]] = load i64, i64* [[TMP20]]<br>
+; CHECK-NEXT: [[TMP24:%.*]] = load i64, i64* [[TMP22]]<br>
+; CHECK-NEXT: [[TMP25:%.*]] = xor i64 [[TMP23]], [[TMP24]]<br>
+; CHECK-NEXT: [[TMP26:%.*]] = or i64 [[TMP4]], [[TMP11]]<br>
+; CHECK-NEXT: [[TMP27:%.*]] = or i64 [[TMP18]], [[TMP25]]<br>
+; CHECK-NEXT: [[TMP28:%.*]] = or i64 [[TMP26]], [[TMP27]]<br>
+; CHECK-NEXT: [[TMP29:%.*]] = icmp ne i64 [[TMP28]], 0<br>
+; CHECK-NEXT: [[TMP30:%.*]] = zext i1 [[TMP29]] to i32<br>
+; CHECK-NEXT: [[RET:%.*]] = icmp eq i32 [[TMP30]], 0<br>
+; CHECK-NEXT: ret i1 [[RET]]<br>
+;<br>
+; CHECK-STRICTALIGN-LABEL: @bcmp_bs(<br>
+; CHECK-STRICTALIGN-NEXT: entry:<br>
+; CHECK-STRICTALIGN-NEXT: [[MEMCMP:%.*]] = call i32 @memcmp(i8* [[S1:%.*]], i8* [[S2:%.*]], i64 31)<br>
+; CHECK-STRICTALIGN-NEXT: [[RET:%.*]] = icmp eq i32 [[MEMCMP]], 0<br>
+; CHECK-STRICTALIGN-NEXT: ret i1 [[RET]]<br>
+;<br>
+entry:<br>
+ %memcmp = call i32 @memcmp(i8* %s1, i8* %s2, i64 31)<br>
+ %ret = icmp eq i32 %memcmp, 0<br>
+ ret i1 %ret<br>
+}<br>
+<br>
+<br>
<br>
Added: llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg (added)<br>
+++ llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,3 @@<br>
+if not 'PowerPC' in config.root.targets:<br>
+ config.unsupported = True<br>
+<br>
<br>
Added: llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll (added)<br>
+++ llvm/trunk/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,294 @@<br>
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
+; RUN: opt < %s -S -expandmemcmp -verify-dom-info -mtriple=powerpc64le-unknown-gnu-linux -data-layout="e-m:e-i64:64-n32:64" | FileCheck %s<br>
+; RUN: opt < %s -S -expandmemcmp -verify-dom-info -mtriple=powerpc64-unknown-gnu-linux -data-layout="E-m:e-i64:64-n32:64" | FileCheck %s --check-prefix=CHECK-BE<br>
+<br>
+define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
+; CHECK-LABEL: @test1(<br>
+; CHECK-NEXT: entry:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*<br>
+; CHECK-NEXT: br label [[LOADBB:%.*]]<br>
+; CHECK: res_block:<br>
+; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1:%.*]] ]<br>
+; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP9:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1]] ]<br>
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]<br>
+; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1<br>
+; CHECK-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; CHECK: loadbb:<br>
+; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64*<br>
+; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64*<br>
+; CHECK-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]]<br>
+; CHECK-NEXT: [[TMP7:%.*]] = load i64, i64* [[TMP5]]<br>
+; CHECK-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])<br>
+; CHECK-NEXT: [[TMP9]] = call i64 @llvm.bswap.i64(i64 [[TMP7]])<br>
+; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP8]], [[TMP9]]<br>
+; CHECK-NEXT: br i1 [[TMP10]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]<br>
+; CHECK: loadbb1:<br>
+; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8<br>
+; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i64*<br>
+; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8<br>
+; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i64*<br>
+; CHECK-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP12]]<br>
+; CHECK-NEXT: [[TMP16:%.*]] = load i64, i64* [[TMP14]]<br>
+; CHECK-NEXT: [[TMP17]] = call i64 @llvm.bswap.i64(i64 [[TMP15]])<br>
+; CHECK-NEXT: [[TMP18]] = call i64 @llvm.bswap.i64(i64 [[TMP16]])<br>
+; CHECK-NEXT: [[TMP19:%.*]] = icmp eq i64 [[TMP17]], [[TMP18]]<br>
+; CHECK-NEXT: br i1 [[TMP19]], label [[ENDBLOCK]], label [[RES_BLOCK]]<br>
+; CHECK: endblock:<br>
+; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP3]], [[RES_BLOCK]] ]<br>
+; CHECK-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+; CHECK-BE-LABEL: @test1(<br>
+; CHECK-BE-NEXT: entry:<br>
+; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*<br>
+; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*<br>
+; CHECK-BE-NEXT: br label [[LOADBB:%.*]]<br>
+; CHECK-BE: res_block:<br>
+; CHECK-BE-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP13:%.*]], [[LOADBB1:%.*]] ]<br>
+; CHECK-BE-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP14:%.*]], [[LOADBB1]] ]<br>
+; CHECK-BE-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]<br>
+; CHECK-BE-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1<br>
+; CHECK-BE-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; CHECK-BE: loadbb:<br>
+; CHECK-BE-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64*<br>
+; CHECK-BE-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64*<br>
+; CHECK-BE-NEXT: [[TMP6]] = load i64, i64* [[TMP4]]<br>
+; CHECK-BE-NEXT: [[TMP7]] = load i64, i64* [[TMP5]]<br>
+; CHECK-BE-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]]<br>
+; CHECK-BE-NEXT: br i1 [[TMP8]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]<br>
+; CHECK-BE: loadbb1:<br>
+; CHECK-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8<br>
+; CHECK-BE-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i64*<br>
+; CHECK-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8<br>
+; CHECK-BE-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i64*<br>
+; CHECK-BE-NEXT: [[TMP13]] = load i64, i64* [[TMP10]]<br>
+; CHECK-BE-NEXT: [[TMP14]] = load i64, i64* [[TMP12]]<br>
+; CHECK-BE-NEXT: [[TMP15:%.*]] = icmp eq i64 [[TMP13]], [[TMP14]]<br>
+; CHECK-BE-NEXT: br i1 [[TMP15]], label [[ENDBLOCK]], label [[RES_BLOCK]]<br>
+; CHECK-BE: endblock:<br>
+; CHECK-BE-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP3]], [[RES_BLOCK]] ]<br>
+; CHECK-BE-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+entry:<br>
+<br>
+<br>
+<br>
+<br>
+<br>
+<br>
+ %0 = bitcast i32* %buffer1 to i8*<br>
+ %1 = bitcast i32* %buffer2 to i8*<br>
+ %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 16)<br>
+ ret i32 %call<br>
+}<br>
+<br>
+declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1<br>
+<br>
+define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
+; CHECK-LABEL: @test2(<br>
+; CHECK-NEXT: entry:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*<br>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to i32*<br>
+; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i32*<br>
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]]<br>
+; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]]<br>
+; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]])<br>
+; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP5]])<br>
+; CHECK-NEXT: [[TMP8:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]]<br>
+; CHECK-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP6]], [[TMP7]]<br>
+; CHECK-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32<br>
+; CHECK-NEXT: [[TMP11:%.*]] = zext i1 [[TMP9]] to i32<br>
+; CHECK-NEXT: [[TMP12:%.*]] = sub i32 [[TMP10]], [[TMP11]]<br>
+; CHECK-NEXT: ret i32 [[TMP12]]<br>
+;<br>
+; CHECK-BE-LABEL: @test2(<br>
+; CHECK-BE-NEXT: entry:<br>
+; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*<br>
+; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*<br>
+; CHECK-BE-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to i32*<br>
+; CHECK-BE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i32*<br>
+; CHECK-BE-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]]<br>
+; CHECK-BE-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]]<br>
+; CHECK-BE-NEXT: [[TMP6:%.*]] = icmp ugt i32 [[TMP4]], [[TMP5]]<br>
+; CHECK-BE-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP4]], [[TMP5]]<br>
+; CHECK-BE-NEXT: [[TMP8:%.*]] = zext i1 [[TMP6]] to i32<br>
+; CHECK-BE-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32<br>
+; CHECK-BE-NEXT: [[TMP10:%.*]] = sub i32 [[TMP8]], [[TMP9]]<br>
+; CHECK-BE-NEXT: ret i32 [[TMP10]]<br>
+;<br>
+<br>
+<br>
+entry:<br>
+ %0 = bitcast i32* %buffer1 to i8*<br>
+ %1 = bitcast i32* %buffer2 to i8*<br>
+ %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4)<br>
+ ret i32 %call<br>
+}<br>
+<br>
+define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
+; CHECK-LABEL: @test3(<br>
+; CHECK-NEXT: entry:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*<br>
+; CHECK-NEXT: br label [[LOADBB:%.*]]<br>
+; CHECK: res_block:<br>
+; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1:%.*]] ], [ [[TMP30:%.*]], [[LOADBB2:%.*]] ]<br>
+; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP9:%.*]], [[LOADBB]] ], [ [[TMP20:%.*]], [[LOADBB1]] ], [ [[TMP31:%.*]], [[LOADBB2]] ]<br>
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]<br>
+; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1<br>
+; CHECK-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; CHECK: loadbb:<br>
+; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64*<br>
+; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64*<br>
+; CHECK-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]]<br>
+; CHECK-NEXT: [[TMP7:%.*]] = load i64, i64* [[TMP5]]<br>
+; CHECK-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])<br>
+; CHECK-NEXT: [[TMP9]] = call i64 @llvm.bswap.i64(i64 [[TMP7]])<br>
+; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP8]], [[TMP9]]<br>
+; CHECK-NEXT: br i1 [[TMP10]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]<br>
+; CHECK: loadbb1:<br>
+; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8<br>
+; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32*<br>
+; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8<br>
+; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*<br>
+; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP12]]<br>
+; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP14]]<br>
+; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP15]])<br>
+; CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP16]])<br>
+; CHECK-NEXT: [[TMP19]] = zext i32 [[TMP17]] to i64<br>
+; CHECK-NEXT: [[TMP20]] = zext i32 [[TMP18]] to i64<br>
+; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i64 [[TMP19]], [[TMP20]]<br>
+; CHECK-NEXT: br i1 [[TMP21]], label [[LOADBB2]], label [[RES_BLOCK]]<br>
+; CHECK: loadbb2:<br>
+; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, i8* [[TMP0]], i8 12<br>
+; CHECK-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i16*<br>
+; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, i8* [[TMP1]], i8 12<br>
+; CHECK-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP24]] to i16*<br>
+; CHECK-NEXT: [[TMP26:%.*]] = load i16, i16* [[TMP23]]<br>
+; CHECK-NEXT: [[TMP27:%.*]] = load i16, i16* [[TMP25]]<br>
+; CHECK-NEXT: [[TMP28:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP26]])<br>
+; CHECK-NEXT: [[TMP29:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP27]])<br>
+; CHECK-NEXT: [[TMP30]] = zext i16 [[TMP28]] to i64<br>
+; CHECK-NEXT: [[TMP31]] = zext i16 [[TMP29]] to i64<br>
+; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i64 [[TMP30]], [[TMP31]]<br>
+; CHECK-NEXT: br i1 [[TMP32]], label [[LOADBB3:%.*]], label [[RES_BLOCK]]<br>
+; CHECK: loadbb3:<br>
+; CHECK-NEXT: [[TMP33:%.*]] = getelementptr i8, i8* [[TMP0]], i8 14<br>
+; CHECK-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP1]], i8 14<br>
+; CHECK-NEXT: [[TMP35:%.*]] = load i8, i8* [[TMP33]]<br>
+; CHECK-NEXT: [[TMP36:%.*]] = load i8, i8* [[TMP34]]<br>
+; CHECK-NEXT: [[TMP37:%.*]] = zext i8 [[TMP35]] to i32<br>
+; CHECK-NEXT: [[TMP38:%.*]] = zext i8 [[TMP36]] to i32<br>
+; CHECK-NEXT: [[TMP39:%.*]] = sub i32 [[TMP37]], [[TMP38]]<br>
+; CHECK-NEXT: br label [[ENDBLOCK]]<br>
+; CHECK: endblock:<br>
+; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP39]], [[LOADBB3]] ], [ [[TMP3]], [[RES_BLOCK]] ]<br>
+; CHECK-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+; CHECK-BE-LABEL: @test3(<br>
+; CHECK-BE-NEXT: entry:<br>
+; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*<br>
+; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*<br>
+; CHECK-BE-NEXT: br label [[LOADBB:%.*]]<br>
+; CHECK-BE: res_block:<br>
+; CHECK-BE-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP15:%.*]], [[LOADBB1:%.*]] ], [ [[TMP24:%.*]], [[LOADBB2:%.*]] ]<br>
+; CHECK-BE-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1]] ], [ [[TMP25:%.*]], [[LOADBB2]] ]<br>
+; CHECK-BE-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]<br>
+; CHECK-BE-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1<br>
+; CHECK-BE-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; CHECK-BE: loadbb:<br>
+; CHECK-BE-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64*<br>
+; CHECK-BE-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64*<br>
+; CHECK-BE-NEXT: [[TMP6]] = load i64, i64* [[TMP4]]<br>
+; CHECK-BE-NEXT: [[TMP7]] = load i64, i64* [[TMP5]]<br>
+; CHECK-BE-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]]<br>
+; CHECK-BE-NEXT: br i1 [[TMP8]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]<br>
+; CHECK-BE: loadbb1:<br>
+; CHECK-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8<br>
+; CHECK-BE-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*<br>
+; CHECK-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8<br>
+; CHECK-BE-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32*<br>
+; CHECK-BE-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP10]]<br>
+; CHECK-BE-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]]<br>
+; CHECK-BE-NEXT: [[TMP15]] = zext i32 [[TMP13]] to i64<br>
+; CHECK-BE-NEXT: [[TMP16]] = zext i32 [[TMP14]] to i64<br>
+; CHECK-BE-NEXT: [[TMP17:%.*]] = icmp eq i64 [[TMP15]], [[TMP16]]<br>
+; CHECK-BE-NEXT: br i1 [[TMP17]], label [[LOADBB2]], label [[RES_BLOCK]]<br>
+; CHECK-BE: loadbb2:<br>
+; CHECK-BE-NEXT: [[TMP18:%.*]] = getelementptr i8, i8* [[TMP0]], i8 12<br>
+; CHECK-BE-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to i16*<br>
+; CHECK-BE-NEXT: [[TMP20:%.*]] = getelementptr i8, i8* [[TMP1]], i8 12<br>
+; CHECK-BE-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16*<br>
+; CHECK-BE-NEXT: [[TMP22:%.*]] = load i16, i16* [[TMP19]]<br>
+; CHECK-BE-NEXT: [[TMP23:%.*]] = load i16, i16* [[TMP21]]<br>
+; CHECK-BE-NEXT: [[TMP24]] = zext i16 [[TMP22]] to i64<br>
+; CHECK-BE-NEXT: [[TMP25]] = zext i16 [[TMP23]] to i64<br>
+; CHECK-BE-NEXT: [[TMP26:%.*]] = icmp eq i64 [[TMP24]], [[TMP25]]<br>
+; CHECK-BE-NEXT: br i1 [[TMP26]], label [[LOADBB3:%.*]], label [[RES_BLOCK]]<br>
+; CHECK-BE: loadbb3:<br>
+; CHECK-BE-NEXT: [[TMP27:%.*]] = getelementptr i8, i8* [[TMP0]], i8 14<br>
+; CHECK-BE-NEXT: [[TMP28:%.*]] = getelementptr i8, i8* [[TMP1]], i8 14<br>
+; CHECK-BE-NEXT: [[TMP29:%.*]] = load i8, i8* [[TMP27]]<br>
+; CHECK-BE-NEXT: [[TMP30:%.*]] = load i8, i8* [[TMP28]]<br>
+; CHECK-BE-NEXT: [[TMP31:%.*]] = zext i8 [[TMP29]] to i32<br>
+; CHECK-BE-NEXT: [[TMP32:%.*]] = zext i8 [[TMP30]] to i32<br>
+; CHECK-BE-NEXT: [[TMP33:%.*]] = sub i32 [[TMP31]], [[TMP32]]<br>
+; CHECK-BE-NEXT: br label [[ENDBLOCK]]<br>
+; CHECK-BE: endblock:<br>
+; CHECK-BE-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP33]], [[LOADBB3]] ], [ [[TMP3]], [[RES_BLOCK]] ]<br>
+; CHECK-BE-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+entry:<br>
+ %0 = bitcast i32* %buffer1 to i8*<br>
+ %1 = bitcast i32* %buffer2 to i8*<br>
+ %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 15)<br>
+ ret i32 %call<br>
+}<br>
+<br>
+define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
+; CHECK-LABEL: @test4(<br>
+; CHECK-NEXT: entry:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*<br>
+; CHECK-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 65)<br>
+; CHECK-NEXT: ret i32 [[CALL]]<br>
+;<br>
+; CHECK-BE-LABEL: @test4(<br>
+; CHECK-BE-NEXT: entry:<br>
+; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*<br>
+; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*<br>
+; CHECK-BE-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 65)<br>
+; CHECK-BE-NEXT: ret i32 [[CALL]]<br>
+;<br>
+entry:<br>
+ %0 = bitcast i32* %buffer1 to i8*<br>
+ %1 = bitcast i32* %buffer2 to i8*<br>
+ %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 65)<br>
+ ret i32 %call<br>
+}<br>
+<br>
+define signext i32 @test5(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2, i32 signext %SIZE) {<br>
+; CHECK-LABEL: @test5(<br>
+; CHECK-NEXT: entry:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*<br>
+; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[SIZE:%.*]] to i64<br>
+; CHECK-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 [[CONV]])<br>
+; CHECK-NEXT: ret i32 [[CALL]]<br>
+;<br>
+; CHECK-BE-LABEL: @test5(<br>
+; CHECK-BE-NEXT: entry:<br>
+; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*<br>
+; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*<br>
+; CHECK-BE-NEXT: [[CONV:%.*]] = sext i32 [[SIZE:%.*]] to i64<br>
+; CHECK-BE-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 [[CONV]])<br>
+; CHECK-BE-NEXT: ret i32 [[CALL]]<br>
+;<br>
+entry:<br>
+ %0 = bitcast i32* %buffer1 to i8*<br>
+ %1 = bitcast i32* %buffer2 to i8*<br>
+ %conv = sext i32 %SIZE to i64<br>
+ %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 %conv)<br>
+ ret i32 %call<br>
+}<br>
<br>
Modified: llvm/trunk/test/Transforms/ExpandMemCmp/X86/memcmp.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ExpandMemCmp/X86/memcmp.ll?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ExpandMemCmp/X86/memcmp.ll?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/ExpandMemCmp/X86/memcmp.ll (original)<br>
+++ llvm/trunk/test/Transforms/ExpandMemCmp/X86/memcmp.ll Tue Sep 10 02:18:00 2019<br>
@@ -1,7 +1,7 @@<br>
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
-; RUN: opt -S -expandmemcmp -mtriple=i686-unknown-unknown -data-layout=e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X32<br>
-; RUN: opt -S -expandmemcmp -memcmp-num-loads-per-block=1 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_1LD<br>
-; RUN: opt -S -expandmemcmp -memcmp-num-loads-per-block=2 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_2LD<br>
+; RUN: opt -S -domtree -expandmemcmp -verify-dom-info -mtriple=i686-unknown-unknown -data-layout=e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X32<br>
+; RUN: opt -S -domtree -expandmemcmp -verify-dom-info -memcmp-num-loads-per-block=1 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 -mattr=+avx2 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_1LD<br>
+; RUN: opt -S -domtree -expandmemcmp -verify-dom-info -memcmp-num-loads-per-block=2 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 -mattr=+avx2 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_2LD<br>
<br>
declare i32 @memcmp(i8* nocapture, i8* nocapture, i64)<br>
<br>
@@ -1215,5 +1215,88 @@ define i32 @cmp_eq16(i8* nocapture reado<br>
%cmp = icmp eq i32 %call, 0<br>
%conv = zext i1 %cmp to i32<br>
ret i32 %conv<br>
+}<br>
+<br>
+define i32 @cmp_eq32(i8* nocapture readonly %x, i8* nocapture readonly %y) {<br>
+; X32-LABEL: @cmp_eq32(<br>
+; X32-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 32)<br>
+; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0<br>
+; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32<br>
+; X32-NEXT: ret i32 [[CONV]]<br>
+;<br>
+; X64-LABEL: @cmp_eq32(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i256*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i256*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i256, i256* [[TMP1]]<br>
+; X64-NEXT: [[TMP4:%.*]] = load i256, i256* [[TMP2]]<br>
+; X64-NEXT: [[TMP5:%.*]] = icmp ne i256 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32<br>
+; X64-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0<br>
+; X64-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32<br>
+; X64-NEXT: ret i32 [[CONV]]<br>
+;<br>
+ %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 32)<br>
+ %cmp = icmp eq i32 %call, 0<br>
+ %conv = zext i1 %cmp to i32<br>
+ ret i32 %conv<br>
+}<br>
+<br>
+define i32 @cmp_eq32_prefer128(i8* nocapture readonly %x, i8* nocapture readonly %y) "prefer-vector-width"="128" {<br>
+; X32-LABEL: @cmp_eq32_prefer128(<br>
+; X32-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 32)<br>
+; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0<br>
+; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32<br>
+; X32-NEXT: ret i32 [[CONV]]<br>
+;<br>
+; X64_1LD-LABEL: @cmp_eq32_prefer128(<br>
+; X64_1LD-NEXT: br label [[LOADBB:%.*]]<br>
+; X64_1LD: res_block:<br>
+; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; X64_1LD: loadbb:<br>
+; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128*<br>
+; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128*<br>
+; X64_1LD-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]]<br>
+; X64_1LD-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]]<br>
+; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i128 [[TMP3]], [[TMP4]]<br>
+; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]<br>
+; X64_1LD: loadbb1:<br>
+; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i8 16<br>
+; X64_1LD-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i128*<br>
+; X64_1LD-NEXT: [[TMP8:%.*]] = getelementptr i8, i8* [[Y]], i8 16<br>
+; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i128*<br>
+; X64_1LD-NEXT: [[TMP10:%.*]] = load i128, i128* [[TMP7]]<br>
+; X64_1LD-NEXT: [[TMP11:%.*]] = load i128, i128* [[TMP9]]<br>
+; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i128 [[TMP10]], [[TMP11]]<br>
+; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]]<br>
+; X64_1LD: endblock:<br>
+; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]<br>
+; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0<br>
+; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32<br>
+; X64_1LD-NEXT: ret i32 [[CONV]]<br>
+;<br>
+; X64_2LD-LABEL: @cmp_eq32_prefer128(<br>
+; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128*<br>
+; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128*<br>
+; X64_2LD-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]]<br>
+; X64_2LD-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]]<br>
+; X64_2LD-NEXT: [[TMP5:%.*]] = xor i128 [[TMP3]], [[TMP4]]<br>
+; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i8 16<br>
+; X64_2LD-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i128*<br>
+; X64_2LD-NEXT: [[TMP8:%.*]] = getelementptr i8, i8* [[Y]], i8 16<br>
+; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i128*<br>
+; X64_2LD-NEXT: [[TMP10:%.*]] = load i128, i128* [[TMP7]]<br>
+; X64_2LD-NEXT: [[TMP11:%.*]] = load i128, i128* [[TMP9]]<br>
+; X64_2LD-NEXT: [[TMP12:%.*]] = xor i128 [[TMP10]], [[TMP11]]<br>
+; X64_2LD-NEXT: [[TMP13:%.*]] = or i128 [[TMP5]], [[TMP12]]<br>
+; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i128 [[TMP13]], 0<br>
+; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32<br>
+; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0<br>
+; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32<br>
+; X64_2LD-NEXT: ret i32 [[CONV]]<br>
+;<br>
+ %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 32)<br>
+ %cmp = icmp eq i32 %call, 0<br>
+ %conv = zext i1 %cmp to i32<br>
+ ret i32 %conv<br>
}<br>
<br>
<br>
Added: llvm/trunk/test/Transforms/ExpandMemCmp/X86/pr36421.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ExpandMemCmp/X86/pr36421.ll?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ExpandMemCmp/X86/pr36421.ll?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/ExpandMemCmp/X86/pr36421.ll (added)<br>
+++ llvm/trunk/test/Transforms/ExpandMemCmp/X86/pr36421.ll Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,79 @@<br>
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
+; RUN: opt < %s -domtree -expandmemcmp -verify-dom-info -S | FileCheck %s<br>
+<br>
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"<br>
+target triple = "x86_64-unknown-unknown"<br>
+<br>
+@.str = private unnamed_addr constant [7 x i8] c"abcdef\00", align 1<br>
+@.str.1 = private unnamed_addr constant [7 x i8] c"ABCDEF\00", align 1<br>
+<br>
+define i32 @test(i8* nocapture readonly %string, i32 %len) local_unnamed_addr #0 {<br>
+; CHECK-LABEL: @test(<br>
+; CHECK-NEXT: entry:<br>
+; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[LEN:%.*]], 6<br>
+; CHECK-NEXT: br i1 [[COND]], label [[SW_BB:%.*]], label [[RETURN:%.*]]<br>
+; CHECK: <a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a>:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[STRING:%.*]] to i32*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]]<br>
+; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 1684234849<br>
+; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, i8* [[STRING]], i8 4<br>
+; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to i16*<br>
+; CHECK-NEXT: [[TMP5:%.*]] = load i16, i16* [[TMP4]]<br>
+; CHECK-NEXT: [[TMP6:%.*]] = zext i16 [[TMP5]] to i32<br>
+; CHECK-NEXT: [[TMP7:%.*]] = xor i32 [[TMP6]], 26213<br>
+; CHECK-NEXT: [[TMP8:%.*]] = or i32 [[TMP2]], [[TMP7]]<br>
+; CHECK-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0<br>
+; CHECK-NEXT: [[TMP10:%.*]] = zext i1 [[TMP9]] to i32<br>
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP10]], 0<br>
+; CHECK-NEXT: br i1 [[CMP]], label [[RETURN]], label [[IF_END:%.*]]<br>
+; CHECK: if.end:<br>
+; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8* [[STRING]] to i32*<br>
+; CHECK-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]]<br>
+; CHECK-NEXT: [[TMP13:%.*]] = xor i32 [[TMP12]], 1145258561<br>
+; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, i8* [[STRING]], i8 4<br>
+; CHECK-NEXT: [[TMP15:%.*]] = bitcast i8* [[TMP14]] to i16*<br>
+; CHECK-NEXT: [[TMP16:%.*]] = load i16, i16* [[TMP15]]<br>
+; CHECK-NEXT: [[TMP17:%.*]] = zext i16 [[TMP16]] to i32<br>
+; CHECK-NEXT: [[TMP18:%.*]] = xor i32 [[TMP17]], 17989<br>
+; CHECK-NEXT: [[TMP19:%.*]] = or i32 [[TMP13]], [[TMP18]]<br>
+; CHECK-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0<br>
+; CHECK-NEXT: [[TMP21:%.*]] = zext i1 [[TMP20]] to i32<br>
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[TMP21]], 0<br>
+; CHECK-NEXT: [[DOT:%.*]] = select i1 [[CMP2]], i32 64, i32 0<br>
+; CHECK-NEXT: br label [[RETURN]]<br>
+; CHECK: return:<br>
+; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 61, [[SW_BB]] ], [ [[DOT]], [[IF_END]] ], [ 0, [[ENTRY:%.*]] ]<br>
+; CHECK-NEXT: ret i32 [[RETVAL_0]]<br>
+;<br>
+entry:<br>
+ %cond = icmp eq i32 %len, 6<br>
+ br i1 %cond, label %<a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a>, label %return<br>
+<br>
+<a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a>: ; preds = %entry<br>
+ %call = tail call i32 @memcmp(i8* %string, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 6)<br>
+ %cmp = icmp eq i32 %call, 0<br>
+ br i1 %cmp, label %return, label %if.end<br>
+<br>
+if.end: ; preds = %<a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a><br>
+ %call1 = tail call i32 @memcmp(i8* %string, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i64 6)<br>
+ %cmp2 = icmp eq i32 %call1, 0<br>
+ %. = select i1 %cmp2, i32 64, i32 0<br>
+ br label %return<br>
+<br>
+return: ; preds = %entry, %if.end8, %if.end4, %if.end, %<a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a><br>
+ %retval.0 = phi i32 [ 61, %<a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a> ], [ %., %if.end ], [ 0, %entry ]<br>
+ ret i32 %retval.0<br>
+}<br>
+<br>
+; Function Attrs: nounwind readonly<br>
+declare i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1<br>
+<br>
+attributes #0 = { nounwind readonly ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>
+attributes #1 = { nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>
+<br>
+!llvm.module.flags = !{!0, !1}<br>
+!llvm.ident = !{!2}<br>
+<br>
+!0 = !{i32 1, !"wchar_size", i32 4}<br>
+!1 = !{i32 7, !"PIC Level", i32 2}<br>
+!2 = !{!"clang version 7.0.0 (trunk 325350)"}<br>
<br>
Added: llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/lit.local.cfg<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/lit.local.cfg?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/lit.local.cfg?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/lit.local.cfg (added)<br>
+++ llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/lit.local.cfg Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,2 @@<br>
+if not 'PowerPC' in config.root.targets:<br>
+ config.unsupported = True<br>
<br>
Added: llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memCmpUsedInZeroEqualityComparison.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memCmpUsedInZeroEqualityComparison.ll?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memCmpUsedInZeroEqualityComparison.ll?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memCmpUsedInZeroEqualityComparison.ll (added)<br>
+++ llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memCmpUsedInZeroEqualityComparison.ll Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,174 @@<br>
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
+; RUN: opt < %s -O2 -S -mcpu=pwr8 < %s | FileCheck %s<br>
+target datalayout = "e-m:e-i64:64-n32:64"<br>
+target triple = "powerpc64le-unknown-linux-gnu"<br>
+<br>
+@zeroEqualityTest01.buffer1 = private unnamed_addr constant [3 x i32] [i32 1, i32 2, i32 4], align 4<br>
+@zeroEqualityTest01.buffer2 = private unnamed_addr constant [3 x i32] [i32 1, i32 2, i32 3], align 4<br>
+@zeroEqualityTest02.buffer1 = private unnamed_addr constant [4 x i32] [i32 4, i32 0, i32 0, i32 0], align 4<br>
+@zeroEqualityTest02.buffer2 = private unnamed_addr constant [4 x i32] [i32 3, i32 0, i32 0, i32 0], align 4<br>
+@zeroEqualityTest03.buffer1 = private unnamed_addr constant [4 x i32] [i32 0, i32 0, i32 0, i32 3], align 4<br>
+@zeroEqualityTest03.buffer2 = private unnamed_addr constant [4 x i32] [i32 0, i32 0, i32 0, i32 4], align 4<br>
+@zeroEqualityTest04.buffer1 = private unnamed_addr constant [15 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14], align 4<br>
+@zeroEqualityTest04.buffer2 = private unnamed_addr constant [15 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 13], align 4<br>
+<br>
+declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1<br>
+<br>
+; Check 4 bytes - requires 1 load for each param.<br>
+define signext i32 @zeroEqualityTest02(i8* %x, i8* %y) {<br>
+; CHECK-LABEL: @zeroEqualityTest02(<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4<br>
+; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]<br>
+; CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32<br>
+; CHECK-NEXT: ret i32 [[TMP6]]<br>
+;<br>
+ %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 4)<br>
+ %not.cmp = icmp ne i32 %call, 0<br>
+ %. = zext i1 %not.cmp to i32<br>
+ ret i32 %.<br>
+}<br>
+<br>
+; Check 16 bytes - requires 2 loads for each param (or use vectors?).<br>
+define signext i32 @zeroEqualityTest01(i8* %x, i8* %y) {<br>
+; CHECK-LABEL: @zeroEqualityTest01(<br>
+; CHECK-NEXT: loadbb:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]], align 8<br>
+; CHECK-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[TMP2]], [[TMP3]]<br>
+; CHECK-NEXT: br i1 [[TMP4]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]<br>
+; CHECK: res_block:<br>
+; CHECK-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; CHECK: loadbb1:<br>
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 8<br>
+; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64*<br>
+; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8<br>
+; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64*<br>
+; CHECK-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]], align 8<br>
+; CHECK-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 8<br>
+; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[TMP9]], [[TMP10]]<br>
+; CHECK-NEXT: br i1 [[TMP11]], label [[ENDBLOCK]], label [[RES_BLOCK]]<br>
+; CHECK: endblock:<br>
+; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]<br>
+; CHECK-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+ %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 16)<br>
+ %not.tobool = icmp ne i32 %call, 0<br>
+ %. = zext i1 %not.tobool to i32<br>
+ ret i32 %.<br>
+}<br>
+<br>
+; Check 7 bytes - requires 3 loads for each param.<br>
+define signext i32 @zeroEqualityTest03(i8* %x, i8* %y) {<br>
+; CHECK-LABEL: @zeroEqualityTest03(<br>
+; CHECK-NEXT: loadbb:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4<br>
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]]<br>
+; CHECK-NEXT: br i1 [[TMP4]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]<br>
+; CHECK: res_block:<br>
+; CHECK-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; CHECK: loadbb1:<br>
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 4<br>
+; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i16*<br>
+; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4<br>
+; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16*<br>
+; CHECK-NEXT: [[TMP9:%.*]] = load i16, i16* [[TMP6]], align 2<br>
+; CHECK-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]], align 2<br>
+; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i16 [[TMP9]], [[TMP10]]<br>
+; CHECK-NEXT: br i1 [[TMP11]], label [[LOADBB2:%.*]], label [[RES_BLOCK]]<br>
+; CHECK: loadbb2:<br>
+; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[X]], i64 6<br>
+; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[Y]], i64 6<br>
+; CHECK-NEXT: [[TMP14:%.*]] = load i8, i8* [[TMP12]], align 1<br>
+; CHECK-NEXT: [[TMP15:%.*]] = load i8, i8* [[TMP13]], align 1<br>
+; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i8 [[TMP14]], [[TMP15]]<br>
+; CHECK-NEXT: br i1 [[TMP16]], label [[ENDBLOCK]], label [[RES_BLOCK]]<br>
+; CHECK: endblock:<br>
+; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB2]] ], [ 1, [[RES_BLOCK]] ]<br>
+; CHECK-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+ %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 7)<br>
+ %not.lnot = icmp ne i32 %call, 0<br>
+ %cond = zext i1 %not.lnot to i32<br>
+ ret i32 %cond<br>
+}<br>
+<br>
+; Validate with > 0<br>
+define signext i32 @zeroEqualityTest04() {<br>
+; CHECK-LABEL: @zeroEqualityTest04(<br>
+; CHECK-NEXT: loadbb:<br>
+; CHECK-NEXT: ret i32 0<br>
+;<br>
+ %call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer2 to i8*), i64 16)<br>
+ %not.cmp = icmp slt i32 %call, 1<br>
+ %. = zext i1 %not.cmp to i32<br>
+ ret i32 %.<br>
+}<br>
+<br>
+; Validate with < 0<br>
+define signext i32 @zeroEqualityTest05() {<br>
+; CHECK-LABEL: @zeroEqualityTest05(<br>
+; CHECK-NEXT: loadbb:<br>
+; CHECK-NEXT: ret i32 0<br>
+;<br>
+ %call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer2 to i8*), i64 16)<br>
+ %call.lobit = lshr i32 %call, 31<br>
+ %call.lobit.not = xor i32 %call.lobit, 1<br>
+ ret i32 %call.lobit.not<br>
+}<br>
+<br>
+; Validate with memcmp()?:<br>
+define signext i32 @equalityFoldTwoConstants() {<br>
+; CHECK-LABEL: @equalityFoldTwoConstants(<br>
+; CHECK-NEXT: loadbb:<br>
+; CHECK-NEXT: ret i32 1<br>
+;<br>
+ %call = tail call signext i32 @memcmp(i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer1 to i8*), i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer2 to i8*), i64 16)<br>
+ %not.tobool = icmp eq i32 %call, 0<br>
+ %cond = zext i1 %not.tobool to i32<br>
+ ret i32 %cond<br>
+}<br>
+<br>
+define signext i32 @equalityFoldOneConstant(i8* %X) {<br>
+; CHECK-LABEL: @equalityFoldOneConstant(<br>
+; CHECK-NEXT: loadbb:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = load i64, i64* [[TMP0]], align 8<br>
+; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4294967296<br>
+; CHECK-NEXT: br i1 [[TMP2]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]<br>
+; CHECK: res_block:<br>
+; CHECK-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; CHECK: loadbb1:<br>
+; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, i8* [[X]], i64 8<br>
+; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to i64*<br>
+; CHECK-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP4]], align 8<br>
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 12884901890<br>
+; CHECK-NEXT: br i1 [[TMP6]], label [[ENDBLOCK]], label [[RES_BLOCK]]<br>
+; CHECK: endblock:<br>
+; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 1, [[LOADBB1]] ], [ 0, [[RES_BLOCK]] ]<br>
+; CHECK-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+ %call = tail call signext i32 @memcmp(i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer1 to i8*), i8* %X, i64 16)<br>
+ %not.tobool = icmp eq i32 %call, 0<br>
+ %cond = zext i1 %not.tobool to i32<br>
+ ret i32 %cond<br>
+}<br>
+<br>
+define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) {<br>
+; CHECK-LABEL: @length2_eq_nobuiltin_attr(<br>
+; CHECK-NEXT: [[M:%.*]] = tail call signext i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 2) #2<br>
+; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; CHECK-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call signext i32 @memcmp(i8* %X, i8* %Y, i64 2) nobuiltin<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
<br>
Added: llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp-mergeexpand.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp-mergeexpand.ll?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp-mergeexpand.ll?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp-mergeexpand.ll (added)<br>
+++ llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp-mergeexpand.ll Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,49 @@<br>
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
+; RUN: opt -S -mergeicmps -expandmemcmp -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux < %s | FileCheck %s --check-prefix=PPC64LE<br>
+<br>
+; This tests interaction between MergeICmp and ExpandMemCmp.<br>
+<br>
+%"struct.std::pair" = type { i32, i32 }<br>
+<br>
+define zeroext i1 @opeq1(<br>
+; PPC64LE-LABEL: @opeq1(<br>
+; PPC64LE-NEXT: "entry+land.rhs.i":<br>
+; PPC64LE-NEXT: [[TMP0:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[A:%.*]], i64 0, i32 0<br>
+; PPC64LE-NEXT: [[TMP1:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[B:%.*]], i64 0, i32 0<br>
+; PPC64LE-NEXT: [[CSTR:%.*]] = bitcast i32* [[TMP0]] to i8*<br>
+; PPC64LE-NEXT: [[CSTR1:%.*]] = bitcast i32* [[TMP1]] to i8*<br>
+; PPC64LE-NEXT: [[TMP2:%.*]] = bitcast i8* [[CSTR]] to i64*<br>
+; PPC64LE-NEXT: [[TMP3:%.*]] = bitcast i8* [[CSTR1]] to i64*<br>
+; PPC64LE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]]<br>
+; PPC64LE-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP3]]<br>
+; PPC64LE-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP4]], [[TMP5]]<br>
+; PPC64LE-NEXT: [[TMP7:%.*]] = zext i1 [[TMP6]] to i32<br>
+; PPC64LE-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0<br>
+; PPC64LE-NEXT: br label [[OPEQ1_EXIT:%.*]]<br>
+; PPC64LE: opeq1.exit:<br>
+; PPC64LE-NEXT: ret i1 [[TMP8]]<br>
+;<br>
+ %"struct.std::pair"* nocapture readonly dereferenceable(8) %a,<br>
+ %"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 {<br>
+entry:<br>
+ %first.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 0<br>
+ %0 = load i32, i32* %first.i, align 4<br>
+ %first1.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 0<br>
+ %1 = load i32, i32* %first1.i, align 4<br>
+ %cmp.i = icmp eq i32 %0, %1<br>
+ br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit<br>
+<br>
+land.rhs.i:<br>
+ %second.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 1<br>
+ %2 = load i32, i32* %second.i, align 4<br>
+ %second2.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 1<br>
+ %3 = load i32, i32* %second2.i, align 4<br>
+ %cmp3.i = icmp eq i32 %2, %3<br>
+ br label %opeq1.exit<br>
+<br>
+opeq1.exit:<br>
+ %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ]<br>
+ ret i1 %4<br>
+}<br>
+<br>
+<br>
<br>
Added: llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll (added)<br>
+++ llvm/trunk/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,80 @@<br>
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
+; RUN: opt < %s -O2 -S -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux | FileCheck %s -check-prefix=CHECK<br>
+<br>
+define signext i32 @memcmp8(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
+; CHECK-LABEL: @memcmp8(<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i64*<br>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i64*<br>
+; CHECK-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 4<br>
+; CHECK-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 4<br>
+; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])<br>
+; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])<br>
+; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP5]], [[TMP6]]<br>
+; CHECK-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP5]], [[TMP6]]<br>
+; CHECK-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32<br>
+; CHECK-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32<br>
+; CHECK-NEXT: [[TMP11:%.*]] = sub nsw i32 [[TMP9]], [[TMP10]]<br>
+; CHECK-NEXT: ret i32 [[TMP11]]<br>
+;<br>
+ %t0 = bitcast i32* %buffer1 to i8*<br>
+ %t1 = bitcast i32* %buffer2 to i8*<br>
+ %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 8)<br>
+ ret i32 %call<br>
+}<br>
+<br>
+define signext i32 @memcmp4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
+; CHECK-LABEL: @memcmp4(<br>
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[BUFFER1:%.*]], align 4<br>
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[BUFFER2:%.*]], align 4<br>
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]])<br>
+; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])<br>
+; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i32 [[TMP3]], [[TMP4]]<br>
+; CHECK-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP3]], [[TMP4]]<br>
+; CHECK-NEXT: [[TMP7:%.*]] = zext i1 [[TMP5]] to i32<br>
+; CHECK-NEXT: [[TMP8:%.*]] = zext i1 [[TMP6]] to i32<br>
+; CHECK-NEXT: [[TMP9:%.*]] = sub nsw i32 [[TMP7]], [[TMP8]]<br>
+; CHECK-NEXT: ret i32 [[TMP9]]<br>
+;<br>
+ %t0 = bitcast i32* %buffer1 to i8*<br>
+ %t1 = bitcast i32* %buffer2 to i8*<br>
+ %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 4)<br>
+ ret i32 %call<br>
+}<br>
+<br>
+define signext i32 @memcmp2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
+; CHECK-LABEL: @memcmp2(<br>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i16*<br>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i16*<br>
+; CHECK-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2<br>
+; CHECK-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2<br>
+; CHECK-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])<br>
+; CHECK-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]])<br>
+; CHECK-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32<br>
+; CHECK-NEXT: [[TMP8:%.*]] = zext i16 [[TMP6]] to i32<br>
+; CHECK-NEXT: [[TMP9:%.*]] = sub nsw i32 [[TMP7]], [[TMP8]]<br>
+; CHECK-NEXT: ret i32 [[TMP9]]<br>
+;<br>
+ %t0 = bitcast i32* %buffer1 to i8*<br>
+ %t1 = bitcast i32* %buffer2 to i8*<br>
+ %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 2)<br>
+ ret i32 %call<br>
+}<br>
+<br>
+define signext i32 @memcmp1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {<br>
+; CHECK-LABEL: @memcmp1(<br>
+; CHECK-NEXT: [[T0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*<br>
+; CHECK-NEXT: [[T1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*<br>
+; CHECK-NEXT: [[LHSC:%.*]] = load i8, i8* [[T0]], align 1<br>
+; CHECK-NEXT: [[LHSV:%.*]] = zext i8 [[LHSC]] to i32<br>
+; CHECK-NEXT: [[RHSC:%.*]] = load i8, i8* [[T1]], align 1<br>
+; CHECK-NEXT: [[RHSV:%.*]] = zext i8 [[RHSC]] to i32<br>
+; CHECK-NEXT: [[CHARDIFF:%.*]] = sub nsw i32 [[LHSV]], [[RHSV]]<br>
+; CHECK-NEXT: ret i32 [[CHARDIFF]]<br>
+;<br>
+ %t0 = bitcast i32* %buffer1 to i8*<br>
+ %t1 = bitcast i32* %buffer2 to i8*<br>
+ %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 1) #2<br>
+ ret i32 %call<br>
+}<br>
+<br>
+declare signext i32 @memcmp(i8*, i8*, i64)<br>
<br>
Added: llvm/trunk/test/Transforms/PhaseOrdering/X86/lit.local.cfg<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/X86/lit.local.cfg?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/X86/lit.local.cfg?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/PhaseOrdering/X86/lit.local.cfg (added)<br>
+++ llvm/trunk/test/Transforms/PhaseOrdering/X86/lit.local.cfg Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,2 @@<br>
+if not 'X86' in config.root.targets:<br>
+ config.unsupported = True<br>
<br>
Added: llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp-mergeexpand.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp-mergeexpand.ll?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp-mergeexpand.ll?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp-mergeexpand.ll (added)<br>
+++ llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp-mergeexpand.ll Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,76 @@<br>
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
+; RUN: opt -S -mergeicmps -expandmemcmp -mtriple=i386-unknown-linux < %s | FileCheck %s --check-prefix=X86<br>
+; RUN: opt -S -mergeicmps -expandmemcmp -mtriple=x86_64-unknown-linux < %s | FileCheck %s --check-prefix=X64<br>
+<br>
+; This tests interaction between MergeICmp and ExpandMemCmp.<br>
+<br>
+%"struct.std::pair" = type { i32, i32 }<br>
+<br>
+define zeroext i1 @opeq1(<br>
+; X86-LABEL: @opeq1(<br>
+; X86-NEXT: "entry+land.rhs.i":<br>
+; X86-NEXT: [[TMP0:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[A:%.*]], i64 0, i32 0<br>
+; X86-NEXT: [[TMP1:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[B:%.*]], i64 0, i32 0<br>
+; X86-NEXT: [[CSTR:%.*]] = bitcast i32* [[TMP0]] to i8*<br>
+; X86-NEXT: [[CSTR1:%.*]] = bitcast i32* [[TMP1]] to i8*<br>
+; X86-NEXT: [[TMP2:%.*]] = bitcast i8* [[CSTR]] to i32*<br>
+; X86-NEXT: [[TMP3:%.*]] = bitcast i8* [[CSTR1]] to i32*<br>
+; X86-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]]<br>
+; X86-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]]<br>
+; X86-NEXT: [[TMP6:%.*]] = xor i32 [[TMP4]], [[TMP5]]<br>
+; X86-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[CSTR]], i8 4<br>
+; X86-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*<br>
+; X86-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[CSTR1]], i8 4<br>
+; X86-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*<br>
+; X86-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP8]]<br>
+; X86-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]]<br>
+; X86-NEXT: [[TMP13:%.*]] = xor i32 [[TMP11]], [[TMP12]]<br>
+; X86-NEXT: [[TMP14:%.*]] = or i32 [[TMP6]], [[TMP13]]<br>
+; X86-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0<br>
+; X86-NEXT: [[TMP16:%.*]] = zext i1 [[TMP15]] to i32<br>
+; X86-NEXT: [[TMP17:%.*]] = icmp eq i32 [[TMP16]], 0<br>
+; X86-NEXT: br label [[OPEQ1_EXIT:%.*]]<br>
+; X86: opeq1.exit:<br>
+; X86-NEXT: ret i1 [[TMP17]]<br>
+;<br>
+; X64-LABEL: @opeq1(<br>
+; X64-NEXT: "entry+land.rhs.i":<br>
+; X64-NEXT: [[TMP0:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[A:%.*]], i64 0, i32 0<br>
+; X64-NEXT: [[TMP1:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[B:%.*]], i64 0, i32 0<br>
+; X64-NEXT: [[CSTR:%.*]] = bitcast i32* [[TMP0]] to i8*<br>
+; X64-NEXT: [[CSTR1:%.*]] = bitcast i32* [[TMP1]] to i8*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[CSTR]] to i64*<br>
+; X64-NEXT: [[TMP3:%.*]] = bitcast i8* [[CSTR1]] to i64*<br>
+; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]]<br>
+; X64-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP3]]<br>
+; X64-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP4]], [[TMP5]]<br>
+; X64-NEXT: [[TMP7:%.*]] = zext i1 [[TMP6]] to i32<br>
+; X64-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0<br>
+; X64-NEXT: br label [[OPEQ1_EXIT:%.*]]<br>
+; X64: opeq1.exit:<br>
+; X64-NEXT: ret i1 [[TMP8]]<br>
+;<br>
+ %"struct.std::pair"* nocapture readonly dereferenceable(8) %a,<br>
+ %"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 {<br>
+entry:<br>
+ %first.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 0<br>
+ %0 = load i32, i32* %first.i, align 4<br>
+ %first1.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 0<br>
+ %1 = load i32, i32* %first1.i, align 4<br>
+ %cmp.i = icmp eq i32 %0, %1<br>
+ br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit<br>
+<br>
+land.rhs.i:<br>
+ %second.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 1<br>
+ %2 = load i32, i32* %second.i, align 4<br>
+ %second2.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 1<br>
+ %3 = load i32, i32* %second2.i, align 4<br>
+ %cmp3.i = icmp eq i32 %2, %3<br>
+ br label %opeq1.exit<br>
+<br>
+opeq1.exit:<br>
+ %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ]<br>
+ ret i1 %4<br>
+}<br>
+<br>
+<br>
<br>
Added: llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp.ll?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp.ll?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp.ll (added)<br>
+++ llvm/trunk/test/Transforms/PhaseOrdering/X86/memcmp.ll Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,995 @@<br>
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
+; RUN: opt < %s -O2 -S -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=X86<br>
+; RUN: opt < %s -O2 -S -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=X64<br>
+<br>
+; This tests interaction between the MergeICmp and ExpandMemCmp IR transform<br>
+; passes.<br>
+<br>
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"<br>
+<br>
+<br>
+@.str = private constant [65 x i8] c"0123456789012345678901234567890123456789012345678901234567890123\00", align 1<br>
+<br>
+declare i32 @memcmp(i8*, i8*, i64)<br>
+declare i32 @bcmp(i8*, i8*, i64)<br>
+<br>
+define i32 @length0(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length0(<br>
+; ALL-NEXT: ret i32 0<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @length0_eq(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length0_eq(<br>
+; ALL-NEXT: ret i1 true<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length0_lt(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length0_lt(<br>
+; ALL-NEXT: ret i1 false<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind<br>
+ %c = icmp slt i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i32 @length2(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length2(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2<br>
+; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])<br>
+; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]])<br>
+; ALL-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32<br>
+; ALL-NEXT: [[TMP8:%.*]] = zext i16 [[TMP6]] to i32<br>
+; ALL-NEXT: [[TMP9:%.*]] = sub nsw i32 [[TMP7]], [[TMP8]]<br>
+; ALL-NEXT: ret i32 [[TMP9]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @length2_eq(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length2_eq(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2<br>
+; ALL-NEXT: [[TMP5:%.*]] = icmp eq i16 [[TMP3]], [[TMP4]]<br>
+; ALL-NEXT: ret i1 [[TMP5]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length2_lt(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length2_lt(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2<br>
+; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])<br>
+; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]])<br>
+; ALL-NEXT: [[C:%.*]] = icmp ult i16 [[TMP5]], [[TMP6]]<br>
+; ALL-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
+ %c = icmp slt i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length2_gt(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length2_gt(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2<br>
+; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])<br>
+; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]])<br>
+; ALL-NEXT: [[C:%.*]] = icmp ugt i16 [[TMP5]], [[TMP6]]<br>
+; ALL-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
+ %c = icmp sgt i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length2_eq_const(i8* %X) nounwind {<br>
+; ALL-LABEL: @length2_eq_const(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2<br>
+; ALL-NEXT: [[TMP3:%.*]] = icmp ne i16 [[TMP2]], 12849<br>
+; ALL-NEXT: ret i1 [[TMP3]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 2) nounwind<br>
+ %c = icmp ne i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length2_eq_nobuiltin_attr(<br>
+; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 2) #5<br>
+; ALL-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; ALL-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind nobuiltin<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i32 @length3(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length3(<br>
+; ALL-NEXT: loadbb:<br>
+; ALL-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP0]], align 2<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2<br>
+; ALL-NEXT: [[TMP4:%.*]] = icmp eq i16 [[TMP2]], [[TMP3]]<br>
+; ALL-NEXT: br i1 [[TMP4]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]<br>
+; ALL: res_block:<br>
+; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP2]])<br>
+; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])<br>
+; ALL-NEXT: [[TMP7:%.*]] = icmp ult i16 [[TMP5]], [[TMP6]]<br>
+; ALL-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1<br>
+; ALL-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; ALL: loadbb1:<br>
+; ALL-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 2<br>
+; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[Y]], i64 2<br>
+; ALL-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP9]], align 1<br>
+; ALL-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]], align 1<br>
+; ALL-NEXT: [[TMP13:%.*]] = zext i8 [[TMP11]] to i32<br>
+; ALL-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32<br>
+; ALL-NEXT: [[TMP15:%.*]] = sub nsw i32 [[TMP13]], [[TMP14]]<br>
+; ALL-NEXT: br label [[ENDBLOCK]]<br>
+; ALL: endblock:<br>
+; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP15]], [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]<br>
+; ALL-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @length3_eq(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length3_eq(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2<br>
+; ALL-NEXT: [[TMP5:%.*]] = xor i16 [[TMP3]], [[TMP4]]<br>
+; ALL-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 2<br>
+; ALL-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 2<br>
+; ALL-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1<br>
+; ALL-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1<br>
+; ALL-NEXT: [[TMP10:%.*]] = xor i8 [[TMP8]], [[TMP9]]<br>
+; ALL-NEXT: [[TMP11:%.*]] = zext i8 [[TMP10]] to i16<br>
+; ALL-NEXT: [[TMP12:%.*]] = or i16 [[TMP5]], [[TMP11]]<br>
+; ALL-NEXT: [[TMP13:%.*]] = icmp ne i16 [[TMP12]], 0<br>
+; ALL-NEXT: ret i1 [[TMP13]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind<br>
+ %c = icmp ne i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i32 @length4(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length4(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4<br>
+; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])<br>
+; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]])<br>
+; ALL-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]]<br>
+; ALL-NEXT: [[TMP8:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]]<br>
+; ALL-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32<br>
+; ALL-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32<br>
+; ALL-NEXT: [[TMP11:%.*]] = sub nsw i32 [[TMP9]], [[TMP10]]<br>
+; ALL-NEXT: ret i32 [[TMP11]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @length4_eq(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length4_eq(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4<br>
+; ALL-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]<br>
+; ALL-NEXT: ret i1 [[TMP5]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind<br>
+ %c = icmp ne i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length4_lt(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length4_lt(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4<br>
+; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])<br>
+; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]])<br>
+; ALL-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]]<br>
+; ALL-NEXT: ret i1 [[TMP7]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind<br>
+ %c = icmp slt i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length4_gt(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length4_gt(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4<br>
+; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])<br>
+; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]])<br>
+; ALL-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]]<br>
+; ALL-NEXT: ret i1 [[TMP7]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind<br>
+ %c = icmp sgt i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length4_eq_const(i8* %X) nounwind {<br>
+; ALL-LABEL: @length4_eq_const(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; ALL-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 875770417<br>
+; ALL-NEXT: ret i1 [[TMP3]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 4) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i32 @length5(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length5(<br>
+; ALL-NEXT: loadbb:<br>
+; ALL-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; ALL-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]]<br>
+; ALL-NEXT: br i1 [[TMP4]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]<br>
+; ALL: res_block:<br>
+; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])<br>
+; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])<br>
+; ALL-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]]<br>
+; ALL-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1<br>
+; ALL-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; ALL: loadbb1:<br>
+; ALL-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 4<br>
+; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[Y]], i64 4<br>
+; ALL-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP9]], align 1<br>
+; ALL-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]], align 1<br>
+; ALL-NEXT: [[TMP13:%.*]] = zext i8 [[TMP11]] to i32<br>
+; ALL-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32<br>
+; ALL-NEXT: [[TMP15:%.*]] = sub nsw i32 [[TMP13]], [[TMP14]]<br>
+; ALL-NEXT: br label [[ENDBLOCK]]<br>
+; ALL: endblock:<br>
+; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP15]], [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]<br>
+; ALL-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @length5_eq(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length5_eq(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4<br>
+; ALL-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]]<br>
+; ALL-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4<br>
+; ALL-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4<br>
+; ALL-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1<br>
+; ALL-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1<br>
+; ALL-NEXT: [[TMP10:%.*]] = xor i8 [[TMP8]], [[TMP9]]<br>
+; ALL-NEXT: [[TMP11:%.*]] = zext i8 [[TMP10]] to i32<br>
+; ALL-NEXT: [[TMP12:%.*]] = or i32 [[TMP5]], [[TMP11]]<br>
+; ALL-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0<br>
+; ALL-NEXT: ret i1 [[TMP13]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind<br>
+ %c = icmp ne i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length5_lt(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length5_lt(<br>
+; ALL-NEXT: loadbb:<br>
+; ALL-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; ALL-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]]<br>
+; ALL-NEXT: br i1 [[TMP4]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]<br>
+; ALL: res_block:<br>
+; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])<br>
+; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])<br>
+; ALL-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]]<br>
+; ALL-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1<br>
+; ALL-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; ALL: loadbb1:<br>
+; ALL-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 4<br>
+; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[Y]], i64 4<br>
+; ALL-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP9]], align 1<br>
+; ALL-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]], align 1<br>
+; ALL-NEXT: [[TMP13:%.*]] = zext i8 [[TMP11]] to i32<br>
+; ALL-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32<br>
+; ALL-NEXT: [[TMP15:%.*]] = sub nsw i32 [[TMP13]], [[TMP14]]<br>
+; ALL-NEXT: br label [[ENDBLOCK]]<br>
+; ALL: endblock:<br>
+; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP15]], [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]<br>
+; ALL-NEXT: [[C:%.*]] = icmp slt i32 [[PHI_RES]], 0<br>
+; ALL-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind<br>
+ %c = icmp slt i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length7_eq(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length7_eq(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4<br>
+; ALL-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 3<br>
+; ALL-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i32*<br>
+; ALL-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3<br>
+; ALL-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*<br>
+; ALL-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP6]], align 4<br>
+; ALL-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]], align 4<br>
+; ALL-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]<br>
+; ALL-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP9]], [[TMP10]]<br>
+; ALL-NEXT: [[TMP13:%.*]] = or i1 [[TMP11]], [[TMP12]]<br>
+; ALL-NEXT: ret i1 [[TMP13]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 7) nounwind<br>
+ %c = icmp ne i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i32 @length8(i8* %X, i8* %Y) nounwind {<br>
+; X86-LABEL: @length8(<br>
+; X86-NEXT: loadbb:<br>
+; X86-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; X86-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; X86-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4<br>
+; X86-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; X86-NEXT: [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])<br>
+; X86-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])<br>
+; X86-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]]<br>
+; X86-NEXT: br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]<br>
+; X86: res_block:<br>
+; X86-NEXT: [[PHI_SRC1:%.*]] = phi i32 [ [[TMP4]], [[LOADBB:%.*]] ], [ [[TMP15:%.*]], [[LOADBB1]] ]<br>
+; X86-NEXT: [[PHI_SRC2:%.*]] = phi i32 [ [[TMP5]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1]] ]<br>
+; X86-NEXT: [[TMP7:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]]<br>
+; X86-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1<br>
+; X86-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; X86: loadbb1:<br>
+; X86-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 4<br>
+; X86-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*<br>
+; X86-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 4<br>
+; X86-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32*<br>
+; X86-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP10]], align 4<br>
+; X86-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]], align 4<br>
+; X86-NEXT: [[TMP15]] = call i32 @llvm.bswap.i32(i32 [[TMP13]])<br>
+; X86-NEXT: [[TMP16]] = call i32 @llvm.bswap.i32(i32 [[TMP14]])<br>
+; X86-NEXT: [[TMP17:%.*]] = icmp eq i32 [[TMP13]], [[TMP14]]<br>
+; X86-NEXT: br i1 [[TMP17]], label [[ENDBLOCK]], label [[RES_BLOCK]]<br>
+; X86: endblock:<br>
+; X86-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]<br>
+; X86-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+; X64-LABEL: @length8(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])<br>
+; X64-NEXT: [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])<br>
+; X64-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP5]], [[TMP6]]<br>
+; X64-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP5]], [[TMP6]]<br>
+; X64-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32<br>
+; X64-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32<br>
+; X64-NEXT: [[TMP11:%.*]] = sub nsw i32 [[TMP9]], [[TMP10]]<br>
+; X64-NEXT: ret i32 [[TMP11]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @length8_eq(i8* %X, i8* %Y) nounwind {<br>
+; X86-LABEL: @length8_eq(<br>
+; X86-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; X86-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*<br>
+; X86-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; X86-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4<br>
+; X86-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 4<br>
+; X86-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i32*<br>
+; X86-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4<br>
+; X86-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*<br>
+; X86-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP6]], align 4<br>
+; X86-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]], align 4<br>
+; X86-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP3]], [[TMP4]]<br>
+; X86-NEXT: [[TMP12:%.*]] = icmp eq i32 [[TMP9]], [[TMP10]]<br>
+; X86-NEXT: [[C:%.*]] = and i1 [[TMP12]], [[TMP11]]<br>
+; X86-NEXT: ret i1 [[C]]<br>
+;<br>
+; X64-LABEL: @length8_eq(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: ret i1 [[TMP5]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length8_eq_const(i8* %X) nounwind {<br>
+; X86-LABEL: @length8_eq_const(<br>
+; X86-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*<br>
+; X86-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4<br>
+; X86-NEXT: [[TMP3:%.*]] = getelementptr i8, i8* [[X]], i64 4<br>
+; X86-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to i32*<br>
+; X86-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4<br>
+; X86-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP2]], 858927408<br>
+; X86-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP5]], 926299444<br>
+; X86-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]<br>
+; X86-NEXT: ret i1 [[TMP8]]<br>
+;<br>
+; X64-LABEL: @length8_eq_const(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP2]], 3978425819141910832<br>
+; X64-NEXT: ret i1 [[TMP3]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 8) nounwind<br>
+ %c = icmp ne i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length9_eq(i8* %X, i8* %Y) nounwind {<br>
+; X86-LABEL: @length9_eq(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(9) [[X:%.*]], i8* dereferenceable(9) [[Y:%.*]], i64 9) #3<br>
+; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; X86-NEXT: ret i1 [[C]]<br>
+;<br>
+; X64-LABEL: @length9_eq(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8<br>
+; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8<br>
+; X64-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1<br>
+; X64-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1<br>
+; X64-NEXT: [[TMP10:%.*]] = xor i8 [[TMP8]], [[TMP9]]<br>
+; X64-NEXT: [[TMP11:%.*]] = zext i8 [[TMP10]] to i64<br>
+; X64-NEXT: [[TMP12:%.*]] = or i64 [[TMP5]], [[TMP11]]<br>
+; X64-NEXT: [[TMP13:%.*]] = icmp eq i64 [[TMP12]], 0<br>
+; X64-NEXT: ret i1 [[TMP13]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length10_eq(i8* %X, i8* %Y) nounwind {<br>
+; X86-LABEL: @length10_eq(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(10) [[X:%.*]], i8* dereferenceable(10) [[Y:%.*]], i64 10) #3<br>
+; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; X86-NEXT: ret i1 [[C]]<br>
+;<br>
+; X64-LABEL: @length10_eq(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8<br>
+; X64-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i16*<br>
+; X64-NEXT: [[TMP8:%.*]] = getelementptr i8, i8* [[Y]], i64 8<br>
+; X64-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i16*<br>
+; X64-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP7]], align 2<br>
+; X64-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]], align 2<br>
+; X64-NEXT: [[TMP12:%.*]] = xor i16 [[TMP10]], [[TMP11]]<br>
+; X64-NEXT: [[TMP13:%.*]] = zext i16 [[TMP12]] to i64<br>
+; X64-NEXT: [[TMP14:%.*]] = or i64 [[TMP5]], [[TMP13]]<br>
+; X64-NEXT: [[TMP15:%.*]] = icmp eq i64 [[TMP14]], 0<br>
+; X64-NEXT: ret i1 [[TMP15]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 10) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length11_eq(i8* %X, i8* %Y) nounwind {<br>
+; X86-LABEL: @length11_eq(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(11) [[X:%.*]], i8* dereferenceable(11) [[Y:%.*]], i64 11) #3<br>
+; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; X86-NEXT: ret i1 [[C]]<br>
+;<br>
+; X64-LABEL: @length11_eq(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 3<br>
+; X64-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64*<br>
+; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3<br>
+; X64-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64*<br>
+; X64-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]], align 8<br>
+; X64-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 8<br>
+; X64-NEXT: [[TMP11:%.*]] = icmp eq i64 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: [[TMP12:%.*]] = icmp eq i64 [[TMP9]], [[TMP10]]<br>
+; X64-NEXT: [[C:%.*]] = and i1 [[TMP12]], [[TMP11]]<br>
+; X64-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 11) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length12_eq(i8* %X, i8* %Y) nounwind {<br>
+; X86-LABEL: @length12_eq(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(12) [[X:%.*]], i8* dereferenceable(12) [[Y:%.*]], i64 12) #3<br>
+; X86-NEXT: [[C:%.*]] = icmp ne i32 [[M]], 0<br>
+; X86-NEXT: ret i1 [[C]]<br>
+;<br>
+; X64-LABEL: @length12_eq(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8<br>
+; X64-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i32*<br>
+; X64-NEXT: [[TMP8:%.*]] = getelementptr i8, i8* [[Y]], i64 8<br>
+; X64-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32*<br>
+; X64-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP7]], align 4<br>
+; X64-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]], align 4<br>
+; X64-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]]<br>
+; X64-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64<br>
+; X64-NEXT: [[TMP14:%.*]] = or i64 [[TMP5]], [[TMP13]]<br>
+; X64-NEXT: [[TMP15:%.*]] = icmp ne i64 [[TMP14]], 0<br>
+; X64-NEXT: ret i1 [[TMP15]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind<br>
+ %c = icmp ne i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i32 @length12(i8* %X, i8* %Y) nounwind {<br>
+; X86-LABEL: @length12(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(12) [[X:%.*]], i8* dereferenceable(12) [[Y:%.*]], i64 12) #3<br>
+; X86-NEXT: ret i32 [[M]]<br>
+;<br>
+; X64-LABEL: @length12(<br>
+; X64-NEXT: loadbb:<br>
+; X64-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]], align 8<br>
+; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])<br>
+; X64-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])<br>
+; X64-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP2]], [[TMP3]]<br>
+; X64-NEXT: br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]<br>
+; X64: res_block:<br>
+; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP4]], [[LOADBB:%.*]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]<br>
+; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP5]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1]] ]<br>
+; X64-NEXT: [[TMP7:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]<br>
+; X64-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1<br>
+; X64-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; X64: loadbb1:<br>
+; X64-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 8<br>
+; X64-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*<br>
+; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8<br>
+; X64-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32*<br>
+; X64-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP10]], align 4<br>
+; X64-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]], align 4<br>
+; X64-NEXT: [[TMP15:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP13]])<br>
+; X64-NEXT: [[TMP16:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP14]])<br>
+; X64-NEXT: [[TMP17]] = zext i32 [[TMP15]] to i64<br>
+; X64-NEXT: [[TMP18]] = zext i32 [[TMP16]] to i64<br>
+; X64-NEXT: [[TMP19:%.*]] = icmp eq i32 [[TMP13]], [[TMP14]]<br>
+; X64-NEXT: br i1 [[TMP19]], label [[ENDBLOCK]], label [[RES_BLOCK]]<br>
+; X64: endblock:<br>
+; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]<br>
+; X64-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @length13_eq(i8* %X, i8* %Y) nounwind {<br>
+; X86-LABEL: @length13_eq(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(13) [[X:%.*]], i8* dereferenceable(13) [[Y:%.*]], i64 13) #3<br>
+; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; X86-NEXT: ret i1 [[C]]<br>
+;<br>
+; X64-LABEL: @length13_eq(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 5<br>
+; X64-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64*<br>
+; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 5<br>
+; X64-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64*<br>
+; X64-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]], align 8<br>
+; X64-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 8<br>
+; X64-NEXT: [[TMP11:%.*]] = icmp eq i64 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: [[TMP12:%.*]] = icmp eq i64 [[TMP9]], [[TMP10]]<br>
+; X64-NEXT: [[C:%.*]] = and i1 [[TMP12]], [[TMP11]]<br>
+; X64-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 13) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length14_eq(i8* %X, i8* %Y) nounwind {<br>
+; X86-LABEL: @length14_eq(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(14) [[X:%.*]], i8* dereferenceable(14) [[Y:%.*]], i64 14) #3<br>
+; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; X86-NEXT: ret i1 [[C]]<br>
+;<br>
+; X64-LABEL: @length14_eq(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 6<br>
+; X64-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64*<br>
+; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 6<br>
+; X64-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64*<br>
+; X64-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]], align 8<br>
+; X64-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 8<br>
+; X64-NEXT: [[TMP11:%.*]] = icmp eq i64 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: [[TMP12:%.*]] = icmp eq i64 [[TMP9]], [[TMP10]]<br>
+; X64-NEXT: [[C:%.*]] = and i1 [[TMP12]], [[TMP11]]<br>
+; X64-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 14) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @length15_eq(i8* %X, i8* %Y) nounwind {<br>
+; X86-LABEL: @length15_eq(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(15) [[X:%.*]], i8* dereferenceable(15) [[Y:%.*]], i64 15) #3<br>
+; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; X86-NEXT: ret i1 [[C]]<br>
+;<br>
+; X64-LABEL: @length15_eq(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 7<br>
+; X64-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64*<br>
+; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 7<br>
+; X64-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64*<br>
+; X64-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]], align 8<br>
+; X64-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 8<br>
+; X64-NEXT: [[TMP11:%.*]] = icmp eq i64 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: [[TMP12:%.*]] = icmp eq i64 [[TMP9]], [[TMP10]]<br>
+; X64-NEXT: [[C:%.*]] = and i1 [[TMP12]], [[TMP11]]<br>
+; X64-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 15) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+; PR33329 - <a href="https://bugs.llvm.org/show_bug.cgi?id=33329" rel="noreferrer" target="_blank">https://bugs.llvm.org/show_bug.cgi?id=33329</a><br>
+<br>
+define i32 @length16(i8* %X, i8* %Y) nounwind {<br>
+; X86-LABEL: @length16(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(16) [[X:%.*]], i8* dereferenceable(16) [[Y:%.*]], i64 16) #3<br>
+; X86-NEXT: ret i32 [[M]]<br>
+;<br>
+; X64-LABEL: @length16(<br>
+; X64-NEXT: loadbb:<br>
+; X64-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64*<br>
+; X64-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]], align 8<br>
+; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])<br>
+; X64-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])<br>
+; X64-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP2]], [[TMP3]]<br>
+; X64-NEXT: br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]<br>
+; X64: res_block:<br>
+; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP4]], [[LOADBB:%.*]] ], [ [[TMP15:%.*]], [[LOADBB1]] ]<br>
+; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP5]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1]] ]<br>
+; X64-NEXT: [[TMP7:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]<br>
+; X64-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1<br>
+; X64-NEXT: br label [[ENDBLOCK:%.*]]<br>
+; X64: loadbb1:<br>
+; X64-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 8<br>
+; X64-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i64*<br>
+; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8<br>
+; X64-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i64*<br>
+; X64-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP10]], align 8<br>
+; X64-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP12]], align 8<br>
+; X64-NEXT: [[TMP15]] = call i64 @llvm.bswap.i64(i64 [[TMP13]])<br>
+; X64-NEXT: [[TMP16]] = call i64 @llvm.bswap.i64(i64 [[TMP14]])<br>
+; X64-NEXT: [[TMP17:%.*]] = icmp eq i64 [[TMP13]], [[TMP14]]<br>
+; X64-NEXT: br i1 [[TMP17]], label [[ENDBLOCK]], label [[RES_BLOCK]]<br>
+; X64: endblock:<br>
+; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]<br>
+; X64-NEXT: ret i32 [[PHI_RES]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 16) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @length16_eq(i8* %x, i8* %y) nounwind {<br>
+; X86-LABEL: @length16_eq(<br>
+; X86-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* dereferenceable(16) [[X:%.*]], i8* dereferenceable(16) [[Y:%.*]], i64 16) #3<br>
+; X86-NEXT: [[CMP:%.*]] = icmp ne i32 [[CALL]], 0<br>
+; X86-NEXT: ret i1 [[CMP]]<br>
+;<br>
+; X64-LABEL: @length16_eq(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = icmp ne i128 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: ret i1 [[TMP5]]<br>
+;<br>
+ %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16) nounwind<br>
+ %cmp = icmp ne i32 %call, 0<br>
+ ret i1 %cmp<br>
+}<br>
+<br>
+define i1 @length16_eq_const(i8* %X) nounwind {<br>
+; X86-LABEL: @length16_eq_const(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(16) [[X:%.*]], i8* dereferenceable(16) getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i64 16) #3<br>
+; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; X86-NEXT: ret i1 [[C]]<br>
+;<br>
+; X64-LABEL: @length16_eq_const(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128*<br>
+; X64-NEXT: [[TMP2:%.*]] = load i128, i128* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP3:%.*]] = icmp eq i128 [[TMP2]], 70720121592765328381466889075544961328<br>
+; X64-NEXT: ret i1 [[TMP3]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 16) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+; PR33914 - <a href="https://bugs.llvm.org/show_bug.cgi?id=33914" rel="noreferrer" target="_blank">https://bugs.llvm.org/show_bug.cgi?id=33914</a><br>
+<br>
+define i32 @length24(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length24(<br>
+; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(24) [[X:%.*]], i8* dereferenceable(24) [[Y:%.*]], i64 24) #3<br>
+; ALL-NEXT: ret i32 [[M]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 24) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @length24_eq(i8* %x, i8* %y) nounwind {<br>
+; X86-LABEL: @length24_eq(<br>
+; X86-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* dereferenceable(24) [[X:%.*]], i8* dereferenceable(24) [[Y:%.*]], i64 24) #3<br>
+; X86-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0<br>
+; X86-NEXT: ret i1 [[CMP]]<br>
+;<br>
+; X64-LABEL: @length24_eq(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = xor i128 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 16<br>
+; X64-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i64*<br>
+; X64-NEXT: [[TMP8:%.*]] = getelementptr i8, i8* [[Y]], i64 16<br>
+; X64-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i64*<br>
+; X64-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP7]], align 8<br>
+; X64-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]], align 8<br>
+; X64-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]]<br>
+; X64-NEXT: [[TMP13:%.*]] = zext i64 [[TMP12]] to i128<br>
+; X64-NEXT: [[TMP14:%.*]] = or i128 [[TMP5]], [[TMP13]]<br>
+; X64-NEXT: [[TMP15:%.*]] = icmp eq i128 [[TMP14]], 0<br>
+; X64-NEXT: ret i1 [[TMP15]]<br>
+;<br>
+ %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 24) nounwind<br>
+ %cmp = icmp eq i32 %call, 0<br>
+ ret i1 %cmp<br>
+}<br>
+<br>
+define i1 @length24_eq_const(i8* %X) nounwind {<br>
+; X86-LABEL: @length24_eq_const(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(24) [[X:%.*]], i8* dereferenceable(24) getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i64 24) #3<br>
+; X86-NEXT: [[C:%.*]] = icmp ne i32 [[M]], 0<br>
+; X86-NEXT: ret i1 [[C]]<br>
+;<br>
+; X64-LABEL: @length24_eq_const(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128*<br>
+; X64-NEXT: [[TMP2:%.*]] = load i128, i128* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP3:%.*]] = xor i128 [[TMP2]], 70720121592765328381466889075544961328<br>
+; X64-NEXT: [[TMP4:%.*]] = getelementptr i8, i8* [[X]], i64 16<br>
+; X64-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to i64*<br>
+; X64-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8<br>
+; X64-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 3689065127958034230<br>
+; X64-NEXT: [[TMP8:%.*]] = zext i64 [[TMP7]] to i128<br>
+; X64-NEXT: [[TMP9:%.*]] = or i128 [[TMP3]], [[TMP8]]<br>
+; X64-NEXT: [[TMP10:%.*]] = icmp ne i128 [[TMP9]], 0<br>
+; X64-NEXT: ret i1 [[TMP10]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 24) nounwind<br>
+ %c = icmp ne i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i32 @length32(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length32(<br>
+; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(32) [[X:%.*]], i8* dereferenceable(32) [[Y:%.*]], i64 32) #3<br>
+; ALL-NEXT: ret i32 [[M]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 32) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+; PR33325 - <a href="https://bugs.llvm.org/show_bug.cgi?id=33325" rel="noreferrer" target="_blank">https://bugs.llvm.org/show_bug.cgi?id=33325</a><br>
+<br>
+define i1 @length32_eq(i8* %x, i8* %y) nounwind {<br>
+; X86-LABEL: @length32_eq(<br>
+; X86-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* dereferenceable(32) [[X:%.*]], i8* dereferenceable(32) [[Y:%.*]], i64 32) #3<br>
+; X86-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0<br>
+; X86-NEXT: ret i1 [[CMP]]<br>
+;<br>
+; X64-LABEL: @length32_eq(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128*<br>
+; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128*<br>
+; X64-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]], align 8<br>
+; X64-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 16<br>
+; X64-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i128*<br>
+; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 16<br>
+; X64-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i128*<br>
+; X64-NEXT: [[TMP9:%.*]] = load i128, i128* [[TMP6]], align 8<br>
+; X64-NEXT: [[TMP10:%.*]] = load i128, i128* [[TMP8]], align 8<br>
+; X64-NEXT: [[TMP11:%.*]] = icmp eq i128 [[TMP3]], [[TMP4]]<br>
+; X64-NEXT: [[TMP12:%.*]] = icmp eq i128 [[TMP9]], [[TMP10]]<br>
+; X64-NEXT: [[CMP:%.*]] = and i1 [[TMP12]], [[TMP11]]<br>
+; X64-NEXT: ret i1 [[CMP]]<br>
+;<br>
+ %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 32) nounwind<br>
+ %cmp = icmp eq i32 %call, 0<br>
+ ret i1 %cmp<br>
+}<br>
+<br>
+define i1 @length32_eq_const(i8* %X) nounwind {<br>
+; X86-LABEL: @length32_eq_const(<br>
+; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(32) [[X:%.*]], i8* dereferenceable(32) getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i64 32) #3<br>
+; X86-NEXT: [[C:%.*]] = icmp ne i32 [[M]], 0<br>
+; X86-NEXT: ret i1 [[C]]<br>
+;<br>
+; X64-LABEL: @length32_eq_const(<br>
+; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128*<br>
+; X64-NEXT: [[TMP2:%.*]] = load i128, i128* [[TMP1]], align 8<br>
+; X64-NEXT: [[TMP3:%.*]] = getelementptr i8, i8* [[X]], i64 16<br>
+; X64-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to i128*<br>
+; X64-NEXT: [[TMP5:%.*]] = load i128, i128* [[TMP4]], align 8<br>
+; X64-NEXT: [[TMP6:%.*]] = icmp ne i128 [[TMP2]], 70720121592765328381466889075544961328<br>
+; X64-NEXT: [[TMP7:%.*]] = icmp ne i128 [[TMP5]], 65382562593882267225249597816672106294<br>
+; X64-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]<br>
+; X64-NEXT: ret i1 [[TMP8]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 32) nounwind<br>
+ %c = icmp ne i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i32 @length64(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @length64(<br>
+; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(64) [[X:%.*]], i8* dereferenceable(64) [[Y:%.*]], i64 64) #3<br>
+; ALL-NEXT: ret i32 [[M]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 64) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @length64_eq(i8* %x, i8* %y) nounwind {<br>
+; ALL-LABEL: @length64_eq(<br>
+; ALL-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* dereferenceable(64) [[X:%.*]], i8* dereferenceable(64) [[Y:%.*]], i64 64) #3<br>
+; ALL-NEXT: [[CMP:%.*]] = icmp ne i32 [[CALL]], 0<br>
+; ALL-NEXT: ret i1 [[CMP]]<br>
+;<br>
+ %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 64) nounwind<br>
+ %cmp = icmp ne i32 %call, 0<br>
+ ret i1 %cmp<br>
+}<br>
+<br>
+define i1 @length64_eq_const(i8* %X) nounwind {<br>
+; ALL-LABEL: @length64_eq_const(<br>
+; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(64) [[X:%.*]], i8* dereferenceable(64) getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i64 64) #3<br>
+; ALL-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; ALL-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 64) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+; This checks that we do not do stupid things with huge sizes.<br>
+define i32 @huge_length(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @huge_length(<br>
+; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(9223372036854775807) [[X:%.*]], i8* dereferenceable(9223372036854775807) [[Y:%.*]], i64 9223372036854775807) #3<br>
+; ALL-NEXT: ret i32 [[M]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9223372036854775807) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @huge_length_eq(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @huge_length_eq(<br>
+; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* dereferenceable(9223372036854775807) [[X:%.*]], i8* dereferenceable(9223372036854775807) [[Y:%.*]], i64 9223372036854775807) #3<br>
+; ALL-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; ALL-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9223372036854775807) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+; This checks non-constant sizes.<br>
+define i32 @nonconst_length(i8* %X, i8* %Y, i64 %size) nounwind {<br>
+; ALL-LABEL: @nonconst_length(<br>
+; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 [[SIZE:%.*]]) #3<br>
+; ALL-NEXT: ret i32 [[M]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 %size) nounwind<br>
+ ret i32 %m<br>
+}<br>
+<br>
+define i1 @nonconst_length_eq(i8* %X, i8* %Y, i64 %size) nounwind {<br>
+; ALL-LABEL: @nonconst_length_eq(<br>
+; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 [[SIZE:%.*]]) #3<br>
+; ALL-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0<br>
+; ALL-NEXT: ret i1 [[C]]<br>
+;<br>
+ %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 %size) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
+define i1 @bcmp_length2(i8* %X, i8* %Y) nounwind {<br>
+; ALL-LABEL: @bcmp_length2(<br>
+; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*<br>
+; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2<br>
+; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2<br>
+; ALL-NEXT: [[TMP5:%.*]] = icmp eq i16 [[TMP3]], [[TMP4]]<br>
+; ALL-NEXT: ret i1 [[TMP5]]<br>
+;<br>
+ %m = tail call i32 @bcmp(i8* %X, i8* %Y, i64 2) nounwind<br>
+ %c = icmp eq i32 %m, 0<br>
+ ret i1 %c<br>
+}<br>
+<br>
<br>
Added: llvm/trunk/test/Transforms/PhaseOrdering/X86/pr36421.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/X86/pr36421.ll?rev=371502&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PhaseOrdering/X86/pr36421.ll?rev=371502&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/PhaseOrdering/X86/pr36421.ll (added)<br>
+++ llvm/trunk/test/Transforms/PhaseOrdering/X86/pr36421.ll Tue Sep 10 02:18:00 2019<br>
@@ -0,0 +1,68 @@<br>
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py<br>
+; RUN: opt < %s -O2 -S | FileCheck %s<br>
+<br>
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"<br>
+target triple = "x86_64-unknown-unknown"<br>
+<br>
+@.str = private unnamed_addr constant [7 x i8] c"abcdef\00", align 1<br>
+@.str.1 = private unnamed_addr constant [7 x i8] c"ABCDEF\00", align 1<br>
+<br>
+define i32 @test(i8* nocapture readonly %string, i32 %len) local_unnamed_addr #0 {<br>
+; CHECK-LABEL: @test(<br>
+; CHECK-NEXT: entry:<br>
+; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[LEN:%.*]], 6<br>
+; CHECK-NEXT: br i1 [[COND]], label [[SW_BB:%.*]], label [[RETURN:%.*]]<br>
+; CHECK: <a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a>:<br>
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[STRING:%.*]] to i32*<br>
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4<br>
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[STRING]], i64 4<br>
+; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i16*<br>
+; CHECK-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 2<br>
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP1]], 1684234849<br>
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i16 [[TMP4]], 26213<br>
+; CHECK-NEXT: [[CMP:%.*]] = and i1 [[TMP6]], [[TMP5]]<br>
+; CHECK-NEXT: br i1 [[CMP]], label [[RETURN]], label [[IF_END:%.*]]<br>
+; CHECK: if.end:<br>
+; CHECK-NEXT: [[TMP7:%.*]] = xor i32 [[TMP1]], 1145258561<br>
+; CHECK-NEXT: [[TMP8:%.*]] = xor i16 [[TMP4]], 17989<br>
+; CHECK-NEXT: [[TMP9:%.*]] = zext i16 [[TMP8]] to i32<br>
+; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP7]], [[TMP9]]<br>
+; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0<br>
+; CHECK-NEXT: [[DOT:%.*]] = select i1 [[TMP11]], i32 64, i32 0<br>
+; CHECK-NEXT: br label [[RETURN]]<br>
+; CHECK: return:<br>
+; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 61, [[SW_BB]] ], [ [[DOT]], [[IF_END]] ], [ 0, [[ENTRY:%.*]] ]<br>
+; CHECK-NEXT: ret i32 [[RETVAL_0]]<br>
+;<br>
+entry:<br>
+ %cond = icmp eq i32 %len, 6<br>
+ br i1 %cond, label %<a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a>, label %return<br>
+<br>
+<a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a>: ; preds = %entry<br>
+ %call = tail call i32 @memcmp(i8* %string, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 6)<br>
+ %cmp = icmp eq i32 %call, 0<br>
+ br i1 %cmp, label %return, label %if.end<br>
+<br>
+if.end: ; preds = %<a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a><br>
+ %call1 = tail call i32 @memcmp(i8* %string, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i64 6)<br>
+ %cmp2 = icmp eq i32 %call1, 0<br>
+ %. = select i1 %cmp2, i32 64, i32 0<br>
+ br label %return<br>
+<br>
+return: ; preds = %entry, %if.end8, %if.end4, %if.end, %<a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a><br>
+ %retval.0 = phi i32 [ 61, %<a href="http://sw.bb" rel="noreferrer" target="_blank">sw.bb</a> ], [ %., %if.end ], [ 0, %entry ]<br>
+ ret i32 %retval.0<br>
+}<br>
+<br>
+; Function Attrs: nounwind readonly<br>
+declare i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1<br>
+<br>
+attributes #0 = { nounwind readonly ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>
+attributes #1 = { nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>
+<br>
+!llvm.module.flags = !{!0, !1}<br>
+!llvm.ident = !{!2}<br>
+<br>
+!0 = !{i32 1, !"wchar_size", i32 4}<br>
+!1 = !{i32 7, !"PIC Level", i32 2}<br>
+!2 = !{!"clang version 7.0.0 (trunk 325350)"}<br>
<br>
Modified: llvm/trunk/tools/opt/opt.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/tools/opt/opt.cpp (original)<br>
+++ llvm/trunk/tools/opt/opt.cpp Tue Sep 10 02:18:00 2019<br>
@@ -514,7 +514,6 @@ int main(int argc, char **argv) {<br>
initializeTarget(Registry);<br>
// For codegen passes, only passes that do IR to IR transformation are<br>
// supported.<br>
- initializeExpandMemCmpPassPass(Registry);<br>
initializeScalarizeMaskedMemIntrinPass(Registry);<br>
initializeCodeGenPreparePass(Registry);<br>
initializeAtomicExpandPass(Registry);<br>
<br>
Modified: llvm/trunk/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn (original)<br>
+++ llvm/trunk/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn Tue Sep 10 02:18:00 2019<br>
@@ -39,7 +39,6 @@ static_library("CodeGen") {<br>
"EarlyIfConversion.cpp",<br>
"EdgeBundles.cpp",<br>
"ExecutionDomainFix.cpp",<br>
- "ExpandMemCmp.cpp",<br>
"ExpandPostRAPseudos.cpp",<br>
"ExpandReductions.cpp",<br>
"FEntryInserter.cpp",<br>
<br>
Modified: llvm/trunk/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn?rev=371502&r1=371501&r2=371502&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn?rev=371502&r1=371501&r2=371502&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn (original)<br>
+++ llvm/trunk/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn Tue Sep 10 02:18:00 2019<br>
@@ -21,6 +21,7 @@ static_library("Scalar") {<br>
"DeadStoreElimination.cpp",<br>
"DivRemPairs.cpp",<br>
"EarlyCSE.cpp",<br>
+ "ExpandMemCmp.cpp",<br>
"FlattenCFGPass.cpp",<br>
"Float2Int.cpp",<br>
"GVN.cpp",<br>
<br>
<br>
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</blockquote></div></div>