<html><head><meta http-equiv="Content-Type" content="text/html; charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;" class="">See r370496<br class=""><div><br class=""><blockquote type="cite" class=""><div class="">On Aug 30, 2019, at 13:53, Galina Kistanova via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class=""><div class=""><div class=""><div class="">Hello Matt,<br class=""><br class=""></div>At least one more builder is affected:<br class=""><a href="http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast" class="">lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast</a></div><div class=""><br class=""></div><div class="">
Please have a look ASAP?</div><div class=""><br class=""></div><div class="">. . . <br class=""></div><div class="">
<pre class=""><span class="gmail-stdout">********************
Failing Tests (118):
LLVM :: CodeGen/X86/GlobalISel/GV.ll
LLVM :: CodeGen/X86/GlobalISel/add-ext.ll
LLVM :: CodeGen/X86/GlobalISel/add-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/add-vec.ll
LLVM :: CodeGen/X86/GlobalISel/and-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/ashr-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir
LLVM :: CodeGen/X86/GlobalISel/binop.ll
LLVM :: CodeGen/X86/GlobalISel/br.ll
LLVM :: CodeGen/X86/GlobalISel/brcond.ll
LLVM :: CodeGen/X86/GlobalISel/callingconv.ll
LLVM :: CodeGen/X86/GlobalISel/cmp.ll
LLVM :: CodeGen/X86/GlobalISel/constant.ll
LLVM :: CodeGen/X86/GlobalISel/ext-x86-64.ll
LLVM :: CodeGen/X86/GlobalISel/ext.ll
LLVM :: CodeGen/X86/GlobalISel/fadd-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/fconstant.ll
LLVM :: CodeGen/X86/GlobalISel/fdiv-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/fmul-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/fpext-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/frameIndex.ll
LLVM :: CodeGen/X86/GlobalISel/fsub-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/gep.ll
LLVM :: CodeGen/X86/GlobalISel/inttoptr.ll
LLVM :: CodeGen/X86/GlobalISel/lshr-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/memop-scalar-x32.ll
LLVM :: CodeGen/X86/GlobalISel/memop-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/memop-vec.ll
LLVM :: CodeGen/X86/GlobalISel/mul-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/mul-vec.ll
LLVM :: CodeGen/X86/GlobalISel/or-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/phi.ll
LLVM :: CodeGen/X86/GlobalISel/ptrtoint.ll
LLVM :: CodeGen/X86/GlobalISel/select-GV-32.mir
LLVM :: CodeGen/X86/GlobalISel/select-GV-64.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-v128.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-v256.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-v512.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-x32.mir
LLVM :: CodeGen/X86/GlobalISel/select-add.mir
LLVM :: CodeGen/X86/GlobalISel/select-and-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-ashr-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-blsi.mir
LLVM :: CodeGen/X86/GlobalISel/select-blsr.mir
LLVM :: CodeGen/X86/GlobalISel/select-br.mir
LLVM :: CodeGen/X86/GlobalISel/select-brcond.mir
LLVM :: CodeGen/X86/GlobalISel/select-cmp.mir
LLVM :: CodeGen/X86/GlobalISel/select-constant.mir
LLVM :: CodeGen/X86/GlobalISel/select-copy.mir
LLVM :: CodeGen/X86/GlobalISel/select-ext-x86-64.mir
LLVM :: CodeGen/X86/GlobalISel/select-ext.mir
LLVM :: CodeGen/X86/GlobalISel/select-extract-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-extract-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-fadd-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fconstant.mir
LLVM :: CodeGen/X86/GlobalISel/select-fdiv-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fmul-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fpext-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fptrunc-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fsub-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-gep.mir
LLVM :: CodeGen/X86/GlobalISel/select-inc.mir
LLVM :: CodeGen/X86/GlobalISel/select-insert-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-insert-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir
LLVM :: CodeGen/X86/GlobalISel/select-leaf-constant.mir
LLVM :: CodeGen/X86/GlobalISel/select-lshr-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-scalar-unordered.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-scalar-x32.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-v128.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-v256.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-v512.mir
LLVM :: CodeGen/X86/GlobalISel/select-merge-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-merge-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-mul-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-mul-vec.mir
LLVM :: CodeGen/X86/GlobalISel/select-or-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-phi.mir
LLVM :: CodeGen/X86/GlobalISel/select-shl-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub-v128.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub-v256.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub-v512.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub.mir
LLVM :: CodeGen/X86/GlobalISel/select-trunc.mir
LLVM :: CodeGen/X86/GlobalISel/select-undef.mir
LLVM :: CodeGen/X86/GlobalISel/select-unmerge-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-unmerge-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-xor-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/shl-scalar-widening.ll
LLVM :: CodeGen/X86/GlobalISel/shl-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/sub-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/sub-vec.ll
LLVM :: CodeGen/X86/GlobalISel/trunc.ll
LLVM :: CodeGen/X86/GlobalISel/undef.ll
LLVM :: CodeGen/X86/GlobalISel/x32-select-frameIndex.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-frameIndex.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-sdiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-srem.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-trap.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-udiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-urem.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-fallback.ll
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-fptosi.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-frameIndex.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-ptrtoint.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-sdiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-sitofp.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-srem.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-udiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-urem.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-zext.mir
LLVM :: CodeGen/X86/GlobalISel/xor-scalar.ll
LLVM :: CodeGen/X86/is-constant.ll
</span></pre>
</div></div><div class=""><br class=""></div><div class="">Thanks</div><div class=""><br class=""></div><div class="">Galina<br class=""></div></div><br class=""><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Aug 30, 2019 at 12:51 AM via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a>> wrote:<br class=""></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Hi Matt,<br class="">
<br class="">
This change is causing 118 test failures on the PS4 linux bot. Here is a sample failure:<br class="">
<br class="">
<a href="http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/54056/steps/test/logs/stdio" rel="noreferrer" target="_blank" class="">http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/54056/steps/test/logs/stdio</a><br class="">
<br class="">
FAIL: LLVM :: CodeGen/X86/GlobalISel/add-ext.ll (32869 of 52285)<br class="">
******************** TEST 'LLVM :: CodeGen/X86/GlobalISel/add-ext.ll' FAILED ********************<br class="">
Script:<br class="">
--<br class="">
: 'RUN: at line 2'; /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc < /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/test/CodeGen/X86/GlobalISel/add-ext.ll -mtriple=x86_64-unknown-unknown -global-isel | /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/FileCheck /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/test/CodeGen/X86/GlobalISel/add-ext.ll<br class="">
--<br class="">
Exit Code: 2<br class="">
<br class="">
Command Output (stderr):<br class="">
--<br class="">
Pass 'InstructionSelect' is not initialized.<br class="">
Verify if there is a pass dependency cycle.<br class="">
Required Passes:<br class="">
Target Pass Configuration<br class="">
llc: /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/lib/IR/LegacyPassManager.cpp:753: void llvm::PMTopLevelManager::schedulePass(llvm::Pass *): Assertion `PI && "Expected required passes to be initialized"' failed.<br class="">
Stack dump:<br class="">
0. Program arguments: /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc -mtriple=x86_64-unknown-unknown -global-isel <br class="">
#0 0x0000000001631384 PrintStackTraceSignalHandler(void*) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x1631384)<br class="">
#1 0x000000000162f09e llvm::sys::RunSignalHandlers() (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x162f09e)<br class="">
#2 0x0000000001631798 SignalHandler(int) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x1631798)<br class="">
#3 0x00007fb15e272890 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x12890)<br class="">
#4 0x00007fb15cf38e97 raise (/lib/x86_64-linux-gnu/libc.so.6+0x3ee97)<br class="">
#5 0x00007fb15cf3a801 abort (/lib/x86_64-linux-gnu/libc.so.6+0x40801)<br class="">
#6 0x00007fb15cf2a39a (/lib/x86_64-linux-gnu/libc.so.6+0x3039a)<br class="">
#7 0x00007fb15cf2a412 (/lib/x86_64-linux-gnu/libc.so.6+0x30412)<br class="">
#8 0x0000000000fbbec5 llvm::PMTopLevelManager::schedulePass(llvm::Pass*) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xfbbec5)<br class="">
#9 0x0000000000df7742 llvm::TargetPassConfig::addPass(llvm::Pass*, bool, bool) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xdf7742)<br class="">
#10 0x00000000006686d1 (anonymous namespace)::X86PassConfig::addGlobalInstructionSelect() (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x6686d1)<br class="">
#11 0x0000000000df826c llvm::TargetPassConfig::addCoreISelPasses() (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xdf826c)<br class="">
#12 0x0000000000df8446 llvm::TargetPassConfig::addISelPasses() (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xdf8446)<br class="">
#13 0x0000000000bced1a llvm::LLVMTargetMachine::addPassesToEmitFile(llvm::legacy::PassManagerBase&, llvm::raw_pwrite_stream&, llvm::raw_pwrite_stream*, llvm::TargetMachine::CodeGenFileType, bool, llvm::MachineModuleInfo*) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xbced1a)<br class="">
#14 0x00000000006318a7 compileModule(char**, llvm::LLVMContext&) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x6318a7)<br class="">
#15 0x000000000062f6cd main (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x62f6cd)<br class="">
#16 0x00007fb15cf1bb97 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x21b97)<br class="">
#17 0x000000000062d46a _start (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x62d46a)<br class="">
FileCheck error: '-' is empty.<br class="">
FileCheck command line: /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/FileCheck /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/test/CodeGen/X86/GlobalISel/add-ext.ll<br class="">
<br class="">
Can you take a look?<br class="">
<br class="">
Douglas Yung<br class="">
<br class="">
-----Original Message-----<br class="">
From: llvm-commits <<a href="mailto:llvm-commits-bounces@lists.llvm.org" target="_blank" class="">llvm-commits-bounces@lists.llvm.org</a>> On Behalf Of Matt Arsenault via llvm-commits<br class="">
Sent: Thursday, August 29, 2019 10:25<br class="">
To: <a href="mailto:llvm-commits@lists.llvm.org" target="_blank" class="">llvm-commits@lists.llvm.org</a><br class="">
Subject: [llvm] r370388 - GlobalISel: Add known bits to InstructionSelector<br class="">
<br class="">
Author: arsenm<br class="">
Date: Thu Aug 29 10:24:32 2019<br class="">
New Revision: 370388<br class="">
<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=370388&view=rev" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project?rev=370388&view=rev</a><br class="">
Log:<br class="">
GlobalISel: Add known bits to InstructionSelector<br class="">
<br class="">
AMDGPU uses this for some addressing mode selection patterns. The analysis run itself doesn't do anything so it seems easier to just always require this than adding a way to opt in.<br class="">
<br class="">
Modified:<br class="">
llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h<br class="">
llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp<br class="">
llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp<br class="">
llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll<br class="">
llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll<br class="">
<br class="">
Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h?rev=370388&r1=370387&r2=370388&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h?rev=370388&r1=370387&r2=370388&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h (original)<br class="">
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h Thu <br class="">
+++ Aug 29 10:24:32 2019<br class="">
@@ -31,6 +31,7 @@ namespace llvm {<br class="">
<br class="">
class APInt;<br class="">
class APFloat;<br class="">
+class GISelKnownBits;<br class="">
class MachineInstr;<br class="">
class MachineInstrBuilder;<br class="">
class MachineFunction;<br class="">
@@ -381,11 +382,15 @@ public:<br class="">
virtual bool select(MachineInstr &I) = 0;<br class="">
<br class="">
CodeGenCoverage *CoverageInfo = nullptr;<br class="">
+ GISelKnownBits *KnownBits = nullptr;<br class="">
MachineFunction *MF = nullptr;<br class="">
<br class="">
/// Setup per-MF selector state.<br class="">
- virtual void setupMF(MachineFunction &mf, CodeGenCoverage &covinfo) {<br class="">
+ virtual void setupMF(MachineFunction &mf,<br class="">
+ GISelKnownBits &KB,<br class="">
+ CodeGenCoverage &covinfo) {<br class="">
CoverageInfo = &covinfo;<br class="">
+ KnownBits = &KB;<br class="">
MF = &mf;<br class="">
}<br class="">
<br class="">
<br class="">
Modified: llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp?rev=370388&r1=370387&r2=370388&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp?rev=370388&r1=370387&r2=370388&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp (original)<br class="">
+++ llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp Thu Aug 29 <br class="">
+++ 10:24:32 2019<br class="">
@@ -12,6 +12,7 @@<br class="">
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"<br class="">
#include "llvm/ADT/PostOrderIterator.h"<br class="">
#include "llvm/ADT/Twine.h"<br class="">
+#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"<br class="">
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"<br class="">
#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"<br class="">
#include "llvm/CodeGen/GlobalISel/Utils.h"<br class="">
@@ -53,6 +54,8 @@ InstructionSelect::InstructionSelect() :<br class="">
<br class="">
void InstructionSelect::getAnalysisUsage(AnalysisUsage &AU) const {<br class="">
AU.addRequired<TargetPassConfig>();<br class="">
+ AU.addRequired<GISelKnownBitsAnalysis>();<br class="">
+ AU.addPreserved<GISelKnownBitsAnalysis>();<br class="">
getSelectionDAGFallbackAnalysisUsage(AU);<br class="">
MachineFunctionPass::getAnalysisUsage(AU);<br class="">
}<br class="">
@@ -64,12 +67,13 @@ bool InstructionSelect::runOnMachineFunc<br class="">
return false;<br class="">
<br class="">
LLVM_DEBUG(dbgs() << "Selecting function: " << MF.getName() << '\n');<br class="">
+ GISelKnownBits &KB = getAnalysis<GISelKnownBitsAnalysis>().get(MF);<br class="">
<br class="">
const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();<br class="">
InstructionSelector *ISel = MF.getSubtarget().getInstructionSelector();<br class="">
CodeGenCoverage CoverageInfo;<br class="">
assert(ISel && "Cannot work without InstructionSelector");<br class="">
- ISel->setupMF(MF, CoverageInfo);<br class="">
+ ISel->setupMF(MF, KB, CoverageInfo);<br class="">
<br class="">
// An optimization remark emitter. Used to report failures.<br class="">
MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);<br class="">
<br class="">
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=370388&r1=370387&r2=370388&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=370388&r1=370387&r2=370388&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (original)<br class="">
+++ llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp Thu Aug <br class="">
+++ 29 10:24:32 2019<br class="">
@@ -54,8 +54,9 @@ public:<br class="">
bool select(MachineInstr &I) override;<br class="">
static const char *getName() { return DEBUG_TYPE; }<br class="">
<br class="">
- void setupMF(MachineFunction &MF, CodeGenCoverage &CoverageInfo) override {<br class="">
- InstructionSelector::setupMF(MF, CoverageInfo);<br class="">
+ void setupMF(MachineFunction &MF, GISelKnownBits &KB,<br class="">
+ CodeGenCoverage &CoverageInfo) override {<br class="">
+ InstructionSelector::setupMF(MF, KB, CoverageInfo);<br class="">
<br class="">
// hasFnAttribute() is expensive to call on every BRCOND selection, so<br class="">
// cache it here for each run of the selector.<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll?rev=370388&r1=370387&r2=370388&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll?rev=370388&r1=370387&r2=370388&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.<br class="">
+++ ll Thu Aug 29 10:24:32 2019<br class="">
@@ -53,6 +53,7 @@<br class="">
; VERIFY-NEXT: Verify generated machine code<br class="">
; ENABLED-O0-NEXT: Localizer<br class="">
; VERIFY-O0-NEXT: Verify generated machine code<br class="">
+; ENABLED-NEXT: Analysis for ComputingKnownBits<br class="">
; ENABLED-NEXT: InstructionSelect<br class="">
; VERIFY-NEXT: Verify generated machine code<br class="">
; ENABLED-NEXT: ResetMachineFunction<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll?rev=370388&r1=370387&r2=370388&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll?rev=370388&r1=370387&r2=370388&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll Thu Aug 29 10:24:32 <br class="">
+++ 2019<br class="">
@@ -41,6 +41,7 @@<br class="">
; CHECK-NEXT: Legalizer<br class="">
; CHECK-NEXT: RegBankSelect<br class="">
; CHECK-NEXT: Localizer<br class="">
+; CHECK-NEXT: Analysis for ComputingKnownBits<br class="">
; CHECK-NEXT: InstructionSelect<br class="">
; CHECK-NEXT: ResetMachineFunction<br class="">
; CHECK-NEXT: AArch64 Instruction Selection<br class="">
<br class="">
<br class="">
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