<div dir="ltr">Hello Benjamin,<br><br>This commit broke at least couple builders few days ago.<br>Please have a look ASAP?<br><br><a href="http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/35998/steps/build_Lld/logs/stdio">http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/35998/steps/build_Lld/logs/stdio</a><br><a href="http://lab.llvm.org:8011/builders/clang-lld-x86_64-2stage">http://lab.llvm.org:8011/builders/clang-lld-x86_64-2stage</a><br><br>. . .<br>/Users/buildslave/as-bldslv9_new/lld-x86_64-darwin13/llvm.src/lib/Transforms/Scalar/LoopFuse.cpp:357:27: error: unused function 'operator<<' [-Werror,-Wunused-function]<br>inline llvm::raw_ostream &operator<<(llvm::raw_ostream &OS,<br> ^<br>1 error generated.<br>make[2]: *** [lib/Transforms/Scalar/CMakeFiles/LLVMScalarOpts.dir/LoopFuse.cpp.o] Error 1<br>make[1]: *** [lib/Transforms/Scalar/CMakeFiles/LLVMScalarOpts.dir/all] Error 2<br>make[1]: *** Waiting for unfinished jobs....<br><br>Thanks<br><br>Galina</div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Aug 23, 2019 at 12:58 PM Benjamin Kramer via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Author: d0k<br>
Date: Fri Aug 23 12:59:23 2019<br>
New Revision: 369803<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=369803&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=369803&view=rev</a><br>
Log:<br>
Do a sweep of symbol internalization. NFC.<br>
<br>
Modified:<br>
llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp<br>
llvm/trunk/lib/CodeGen/TargetPassConfig.cpp<br>
llvm/trunk/lib/IR/DIBuilder.cpp<br>
llvm/trunk/lib/LTO/SummaryBasedOptimizations.cpp<br>
llvm/trunk/lib/MC/MCDwarf.cpp<br>
llvm/trunk/lib/Remarks/RemarkParser.cpp<br>
llvm/trunk/lib/Support/FileCheck.cpp<br>
llvm/trunk/lib/Target/AArch64/AArch64SpeculationHardening.cpp<br>
llvm/trunk/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp<br>
llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp<br>
llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp<br>
llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp<br>
llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp<br>
llvm/trunk/lib/Target/X86/X86IndirectBranchTracking.cpp<br>
llvm/trunk/lib/Transforms/Scalar/LoopFuse.cpp<br>
<br>
Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original)<br>
+++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Fri Aug 23 12:59:23 2019<br>
@@ -86,7 +86,7 @@ static cl::opt<unsigned><br>
cl::desc("Number of metadatas above which we emit an index "<br>
"to enable lazy-loading"));<br>
<br>
-cl::opt<bool> WriteRelBFToSummary(<br>
+static cl::opt<bool> WriteRelBFToSummary(<br>
"write-relbf-to-summary", cl::Hidden, cl::init(false),<br>
cl::desc("Write relative block frequency to function summary "));<br>
<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Fri Aug 23 12:59:23 2019<br>
@@ -5327,8 +5327,9 @@ static SDValue ExpandPowI(const SDLoc &D<br>
<br>
// getUnderlyingArgRegs - Find underlying registers used for a truncated,<br>
// bitcasted, or split argument. Returns a list of <Register, size in bits><br>
-void getUnderlyingArgRegs(SmallVectorImpl<std::pair<unsigned, unsigned>> &Regs,<br>
- const SDValue &N) {<br>
+static void<br>
+getUnderlyingArgRegs(SmallVectorImpl<std::pair<unsigned, unsigned>> &Regs,<br>
+ const SDValue &N) {<br>
switch (N.getOpcode()) {<br>
case ISD::CopyFromReg: {<br>
SDValue Op = N.getOperand(1);<br>
<br>
Modified: llvm/trunk/lib/CodeGen/TargetPassConfig.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetPassConfig.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetPassConfig.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/TargetPassConfig.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/TargetPassConfig.cpp Fri Aug 23 12:59:23 2019<br>
@@ -49,9 +49,10 @@<br>
<br>
using namespace llvm;<br>
<br>
-cl::opt<bool> EnableIPRA("enable-ipra", cl::init(false), cl::Hidden,<br>
- cl::desc("Enable interprocedural register allocation "<br>
- "to reduce load/store at procedure calls."));<br>
+static cl::opt<bool><br>
+ EnableIPRA("enable-ipra", cl::init(false), cl::Hidden,<br>
+ cl::desc("Enable interprocedural register allocation "<br>
+ "to reduce load/store at procedure calls."));<br>
static cl::opt<bool> DisablePostRASched("disable-post-ra", cl::Hidden,<br>
cl::desc("Disable Post Regalloc Scheduler"));<br>
static cl::opt<bool> DisableBranchFold("disable-branch-fold", cl::Hidden,<br>
@@ -152,8 +153,10 @@ static cl::opt<GlobalISelAbortMode> Enab<br>
// substitutePass(&PostRASchedulerID, &PostMachineSchedulerID).<br>
// Targets can return true in targetSchedulesPostRAScheduling() and<br>
// insert a PostRA scheduling pass wherever it wants.<br>
-cl::opt<bool> MISchedPostRA("misched-postra", cl::Hidden,<br>
- cl::desc("Run MachineScheduler post regalloc (independent of preRA sched)"));<br>
+static cl::opt<bool> MISchedPostRA(<br>
+ "misched-postra", cl::Hidden,<br>
+ cl::desc(<br>
+ "Run MachineScheduler post regalloc (independent of preRA sched)"));<br>
<br>
// Experimental option to run live interval analysis early.<br>
static cl::opt<bool> EarlyLiveIntervals("early-live-intervals", cl::Hidden,<br>
@@ -175,10 +178,10 @@ static cl::opt<CFLAAType> UseCFLAA(<br>
/// Option names for limiting the codegen pipeline.<br>
/// Those are used in error reporting and we didn't want<br>
/// to duplicate their names all over the place.<br>
-const char *StartAfterOptName = "start-after";<br>
-const char *StartBeforeOptName = "start-before";<br>
-const char *StopAfterOptName = "stop-after";<br>
-const char *StopBeforeOptName = "stop-before";<br>
+static const char *StartAfterOptName = "start-after";<br>
+static const char *StartBeforeOptName = "start-before";<br>
+static const char *StopAfterOptName = "stop-after";<br>
+static const char *StopBeforeOptName = "stop-before";<br>
<br>
static cl::opt<std::string><br>
StartAfterOpt(StringRef(StartAfterOptName),<br>
<br>
Modified: llvm/trunk/lib/IR/DIBuilder.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/IR/DIBuilder.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/IR/DIBuilder.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/IR/DIBuilder.cpp (original)<br>
+++ llvm/trunk/lib/IR/DIBuilder.cpp Fri Aug 23 12:59:23 2019<br>
@@ -25,7 +25,7 @@<br>
using namespace llvm;<br>
using namespace llvm::dwarf;<br>
<br>
-cl::opt<bool><br>
+static cl::opt<bool><br>
UseDbgAddr("use-dbg-addr",<br>
llvm::cl::desc("Use llvm.dbg.addr for all local variables"),<br>
cl::init(false), cl::Hidden);<br>
<br>
Modified: llvm/trunk/lib/LTO/SummaryBasedOptimizations.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/LTO/SummaryBasedOptimizations.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/LTO/SummaryBasedOptimizations.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/LTO/SummaryBasedOptimizations.cpp (original)<br>
+++ llvm/trunk/lib/LTO/SummaryBasedOptimizations.cpp Fri Aug 23 12:59:23 2019<br>
@@ -18,7 +18,7 @@<br>
<br>
using namespace llvm;<br>
<br>
-cl::opt<bool> ThinLTOSynthesizeEntryCounts(<br>
+static cl::opt<bool> ThinLTOSynthesizeEntryCounts(<br>
"thinlto-synthesize-entry-counts", cl::init(false), cl::Hidden,<br>
cl::desc("Synthesize entry counts based on the summary"));<br>
<br>
<br>
Modified: llvm/trunk/lib/MC/MCDwarf.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCDwarf.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCDwarf.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MCDwarf.cpp (original)<br>
+++ llvm/trunk/lib/MC/MCDwarf.cpp Fri Aug 23 12:59:23 2019<br>
@@ -544,8 +544,8 @@ Expected<unsigned> MCDwarfLineTable::try<br>
FileNumber);<br>
}<br>
<br>
-bool isRootFile(const MCDwarfFile &RootFile, StringRef &Directory,<br>
- StringRef &FileName, Optional<MD5::MD5Result> Checksum) {<br>
+static bool isRootFile(const MCDwarfFile &RootFile, StringRef &Directory,<br>
+ StringRef &FileName, Optional<MD5::MD5Result> Checksum) {<br>
if (RootFile.Name.empty() || RootFile.Name != FileName.data())<br>
return false;<br>
return RootFile.Checksum == Checksum;<br>
<br>
Modified: llvm/trunk/lib/Remarks/RemarkParser.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Remarks/RemarkParser.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Remarks/RemarkParser.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Remarks/RemarkParser.cpp (original)<br>
+++ llvm/trunk/lib/Remarks/RemarkParser.cpp Fri Aug 23 12:59:23 2019<br>
@@ -105,6 +105,7 @@ llvm::remarks::createRemarkParserFromMet<br>
llvm_unreachable("unhandled ParseFormat");<br>
}<br>
<br>
+namespace {<br>
// Wrapper that holds the state needed to interact with the C API.<br>
struct CParser {<br>
std::unique_ptr<RemarkParser> TheParser;<br>
@@ -120,6 +121,7 @@ struct CParser {<br>
bool hasError() const { return Err.hasValue(); }<br>
const char *getMessage() const { return Err ? Err->c_str() : nullptr; };<br>
};<br>
+} // namespace<br>
<br>
// Create wrappers for C Binding types (see CBindingWrapping.h).<br>
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(CParser, LLVMRemarkParserRef)<br>
<br>
Modified: llvm/trunk/lib/Support/FileCheck.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/FileCheck.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/FileCheck.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Support/FileCheck.cpp (original)<br>
+++ llvm/trunk/lib/Support/FileCheck.cpp Fri Aug 23 12:59:23 2019<br>
@@ -125,7 +125,7 @@ FileCheckPattern::parseVariable(StringRe<br>
<br>
// StringRef holding all characters considered as horizontal whitespaces by<br>
// FileCheck input canonicalization.<br>
-StringRef SpaceChars = " \t";<br>
+constexpr StringLiteral SpaceChars = " \t";<br>
<br>
// Parsing helper function that strips the first character in S and returns it.<br>
static char popFront(StringRef &S) {<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/AArch64SpeculationHardening.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SpeculationHardening.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SpeculationHardening.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/AArch64SpeculationHardening.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/AArch64SpeculationHardening.cpp Fri Aug 23 12:59:23 2019<br>
@@ -115,9 +115,9 @@ using namespace llvm;<br>
<br>
#define AARCH64_SPECULATION_HARDENING_NAME "AArch64 speculation hardening pass"<br>
<br>
-cl::opt<bool> HardenLoads("aarch64-slh-loads", cl::Hidden,<br>
- cl::desc("Sanitize loads from memory."),<br>
- cl::init(true));<br>
+static cl::opt<bool> HardenLoads("aarch64-slh-loads", cl::Hidden,<br>
+ cl::desc("Sanitize loads from memory."),<br>
+ cl::init(true));<br>
<br>
namespace {<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp Fri Aug 23 12:59:23 2019<br>
@@ -93,9 +93,9 @@ static cl::opt<bool> OnlyNonNestedMemmov<br>
cl::Hidden, cl::init(true),<br>
cl::desc("Only enable generating memmove in non-nested loops"));<br>
<br>
-cl::opt<bool> HexagonVolatileMemcpy("disable-hexagon-volatile-memcpy",<br>
- cl::Hidden, cl::init(false),<br>
- cl::desc("Enable Hexagon-specific memcpy for volatile destination."));<br>
+static cl::opt<bool> HexagonVolatileMemcpy(<br>
+ "disable-hexagon-volatile-memcpy", cl::Hidden, cl::init(false),<br>
+ cl::desc("Enable Hexagon-specific memcpy for volatile destination."));<br>
<br>
static cl::opt<unsigned> SimplifyLimit("hlir-simplify-limit", cl::init(10000),<br>
cl::Hidden, cl::desc("Maximum number of simplification steps in HLIR"));<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp Fri Aug 23 12:59:23 2019<br>
@@ -57,9 +57,9 @@ static cl::opt<bool> DisablePacketizer("<br>
cl::ZeroOrMore, cl::init(false),<br>
cl::desc("Disable Hexagon packetizer pass"));<br>
<br>
-cl::opt<bool> Slot1Store("slot1-store-slot0-load", cl::Hidden,<br>
- cl::ZeroOrMore, cl::init(true),<br>
- cl::desc("Allow slot1 store and slot0 load"));<br>
+static cl::opt<bool> Slot1Store("slot1-store-slot0-load", cl::Hidden,<br>
+ cl::ZeroOrMore, cl::init(true),<br>
+ cl::desc("Allow slot1 store and slot0 load"));<br>
<br>
static cl::opt<bool> PacketizeVolatiles("hexagon-packetize-volatiles",<br>
cl::ZeroOrMore, cl::Hidden, cl::init(true),<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp Fri Aug 23 12:59:23 2019<br>
@@ -72,7 +72,6 @@ cl::opt<bool> MV65("mv65", cl::Hidden, c<br>
cl::init(false));<br>
cl::opt<bool> MV66("mv66", cl::Hidden, cl::desc("Build for Hexagon V66"),<br>
cl::init(false));<br>
-} // namespace<br>
<br>
cl::opt<Hexagon::ArchEnum><br>
EnableHVX("mhvx",<br>
@@ -86,6 +85,7 @@ cl::opt<Hexagon::ArchEnum><br>
clEnumValN(Hexagon::ArchEnum::Generic, "", "")),<br>
// Sentinel for flag not present.<br>
cl::init(Hexagon::ArchEnum::NoArch), cl::ValueOptional);<br>
+} // namespace<br>
<br>
static cl::opt<bool><br>
DisableHVX("mno-hvx", cl::Hidden,<br>
<br>
Modified: llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp (original)<br>
+++ llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp Fri Aug 23 12:59:23 2019<br>
@@ -744,7 +744,7 @@ public:<br>
// Return the matching FPR64 register for the given FPR32.<br>
// FIXME: Ideally this function could be removed in favour of using<br>
// information from TableGen.<br>
-Register convertFPR32ToFPR64(Register Reg) {<br>
+static Register convertFPR32ToFPR64(Register Reg) {<br>
switch (Reg) {<br>
default:<br>
llvm_unreachable("Not a recognised FPR32 register");<br>
<br>
Modified: llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp Fri Aug 23 12:59:23 2019<br>
@@ -1078,8 +1078,8 @@ unsigned RISCVTargetLowering::ComputeNum<br>
return 1;<br>
}<br>
<br>
-MachineBasicBlock *emitReadCycleWidePseudo(MachineInstr &MI,<br>
- MachineBasicBlock *BB) {<br>
+static MachineBasicBlock *emitReadCycleWidePseudo(MachineInstr &MI,<br>
+ MachineBasicBlock *BB) {<br>
assert(MI.getOpcode() == RISCV::ReadCycleWide && "Unexpected instruction");<br>
<br>
// To read the 64-bit cycle CSR on a 32-bit target, we read the two halves.<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86IndirectBranchTracking.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IndirectBranchTracking.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IndirectBranchTracking.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86IndirectBranchTracking.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86IndirectBranchTracking.cpp Fri Aug 23 12:59:23 2019<br>
@@ -84,7 +84,7 @@ bool X86IndirectBranchTrackingPass::addE<br>
return false;<br>
}<br>
<br>
-bool IsCallReturnTwice(llvm::MachineOperand &MOp) {<br>
+static bool IsCallReturnTwice(llvm::MachineOperand &MOp) {<br>
if (!MOp.isGlobal())<br>
return false;<br>
auto *CalleeFn = dyn_cast<Function>(MOp.getGlobal());<br>
<br>
Modified: llvm/trunk/lib/Transforms/Scalar/LoopFuse.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopFuse.cpp?rev=369803&r1=369802&r2=369803&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopFuse.cpp?rev=369803&r1=369802&r2=369803&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Transforms/Scalar/LoopFuse.cpp (original)<br>
+++ llvm/trunk/lib/Transforms/Scalar/LoopFuse.cpp Fri Aug 23 12:59:23 2019<br>
@@ -110,6 +110,7 @@ static cl::opt<bool><br>
cl::Hidden, cl::init(false), cl::ZeroOrMore);<br>
#endif<br>
<br>
+namespace {<br>
/// This class is used to represent a candidate for loop fusion. When it is<br>
/// constructed, it checks the conditions for loop fusion to ensure that it<br>
/// represents a valid candidate. It caches several parts of a loop that are<br>
@@ -338,7 +339,6 @@ struct FusionCandidateCompare {<br>
}<br>
};<br>
<br>
-namespace {<br>
using LoopVector = SmallVector<Loop *, 4>;<br>
<br>
// Set of Control Flow Equivalent (CFE) Fusion Candidates, sorted in dominance<br>
@@ -353,7 +353,6 @@ using LoopVector = SmallVector<Loop *, 4<br>
// keeps the FusionCandidateSet sorted will also simplify the implementation.<br>
using FusionCandidateSet = std::set<FusionCandidate, FusionCandidateCompare>;<br>
using FusionCandidateCollection = SmallVector<FusionCandidateSet, 4>;<br>
-} // namespace<br>
<br>
inline llvm::raw_ostream &operator<<(llvm::raw_ostream &OS,<br>
const FusionCandidateSet &CandSet) {<br>
@@ -1211,6 +1210,7 @@ struct LoopFuseLegacy : public FunctionP<br>
return LF.fuseLoops(F);<br>
}<br>
};<br>
+} // namespace<br>
<br>
PreservedAnalyses LoopFusePass::run(Function &F, FunctionAnalysisManager &AM) {<br>
auto &LI = AM.getResult<LoopAnalysis>(F);<br>
<br>
<br>
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</blockquote></div>