<div dir="ltr">This seems to be miscompiling Python (interpreter just crashes). I'll try to get a test case.</div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Jun 6, 2019 at 10:53 AM Sam Parker via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Author: sam_parker<br>
Date: Thu Jun 6 01:56:26 2019<br>
New Revision: 362687<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=362687&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=362687&view=rev</a><br>
Log:<br>
[SCEV] Use wrap flags in InsertBinop<br>
<br>
If the given SCEVExpr has no (un)signed flags attached to it, transfer<br>
these to the resulting instruction or use them to find an existing<br>
instruction.<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D61934" rel="noreferrer" target="_blank">https://reviews.llvm.org/D61934</a><br>
<br>
Modified:<br>
llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h<br>
llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp<br>
llvm/trunk/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll<br>
llvm/trunk/test/Transforms/IRCE/bad_expander.ll<br>
llvm/trunk/test/Transforms/IRCE/conjunctive-checks.ll<br>
llvm/trunk/test/Transforms/IRCE/decrementing-loop.ll<br>
llvm/trunk/test/Transforms/IRCE/ranges_of_different_types.ll<br>
llvm/trunk/test/Transforms/IRCE/rc-negative-bound.ll<br>
llvm/trunk/test/Transforms/IRCE/single-access-no-preloop.ll<br>
llvm/trunk/test/Transforms/IRCE/single-access-with-preloop.ll<br>
llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll<br>
llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll<br>
llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll<br>
llvm/trunk/test/Transforms/IndVarSimplify/lftr.ll<br>
llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate_1.ll<br>
llvm/trunk/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll<br>
llvm/trunk/test/Transforms/LoopIdiom/basic.ll<br>
llvm/trunk/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll<br>
llvm/trunk/test/Transforms/LoopReroll/basic.ll<br>
llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll<br>
llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll<br>
llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll<br>
llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll<br>
llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll<br>
llvm/trunk/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll<br>
llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll<br>
llvm/trunk/test/Transforms/LoopVectorize/AArch64/pr36032.ll<br>
llvm/trunk/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll<br>
<br>
Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h (original)<br>
+++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h Thu Jun 6 01:56:26 2019<br>
@@ -318,7 +318,7 @@ namespace llvm {<br>
/// avoid inserting an obviously redundant operation, and hoisting to an<br>
/// outer loop when the opportunity is there and it is safe.<br>
Value *InsertBinop(Instruction::BinaryOps Opcode, Value *LHS, Value *RHS,<br>
- bool IsSafeToHoist);<br>
+ SCEV::NoWrapFlags Flags, bool IsSafeToHoist);<br>
<br>
/// Arrange for there to be a cast of V to Ty at IP, reusing an existing<br>
/// cast if a suitable one exists, moving an existing cast if a suitable one<br>
<br>
Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp (original)<br>
+++ llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Thu Jun 6 01:56:26 2019<br>
@@ -169,7 +169,8 @@ Value *SCEVExpander::InsertNoopCastOfTo(<br>
/// of work to avoid inserting an obviously redundant operation, and hoisting<br>
/// to an outer loop when the opportunity is there and it is safe.<br>
Value *SCEVExpander::InsertBinop(Instruction::BinaryOps Opcode,<br>
- Value *LHS, Value *RHS, bool IsSafeToHoist) {<br>
+ Value *LHS, Value *RHS,<br>
+ SCEV::NoWrapFlags Flags, bool IsSafeToHoist) {<br>
// Fold a binop with constant operands.<br>
if (Constant *CLHS = dyn_cast<Constant>(LHS))<br>
if (Constant *CRHS = dyn_cast<Constant>(RHS))<br>
@@ -188,20 +189,22 @@ Value *SCEVExpander::InsertBinop(Instruc<br>
if (isa<DbgInfoIntrinsic>(IP))<br>
ScanLimit++;<br>
<br>
- // Conservatively, do not use any instruction which has any of wrap/exact<br>
- // flags installed.<br>
- // TODO: Instead of simply disable poison instructions we can be clever<br>
- // here and match SCEV to this instruction.<br>
- auto canGeneratePoison = [](Instruction *I) {<br>
- if (isa<OverflowingBinaryOperator>(I) &&<br>
- (I->hasNoSignedWrap() || I->hasNoUnsignedWrap()))<br>
- return true;<br>
+ auto canGenerateIncompatiblePoison = [&Flags](Instruction *I) {<br>
+ // Ensure that no-wrap flags match.<br>
+ if (isa<OverflowingBinaryOperator>(I)) {<br>
+ if (I->hasNoSignedWrap() != (Flags & SCEV::FlagNSW))<br>
+ return true;<br>
+ if (I->hasNoUnsignedWrap() != (Flags & SCEV::FlagNUW))<br>
+ return true;<br>
+ }<br>
+ // Conservatively, do not use any instruction which has any of exact<br>
+ // flags installed.<br>
if (isa<PossiblyExactOperator>(I) && I->isExact())<br>
return true;<br>
return false;<br>
};<br>
if (IP->getOpcode() == (unsigned)Opcode && IP->getOperand(0) == LHS &&<br>
- IP->getOperand(1) == RHS && !canGeneratePoison(&*IP))<br>
+ IP->getOperand(1) == RHS && !canGenerateIncompatiblePoison(&*IP))<br>
return &*IP;<br>
if (IP == BlockBegin) break;<br>
}<br>
@@ -226,6 +229,10 @@ Value *SCEVExpander::InsertBinop(Instruc<br>
// If we haven't found this binop, insert it.<br>
Instruction *BO = cast<Instruction>(Builder.CreateBinOp(Opcode, LHS, RHS));<br>
BO->setDebugLoc(Loc);<br>
+ if (Flags & SCEV::FlagNUW)<br>
+ BO->setHasNoUnsignedWrap();<br>
+ if (Flags & SCEV::FlagNSW)<br>
+ BO->setHasNoSignedWrap();<br>
rememberInstruction(BO);<br>
<br>
return BO;<br>
@@ -737,7 +744,8 @@ Value *SCEVExpander::visitAddExpr(const<br>
// Instead of doing a negate and add, just do a subtract.<br>
Value *W = expandCodeFor(SE.getNegativeSCEV(Op), Ty);<br>
Sum = InsertNoopCastOfTo(Sum, Ty);<br>
- Sum = InsertBinop(Instruction::Sub, Sum, W, /*IsSafeToHoist*/ true);<br>
+ Sum = InsertBinop(Instruction::Sub, Sum, W, S->getNoWrapFlags(),<br>
+ /*IsSafeToHoist*/ true);<br>
++I;<br>
} else {<br>
// A simple add.<br>
@@ -745,7 +753,8 @@ Value *SCEVExpander::visitAddExpr(const<br>
Sum = InsertNoopCastOfTo(Sum, Ty);<br>
// Canonicalize a constant to the RHS.<br>
if (isa<Constant>(Sum)) std::swap(Sum, W);<br>
- Sum = InsertBinop(Instruction::Add, Sum, W, /*IsSafeToHoist*/ true);<br>
+ Sum = InsertBinop(Instruction::Add, Sum, W, S->getNoWrapFlags(),<br>
+ /*IsSafeToHoist*/ true);<br>
++I;<br>
}<br>
}<br>
@@ -774,7 +783,7 @@ Value *SCEVExpander::visitMulExpr(const<br>
// Expand the calculation of X pow N in the following manner:<br>
// Let N = P1 + P2 + ... + PK, where all P are powers of 2. Then:<br>
// X pow N = (X pow P1) * (X pow P2) * ... * (X pow PK).<br>
- const auto ExpandOpBinPowN = [this, &I, &OpsAndLoops, &Ty]() {<br>
+ const auto ExpandOpBinPowN = [this, &I, &OpsAndLoops, &Ty, &S]() {<br>
auto E = I;<br>
// Calculate how many times the same operand from the same loop is included<br>
// into this power.<br>
@@ -797,9 +806,11 @@ Value *SCEVExpander::visitMulExpr(const<br>
if (Exponent & 1)<br>
Result = P;<br>
for (uint64_t BinExp = 2; BinExp <= Exponent; BinExp <<= 1) {<br>
- P = InsertBinop(Instruction::Mul, P, P, /*IsSafeToHoist*/ true);<br>
+ P = InsertBinop(Instruction::Mul, P, P, S->getNoWrapFlags(),<br>
+ /*IsSafeToHoist*/ true);<br>
if (Exponent & BinExp)<br>
Result = Result ? InsertBinop(Instruction::Mul, Result, P,<br>
+ S->getNoWrapFlags(),<br>
/*IsSafeToHoist*/ true)<br>
: P;<br>
}<br>
@@ -817,6 +828,7 @@ Value *SCEVExpander::visitMulExpr(const<br>
// Instead of doing a multiply by negative one, just do a negate.<br>
Prod = InsertNoopCastOfTo(Prod, Ty);<br>
Prod = InsertBinop(Instruction::Sub, Constant::getNullValue(Ty), Prod,<br>
+ S->getNoWrapFlags(),<br>
/*IsSafeToHoist*/ true);<br>
++I;<br>
} else {<br>
@@ -831,9 +843,10 @@ Value *SCEVExpander::visitMulExpr(const<br>
assert(!Ty->isVectorTy() && "vector types are not SCEVable");<br>
Prod = InsertBinop(Instruction::Shl, Prod,<br>
ConstantInt::get(Ty, RHS->logBase2()),<br>
- /*IsSafeToHoist*/ true);<br>
+ S->getNoWrapFlags(), /*IsSafeToHoist*/ true);<br>
} else {<br>
- Prod = InsertBinop(Instruction::Mul, Prod, W, /*IsSafeToHoist*/ true);<br>
+ Prod = InsertBinop(Instruction::Mul, Prod, W, S->getNoWrapFlags(),<br>
+ /*IsSafeToHoist*/ true);<br>
}<br>
}<br>
}<br>
@@ -850,11 +863,11 @@ Value *SCEVExpander::visitUDivExpr(const<br>
if (RHS.isPowerOf2())<br>
return InsertBinop(Instruction::LShr, LHS,<br>
ConstantInt::get(Ty, RHS.logBase2()),<br>
- /*IsSafeToHoist*/ true);<br>
+ SCEV::FlagAnyWrap, /*IsSafeToHoist*/ true);<br>
}<br>
<br>
Value *RHS = expandCodeFor(S->getRHS(), Ty);<br>
- return InsertBinop(Instruction::UDiv, LHS, RHS,<br>
+ return InsertBinop(Instruction::UDiv, LHS, RHS, SCEV::FlagAnyWrap,<br>
/*IsSafeToHoist*/ SE.isKnownNonZero(S->getRHS()));<br>
}<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll (original)<br>
+++ llvm/trunk/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll Thu Jun 6 01:56:26 2019<br>
@@ -3,7 +3,7 @@<br>
; Make sure that we generate correct runtime checks.<br>
<br>
; CHECK: b7.old:<br>
-; CHECK: [[LEN:%[0-9]+]] = shl i32 %len, 3<br>
+; CHECK: [[LEN:%[0-9]+]] = shl nuw i32 %len, 3<br>
; CHECK: [[SRC:%[0-9]+]] = ptrtoint i8* %src to i32<br>
; CHECK: [[DST:%[0-9]+]] = ptrtoint i8* %dst to i32<br>
; CHECK: [[ULT:%[0-9]+]] = icmp ult i32 [[DST]], [[SRC]]<br>
<br>
Modified: llvm/trunk/test/Transforms/IRCE/bad_expander.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/bad_expander.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/bad_expander.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IRCE/bad_expander.ll (original)<br>
+++ llvm/trunk/test/Transforms/IRCE/bad_expander.ll Thu Jun 6 01:56:26 2019<br>
@@ -89,7 +89,7 @@ define void @test_03(i64* %p1, i64* %p2,<br>
; CHECK: entry:<br>
; CHECK-NEXT: %num = load i64, i64* %p1, align 4<br>
; CHECK-NEXT: [[DIV:%[^ ]+]] = udiv i64 %num, 13<br>
-; CHECK-NEXT: [[DIV_MINUS_1:%[^ ]+]] = add i64 [[DIV]], -1<br>
+; CHECK-NEXT: [[DIV_MINUS_1:%[^ ]+]] = add nsw i64 [[DIV]], -1<br>
; CHECK-NEXT: [[COMP1:%[^ ]+]] = icmp sgt i64 [[DIV_MINUS_1]], 0<br>
; CHECK-NEXT: %<a href="http://exit.mainloop.at" rel="noreferrer" target="_blank">exit.mainloop.at</a> = select i1 [[COMP1]], i64 [[DIV_MINUS_1]], i64 0<br>
; CHECK-NEXT: [[COMP2:%[^ ]+]] = icmp slt i64 0, %<a href="http://exit.mainloop.at" rel="noreferrer" target="_blank">exit.mainloop.at</a><br>
<br>
Modified: llvm/trunk/test/Transforms/IRCE/conjunctive-checks.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/conjunctive-checks.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/conjunctive-checks.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IRCE/conjunctive-checks.ll (original)<br>
+++ llvm/trunk/test/Transforms/IRCE/conjunctive-checks.ll Thu Jun 6 01:56:26 2019<br>
@@ -5,7 +5,7 @@ define void @f_0(i32 *%arr, i32 *%a_len_<br>
; CHECK-LABEL: @f_0(<br>
<br>
; CHECK: loop.preheader:<br>
-; CHECK: [[len_sub:[^ ]+]] = add i32 %len, -4<br>
+; CHECK: [[len_sub:[^ ]+]] = add nsw i32 %len, -4<br>
; CHECK: [[exit_main_loop_at_hiclamp_cmp:[^ ]+]] = icmp slt i32 %n, [[len_sub]]<br>
; CHECK: [[exit_main_loop_at_hiclamp:[^ ]+]] = select i1 [[exit_main_loop_at_hiclamp_cmp]], i32 %n, i32 [[len_sub]]<br>
; CHECK: [[exit_main_loop_at_loclamp_cmp:[^ ]+]] = icmp sgt i32 [[exit_main_loop_at_hiclamp]], 0<br>
<br>
Modified: llvm/trunk/test/Transforms/IRCE/decrementing-loop.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/decrementing-loop.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/decrementing-loop.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IRCE/decrementing-loop.ll (original)<br>
+++ llvm/trunk/test/Transforms/IRCE/decrementing-loop.ll Thu Jun 6 01:56:26 2019<br>
@@ -33,7 +33,7 @@ define void @decrementing_loop(i32 *%arr<br>
; CHECK: [[len_hiclamp:[^ ]+]] = select i1 [[len_hiclamp_cmp]], i32 %len, i32 %n<br>
; CHECK: [[not_exit_preloop_at_cmp:[^ ]+]] = icmp sgt i32 [[len_hiclamp]], 0<br>
; CHECK: [[not_exit_preloop_at:[^ ]+]] = select i1 [[not_exit_preloop_at_cmp]], i32 [[len_hiclamp]], i32 0<br>
-; CHECK: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add i32 [[not_exit_preloop_at]], -1<br>
+; CHECK: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add nsw i32 [[not_exit_preloop_at]], -1<br>
}<br>
<br>
; Make sure that we can eliminate the range check when the loop looks like:<br>
<br>
Modified: llvm/trunk/test/Transforms/IRCE/ranges_of_different_types.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/ranges_of_different_types.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/ranges_of_different_types.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IRCE/ranges_of_different_types.ll (original)<br>
+++ llvm/trunk/test/Transforms/IRCE/ranges_of_different_types.ll Thu Jun 6 01:56:26 2019<br>
@@ -23,7 +23,7 @@ define void @test_01(i32* %arr, i32* %a_<br>
; CHECK-NOT: preloop<br>
; CHECK: entry:<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0<br>
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, -13<br>
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nsw i32 %len, -13<br>
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp slt i32 [[SUB1]], 101<br>
; CHECK-NEXT: [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 101<br>
; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SMAX]], 0<br>
@@ -79,10 +79,10 @@ define void @test_02(i32* %arr, i32* %a_<br>
; CHECK-LABEL: test_02(<br>
; CHECK: entry:<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0<br>
-; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add i32 %len, -2147483647<br>
+; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add nuw nsw i32 %len, -2147483647<br>
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[LEN_MINUS_SMAX]], -13<br>
; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[LEN_MINUS_SMAX]], i32 -13<br>
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 %len, [[SMAX1]]<br>
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub nuw nsw i32 %len, [[SMAX1]]<br>
; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp slt i32 [[SUB1]], 101<br>
; CHECK-NEXT: [[SMAX2:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB1]], i32 101<br>
; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp sgt i32 [[SMAX2]], 0<br>
@@ -202,7 +202,7 @@ define void @test_04(i32* %arr, i32* %a_<br>
; CHECK-LABEL: test_04(<br>
; CHECK: entry:<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0<br>
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, 13<br>
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nuw i32 %len, 13<br>
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp ult i32 [[SUB1]], 101<br>
; CHECK-NEXT: %<a href="http://exit.mainloop.at" rel="noreferrer" target="_blank">exit.mainloop.at</a> = select i1 [[CMP1]], i32 [[SUB1]], i32 101<br>
; CHECK-NEXT: br i1 true, label %loop.preloop.preheader<br>
@@ -245,7 +245,7 @@ define void @test_05(i32* %arr, i32* %a_<br>
; CHECK-NOT: preloop<br>
; CHECK: entry:<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0<br>
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, -13<br>
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nsw i32 %len, -13<br>
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp slt i32 [[SUB1]], 101<br>
; CHECK-NEXT: [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 101<br>
; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SMAX]], 0<br>
@@ -286,10 +286,10 @@ define void @test_06(i32* %arr, i32* %a_<br>
; CHECK-LABEL: test_06(<br>
; CHECK: entry:<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0<br>
-; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add i32 %len, -2147483647<br>
+; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add nuw nsw i32 %len, -2147483647<br>
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[LEN_MINUS_SMAX]], -13<br>
; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[LEN_MINUS_SMAX]], i32 -13<br>
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 %len, [[SMAX1]]<br>
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub nuw nsw i32 %len, [[SMAX1]]<br>
; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp slt i32 [[SUB1]], 101<br>
; CHECK-NEXT: [[SMAX2:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB1]], i32 101<br>
; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp sgt i32 [[SMAX2]], 0<br>
@@ -375,7 +375,7 @@ define void @test_08(i32* %arr, i32* %a_<br>
; CHECK-LABEL: test_08(<br>
; CHECK: entry:<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0<br>
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, 13<br>
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nuw i32 %len, 13<br>
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp ult i32 [[SUB1]], 101<br>
; CHECK-NEXT: %<a href="http://exit.mainloop.at" rel="noreferrer" target="_blank">exit.mainloop.at</a> = select i1 [[CMP1]], i32 [[SUB1]], i32 101<br>
; CHECK-NEXT: br i1 true, label %loop.preloop.preheader<br>
<br>
Modified: llvm/trunk/test/Transforms/IRCE/rc-negative-bound.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/rc-negative-bound.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/rc-negative-bound.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IRCE/rc-negative-bound.ll (original)<br>
+++ llvm/trunk/test/Transforms/IRCE/rc-negative-bound.ll Thu Jun 6 01:56:26 2019<br>
@@ -115,7 +115,7 @@ define void @test_03(i32 *%arr, i32 %n,<br>
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[BOUND:%.*]], -2147483647<br>
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], 0<br>
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 0<br>
-; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[BOUND]], [[SMIN]]<br>
+; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i32 [[BOUND]], [[SMIN]]<br>
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[BOUND]], 0<br>
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP3]], i32 [[BOUND]], i32 0<br>
; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[SMAX]], -1<br>
@@ -403,7 +403,7 @@ define void @test_07(i32 *%arr, i32 %n,<br>
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[BOUND:%.*]], -2147483647<br>
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], 0<br>
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 0<br>
-; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[BOUND]], [[SMIN]]<br>
+; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i32 [[BOUND]], [[SMIN]]<br>
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[BOUND]], 0<br>
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP3]], i32 [[BOUND]], i32 0<br>
; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[SMAX]], -1<br>
<br>
Modified: llvm/trunk/test/Transforms/IRCE/single-access-no-preloop.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/single-access-no-preloop.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/single-access-no-preloop.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IRCE/single-access-no-preloop.ll (original)<br>
+++ llvm/trunk/test/Transforms/IRCE/single-access-no-preloop.ll Thu Jun 6 01:56:26 2019<br>
@@ -86,7 +86,7 @@ define void @single_access_no_preloop_wi<br>
; CHECK-LABEL: @single_access_no_preloop_with_offset(<br>
<br>
; CHECK: loop.preheader:<br>
-; CHECK: [[safe_range_end:[^ ]+]] = add i32 %len, -4<br>
+; CHECK: [[safe_range_end:[^ ]+]] = add nsw i32 %len, -4<br>
; CHECK: [[exit_main_loop_at_hiclamp_cmp:[^ ]+]] = icmp slt i32 %n, [[safe_range_end]]<br>
; CHECK: [[exit_main_loop_at_hiclamp:[^ ]+]] = select i1 [[exit_main_loop_at_hiclamp_cmp]], i32 %n, i32 [[safe_range_end]]<br>
; CHECK: [[exit_main_loop_at_loclamp_cmp:[^ ]+]] = icmp sgt i32 [[exit_main_loop_at_hiclamp]], 0<br>
<br>
Modified: llvm/trunk/test/Transforms/IRCE/single-access-with-preloop.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/single-access-with-preloop.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/single-access-with-preloop.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IRCE/single-access-with-preloop.ll (original)<br>
+++ llvm/trunk/test/Transforms/IRCE/single-access-with-preloop.ll Thu Jun 6 01:56:26 2019<br>
@@ -34,23 +34,23 @@ define void @single_access_with_preloop(<br>
; CHECK: [[check_min_sint_offset:[^ ]+]] = icmp sgt i32 %offset, -2147483647<br>
; CHECK: [[safe_offset_preloop:[^ ]+]] = select i1 [[check_min_sint_offset]], i32 %offset, i32 -2147483647<br>
; If Offset was a SINT_MIN, we could have an overflow here. That is why we calculated its safe version.<br>
-; CHECK: [[safe_start:[^ ]+]] = sub i32 0, [[safe_offset_preloop]]<br>
+; CHECK: [[safe_start:[^ ]+]] = sub nsw i32 0, [[safe_offset_preloop]]<br>
; CHECK: [[exit_preloop_at_cond_loclamp:[^ ]+]] = icmp slt i32 %n, [[safe_start]]<br>
; CHECK: [[exit_preloop_at_loclamp:[^ ]+]] = select i1 [[exit_preloop_at_cond_loclamp]], i32 %n, i32 [[safe_start]]<br>
; CHECK: [[exit_preloop_at_cond:[^ ]+]] = icmp sgt i32 [[exit_preloop_at_loclamp]], 0<br>
; CHECK: [[exit_preloop_at:[^ ]+]] = select i1 [[exit_preloop_at_cond]], i32 [[exit_preloop_at_loclamp]], i32 0<br>
<br>
<br>
-; CHECK: [[len_minus_sint_max:[^ ]+]] = add i32 %len, -2147483647<br>
+; CHECK: [[len_minus_sint_max:[^ ]+]] = add nuw nsw i32 %len, -2147483647<br>
; CHECK: [[check_len_min_sint_offset:[^ ]+]] = icmp sgt i32 %offset, [[len_minus_sint_max]]<br>
; CHECK: [[safe_offset_mainloop:[^ ]+]] = select i1 [[check_len_min_sint_offset]], i32 %offset, i32 [[len_minus_sint_max]]<br>
; If Offset was a SINT_MIN, we could have an overflow here. That is why we calculated its safe version.<br>
-; CHECK: [[safe_upper_end:[^ ]+]] = sub i32 %len, [[safe_offset_mainloop]]<br>
+; CHECK: [[safe_upper_end:[^ ]+]] = sub nsw i32 %len, [[safe_offset_mainloop]]<br>
; CHECK: [[exit_mainloop_at_cond_loclamp:[^ ]+]] = icmp slt i32 %n, [[safe_upper_end]]<br>
; CHECK: [[exit_mainloop_at_loclamp:[^ ]+]] = select i1 [[exit_mainloop_at_cond_loclamp]], i32 %n, i32 [[safe_upper_end]]<br>
; CHECK: [[check_offset_mainloop_2:[^ ]+]] = icmp sgt i32 %offset, 0<br>
; CHECK: [[safe_offset_mainloop_2:[^ ]+]] = select i1 [[check_offset_mainloop_2]], i32 %offset, i32 0<br>
-; CHECK: [[safe_lower_end:[^ ]+]] = sub i32 2147483647, [[safe_offset_mainloop_2]]<br>
+; CHECK: [[safe_lower_end:[^ ]+]] = sub nsw i32 2147483647, [[safe_offset_mainloop_2]]<br>
; CHECK: [[exit_mainloop_at_cond_hiclamp:[^ ]+]] = icmp slt i32 [[exit_mainloop_at_loclamp]], [[safe_lower_end]]<br>
; CHECK: [[exit_mainloop_at_hiclamp:[^ ]+]] = select i1 [[exit_mainloop_at_cond_hiclamp]], i32 [[exit_mainloop_at_loclamp]], i32 [[safe_lower_end]]<br>
; CHECK: [[exit_mainloop_at_cmp:[^ ]+]] = icmp sgt i32 [[exit_mainloop_at_hiclamp]], 0<br>
<br>
Modified: llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll (original)<br>
+++ llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll Thu Jun 6 01:56:26 2019<br>
@@ -254,7 +254,7 @@ define void @test_05(i32* %arr, i32* %a_<br>
; CHECK: @test_05(<br>
; CHECK: entry:<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr<br>
-; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add i32 %len, -1<br>
+; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add nsw i32 %len, -1<br>
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp sgt i32 100, %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a><br>
; CHECK-NEXT: br i1 [[COND1]], label %loop.preloop.preheader, label %preloop.pseudo.exit<br>
; CHECK: loop.preloop.preheader:<br>
@@ -320,7 +320,7 @@ define void @test_06(i32* %arr, i32* %a_<br>
; CHECK: @test_06(<br>
; CHECK: entry:<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr<br>
-; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add i32 %len, -1<br>
+; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add nsw i32 %len, -1<br>
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 2147483640, %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a><br>
; CHECK-NEXT: br i1 [[COND1]], label %loop.preloop.preheader, label %preloop.pseudo.exit<br>
; CHECK: loop.preloop.preheader:<br>
@@ -415,7 +415,7 @@ define void @test_08(i32* %arr, i32* %a_<br>
; CHECK: @test_08(<br>
; CHECK: entry:<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr<br>
-; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add i32 %len, -1<br>
+; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add nsw i32 %len, -1<br>
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 2147483647, %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a><br>
; CHECK-NEXT: br i1 [[COND1]], label %loop.preloop.preheader, label %preloop.pseudo.exit<br>
; CHECK: loop.preloop.preheader:<br>
<br>
Modified: llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll (original)<br>
+++ llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll Thu Jun 6 01:56:26 2019<br>
@@ -59,7 +59,7 @@ define void @test_02(i32* %arr, i32* %a_<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0<br>
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1<br>
; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1<br>
-; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add i32 [[UMIN]], -1<br>
+; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add nsw i32 [[UMIN]], -1<br>
; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 100, %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a><br>
; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit<br>
; CHECK: mainloop:<br>
@@ -150,7 +150,7 @@ define void @test_04(i32* %arr, i32* %a_<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0<br>
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1<br>
; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1<br>
-; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add i32 [[UMIN]], -1<br>
+; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add nsw i32 [[UMIN]], -1<br>
; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 -2147483648, %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a><br>
; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit<br>
; CHECK: mainloop:<br>
<br>
Modified: llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll (original)<br>
+++ llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll Thu Jun 6 01:56:26 2019<br>
@@ -62,7 +62,7 @@ define void @test_02(i32* %arr, i32* %a_<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0<br>
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1<br>
; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1<br>
-; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add i32 [[UMIN]], -1<br>
+; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add nsw i32 [[UMIN]], -1<br>
; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 100, %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a><br>
; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit<br>
; CHECK: mainloop:<br>
@@ -195,7 +195,7 @@ define void @test_05(i32* %arr, i32* %a_<br>
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0<br>
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1<br>
; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1<br>
-; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add i32 [[UMIN]], -1<br>
+; CHECK-NEXT: %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a> = add nsw i32 [[UMIN]], -1<br>
; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 -2147483648, %<a href="http://exit.preloop.at" rel="noreferrer" target="_blank">exit.preloop.at</a><br>
; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit<br>
; CHECK: mainloop:<br>
<br>
Modified: llvm/trunk/test/Transforms/IndVarSimplify/lftr.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/lftr.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/lftr.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IndVarSimplify/lftr.ll (original)<br>
+++ llvm/trunk/test/Transforms/IndVarSimplify/lftr.ll Thu Jun 6 01:56:26 2019<br>
@@ -202,7 +202,7 @@ define void @test_udiv_as_shift(i8* %a,<br>
; CHECK: loop.preheader:<br>
; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[N]], 3<br>
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[TMP0]], 2<br>
-; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[TMP1]], 1<br>
+; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i8 [[TMP1]], 1<br>
; CHECK-NEXT: br label [[LOOP:%.*]]<br>
; CHECK: loop:<br>
; CHECK-NEXT: [[I1:%.*]] = phi i8 [ [[I1_INC:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]<br>
<br>
Modified: llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate_1.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate_1.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate_1.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate_1.ll (original)<br>
+++ llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate_1.ll Thu Jun 6 01:56:26 2019<br>
@@ -25,7 +25,7 @@ loopexit: ; preds = %loope<br>
; CHECK-LABEL: @test2<br>
; CHECK: [[VAR1:%.+]] = add i32 %arg, -11<br>
; CHECK: [[VAR2:%.+]] = lshr i32 [[VAR1]], 1<br>
-; CHECK: [[VAR3:%.+]] = add i32 [[VAR2]], 1<br>
+; CHECK: [[VAR3:%.+]] = add nuw i32 [[VAR2]], 1<br>
; CHECK: [[VAR4:%.+]] = phi i32 [ 0, %bb ], [ [[VAR3]], %bb1.preheader ]<br>
; CHECK: ret i32 [[VAR4]]<br>
define i32 @test2(i32 %arg) {<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll Thu Jun 6 01:56:26 2019<br>
@@ -282,7 +282,7 @@ for.end:<br>
;; memcpy.atomic formation (atomic load & store) -- element size 2<br>
define void @test6(i64 %Size) nounwind ssp {<br>
; CHECK-LABEL: @test6(<br>
-; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 1<br>
+; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 1<br>
; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 2 %Dest{{[0-9]*}}, i8* align 2 %Base{{[0-9]*}}, i64 [[Sz]], i32 2)<br>
; CHECK-NOT: store<br>
; CHECK: ret void<br>
@@ -308,7 +308,7 @@ for.end:<br>
;; memcpy.atomic formation (atomic load & store) -- element size 4<br>
define void @test7(i64 %Size) nounwind ssp {<br>
; CHECK-LABEL: @test7(<br>
-; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 2<br>
+; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 2<br>
; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 4 %Dest{{[0-9]*}}, i8* align 4 %Base{{[0-9]*}}, i64 [[Sz]], i32 4)<br>
; CHECK-NOT: store<br>
; CHECK: ret void<br>
@@ -334,7 +334,7 @@ for.end:<br>
;; memcpy.atomic formation (atomic load & store) -- element size 8<br>
define void @test8(i64 %Size) nounwind ssp {<br>
; CHECK-LABEL: @test8(<br>
-; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 3<br>
+; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 3<br>
; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 8 %Dest{{[0-9]*}}, i8* align 8 %Base{{[0-9]*}}, i64 [[Sz]], i32 8)<br>
; CHECK-NOT: store<br>
; CHECK: ret void<br>
@@ -360,7 +360,7 @@ for.end:<br>
;; memcpy.atomic formation rejection (atomic load & store) -- element size 16<br>
define void @test9(i64 %Size) nounwind ssp {<br>
; CHECK-LABEL: @test9(<br>
-; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 4<br>
+; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 4<br>
; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 16 %Dest{{[0-9]*}}, i8* align 16 %Base{{[0-9]*}}, i64 [[Sz]], i32 16)<br>
; CHECK-NOT: store<br>
; CHECK: ret void<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopIdiom/basic.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIdiom/basic.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIdiom/basic.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopIdiom/basic.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopIdiom/basic.ll Thu Jun 6 01:56:26 2019<br>
@@ -46,7 +46,7 @@ for.end:<br>
ret void<br>
; CHECK-LABEL: @test1_i16(<br>
; CHECK: %[[BaseBC:.*]] = bitcast i16* %Base to i8*<br>
-; CHECK: %[[Sz:[0-9]+]] = shl i64 %Size, 1<br>
+; CHECK: %[[Sz:[0-9]+]] = shl nuw i64 %Size, 1<br>
; CHECK: call void @llvm.memset.p0i8.i64(i8* align 2 %[[BaseBC]], i8 0, i64 %[[Sz]], i1 false)<br>
; CHECK-NOT: store<br>
}<br>
@@ -92,7 +92,7 @@ for.end:<br>
ret void<br>
; CHECK-LABEL: @test2(<br>
; CHECK: br i1 %cmp10,<br>
-; CHECK: %0 = shl i64 %Size, 2<br>
+; CHECK: %0 = shl nuw i64 %Size, 2<br>
; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 %Base1, i8 1, i64 %0, i1 false)<br>
; CHECK-NOT: store<br>
}<br>
@@ -212,7 +212,7 @@ for.end:<br>
; CHECK-LABEL: @test6_dest_align(<br>
; CHECK: %[[Dst:.*]] = bitcast i32* %Dest to i8*<br>
; CHECK: %[[Src:.*]] = bitcast i32* %Base to i8*<br>
-; CHECK: %[[Sz:[0-9]+]] = shl i64 %Size, 2<br>
+; CHECK: %[[Sz:[0-9]+]] = shl nuw i64 %Size, 2<br>
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %[[Dst]], i8* align 1 %[[Src]], i64 %[[Sz]], i1 false)<br>
; CHECK-NOT: store<br>
; CHECK: ret void<br>
@@ -238,7 +238,7 @@ for.end:<br>
; CHECK-LABEL: @test6_src_align(<br>
; CHECK: %[[Dst]] = bitcast i32* %Dest to i8*<br>
; CHECK: %[[Src]] = bitcast i32* %Base to i8*<br>
-; CHECK: %[[Sz:[0-9]+]] = shl i64 %Size, 2<br>
+; CHECK: %[[Sz:[0-9]+]] = shl nuw i64 %Size, 2<br>
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %[[Dst]], i8* align 4 %[[Src]], i64 %[[Sz]], i1 false)<br>
; CHECK-NOT: store<br>
; CHECK: ret void<br>
@@ -653,7 +653,7 @@ <a href="http://loop.ph" rel="noreferrer" target="_blank">loop.ph</a>:<br>
br label %loop.body<br>
; CHECK: <a href="http://loop.ph" rel="noreferrer" target="_blank">loop.ph</a>:<br>
; CHECK-NEXT: %[[ZEXT_SIZE:.*]] = zext i32 %size to i64<br>
-; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl i64 %[[ZEXT_SIZE]], 3<br>
+; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl nuw nsw i64 %[[ZEXT_SIZE]], 3<br>
; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 %{{.*}}, i8 0, i64 %[[SCALED_SIZE]], i1 false)<br>
<br>
loop.body:<br>
@@ -685,7 +685,7 @@ <a href="http://loop.ph" rel="noreferrer" target="_blank">loop.ph</a>:<br>
br label %loop.body<br>
; CHECK: <a href="http://loop.ph" rel="noreferrer" target="_blank">loop.ph</a>:<br>
; CHECK-NEXT: %[[ZEXT_SIZE:.*]] = zext i32 %size to i64<br>
-; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl i64 %[[ZEXT_SIZE]], 3<br>
+; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl nuw nsw i64 %[[ZEXT_SIZE]], 3<br>
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %{{.*}}, i8* align 8 %{{.*}}, i64 %[[SCALED_SIZE]], i1 false)<br>
<br>
loop.body:<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll Thu Jun 6 01:56:26 2019<br>
@@ -13,7 +13,7 @@ define void @test6_dest_align(i32* noali<br>
; CHECK-NEXT: bb.nph:<br>
; CHECK-NEXT: [[DEST1:%.*]] = bitcast i32* [[DEST:%.*]] to i8*<br>
; CHECK-NEXT: [[BASE2:%.*]] = bitcast i32* [[BASE:%.*]] to i8*<br>
-; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[SIZE:%.*]], 2, !dbg !18<br>
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[SIZE:%.*]], 2, !dbg !18<br>
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[DEST1]], i8* align 1 [[BASE2]], i64 [[TMP0]], i1 false), !dbg !19<br>
; CHECK-NEXT: br label [[FOR_BODY:%.*]], !dbg !18<br>
; CHECK: for.body:<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopReroll/basic.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/basic.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/basic.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopReroll/basic.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopReroll/basic.ll Thu Jun 6 01:56:26 2019<br>
@@ -745,7 +745,7 @@ define void @pointer_bitcast_baseinst(i1<br>
; CHECK-LABEL: @pointer_bitcast_baseinst(<br>
; CHECK: bb3:<br>
; CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %bb3 ], [ 0, %bb ]<br>
-; CHECK-NEXT: %4 = shl i64 %indvar, 3<br>
+; CHECK-NEXT: %4 = shl nuw i64 %indvar, 3<br>
; CHECK-NEXT: %5 = add i64 %4, 1<br>
; CHECK-NEXT: %tmp5 = shl nuw i64 %5, 1<br>
; CHECK-NEXT: %tmp6 = getelementptr i8, i8* %arg1, i64 %tmp5<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll Thu Jun 6 01:56:26 2019<br>
@@ -104,7 +104,7 @@ while.body:<br>
;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.preheader ]<br>
;CHECK-NEXT: %S.012 = phi i32 [ %add, %while.body ], [ undef, %while.body.preheader ]<br>
;CHECK-NEXT: %4 = trunc i64 %indvar to i32<br>
-;CHECK-NEXT: %5 = mul i64 %indvar, -1<br>
+;CHECK-NEXT: %5 = mul nsw i64 %indvar, -1<br>
;CHECK-NEXT: %scevgep = getelementptr i32, i32* %buf, i64 %5<br>
;CHECK-NEXT: %6 = load i32, i32* %scevgep, align 4<br>
;CHECK-NEXT: %add = add nsw i32 %6, %S.012<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll Thu Jun 6 01:56:26 2019<br>
@@ -52,7 +52,7 @@ for.end:<br>
; CHECK: %0 = add i32 %n, -1<br>
; CHECK: %1 = sub i32 %0, %m<br>
; CHECK: %2 = lshr i32 %1, 2<br>
-; CHECK: %3 = shl i32 %2, 2<br>
+; CHECK: %3 = shl nuw i32 %2, 2<br>
; CHECK: %4 = add i32 %3, 3<br>
; CHECK: br label %for.body<br>
<br>
@@ -131,7 +131,7 @@ for.end:<br>
; CHECK: %0 = add i32 %n, -1<br>
; CHECK: %1 = sub i32 %0, %rem<br>
; CHECK: %2 = lshr i32 %1, 2<br>
-; CHECK: %3 = shl i32 %2, 2<br>
+; CHECK: %3 = shl nuw i32 %2, 2<br>
; CHECK: %4 = add i32 %3, 3<br>
; CHECK: br label %for.body<br>
<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll Thu Jun 6 01:56:26 2019<br>
@@ -52,7 +52,7 @@ while.body:<br>
;CHECK-LABEL: while.body:<br>
;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.preheader ]<br>
;CHECK-NEXT: %S.011 = phi i32 [ %add, %while.body ], [ undef, %while.body.preheader ]<br>
-;CHECK-NEXT: %4 = mul i64 %indvar, -1<br>
+;CHECK-NEXT: %4 = mul nsw i64 %indvar, -1<br>
;CHECK-NEXT: %scevgep = getelementptr i32, i32* %buf, i64 %4<br>
;CHECK-NEXT: %5 = load i32, i32* %scevgep, align 4<br>
;CHECK-NEXT: %add = add nsw i32 %5, %S.011<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll Thu Jun 6 01:56:26 2019<br>
@@ -12,8 +12,8 @@ target datalayout = "n8:16:32:64"<br>
; CHECK-LABEL: @test(<br>
; multiplies are hoisted out of the loop<br>
; CHECK: <a href="http://while.body.lr.ph" rel="noreferrer" target="_blank">while.body.lr.ph</a>:<br>
-; CHECK: shl i64<br>
-; CHECK: shl i64<br>
+; CHECK: shl nsw i64<br>
+; CHECK: shl nsw i64<br>
; GEPs are ugly<br>
; CHECK: while.body:<br>
; CHECK: phi<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll Thu Jun 6 01:56:26 2019<br>
@@ -29,7 +29,7 @@ target triple = "x86_64-apple-macosx"<br>
; CHECK-LABEL: for.end:<br>
; CHECK: %<a href="http://tobool.us" rel="noreferrer" target="_blank">tobool.us</a> = icmp eq i32 %lsr.iv.next, 0<br>
; CHECK: %<a href="http://sub.us" rel="noreferrer" target="_blank">sub.us</a> = select i1 %<a href="http://tobool.us" rel="noreferrer" target="_blank">tobool.us</a>, i32 0, i32 0<br>
-; CHECK: %0 = sub i32 0, %<a href="http://sub.us" rel="noreferrer" target="_blank">sub.us</a><br>
+; CHECK: %0 = sub nuw nsw i32 0, %<a href="http://sub.us" rel="noreferrer" target="_blank">sub.us</a><br>
; CHECK: %1 = sub i32 %0, %lsr.iv.next<br>
; CHECK: %<a href="http://sext.us" rel="noreferrer" target="_blank">sext.us</a> = mul i32 %lsr.iv.next2, %1<br>
; CHECK: %f = ashr i32 %<a href="http://sext.us" rel="noreferrer" target="_blank">sext.us</a>, 24<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll Thu Jun 6 01:56:26 2019<br>
@@ -14,7 +14,7 @@ define void @foo(i32 %size, i32 %nsteps,<br>
; CHECK-NEXT: [[CMP215:%.*]] = icmp sgt i32 [[SIZE:%.*]], 1<br>
; CHECK-NEXT: [[T0:%.*]] = zext i32 [[SIZE]] to i64<br>
; CHECK-NEXT: [[T1:%.*]] = sext i32 [[NSTEPS:%.*]] to i64<br>
-; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[T0]], -1<br>
+; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[T0]], -1<br>
; CHECK-NEXT: br label [[FOR_BODY:%.*]]<br>
; CHECK: for.body:<br>
; CHECK-NEXT: [[LSR_IV1:%.*]] = phi i64 [ [[LSR_IV_NEXT2:%.*]], [[FOR_INC:%.*]] ], [ 1, [[ENTRY:%.*]] ]<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll Thu Jun 6 01:56:26 2019<br>
@@ -8,7 +8,7 @@<br>
; CHECK: [[r2:%[a-z0-9\.]+]] = lshr exact i64 [[r1]], 1<br>
; CHECK: [[r3:%[a-z0-9\.]+]] = bitcast i64 [[r2]] to i64<br>
; CHECK: <a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a>:<br>
-; CHECK: [[r4:%[a-z0-9]+]] = shl i64 [[r3]], 1<br>
+; CHECK: [[r4:%[a-z0-9]+]] = shl nuw i64 [[r3]], 1<br>
; CHECK: br label %for.body<br>
; CHECK: for.body:<br>
; CHECK: %lsr.iv2 = phi i64 [ %lsr.iv.next, %for.body ], [ [[r4]], %<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a> ]<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopVectorize/AArch64/pr36032.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/AArch64/pr36032.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/AArch64/pr36032.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopVectorize/AArch64/pr36032.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopVectorize/AArch64/pr36032.ll Thu Jun 6 01:56:26 2019<br>
@@ -29,7 +29,7 @@ define void @_Z1dv() local_unnamed_addr<br>
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 4<br>
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]<br>
; CHECK: vector.scevcheck:<br>
-; CHECK-NEXT: [[TMP2:%.*]] = sub i64 3, [[TMP0]]<br>
+; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i64 3, [[TMP0]]<br>
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[G_0]], [[CONV]]<br>
; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP2]] to i32<br>
; CHECK-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 [[TMP4]])<br>
<br>
Modified: llvm/trunk/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll?rev=362687&r1=362686&r2=362687&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll?rev=362687&r1=362686&r2=362687&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll (original)<br>
+++ llvm/trunk/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll Thu Jun 6 01:56:26 2019<br>
@@ -27,7 +27,7 @@ define void @foo(i32* nocapture %a, i32*<br>
; CHECK: for.body3.lr.ph.us.preheader:<br>
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[M]], -1<br>
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64<br>
-; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 1<br>
+; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1<br>
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[K:%.*]] to i64<br>
; CHECK-NEXT: br label [[FOR_BODY3_LR_PH_US:%.*]]<br>
; CHECK: <a href="http://for.end.us" rel="noreferrer" target="_blank">for.end.us</a>:<br>
<br>
<br>
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