<div dir="ltr"><div dir="ltr"><div dir="ltr"><div dir="ltr">Hey Sanjay,<div><br></div><div>It looks like this revision caused a pretty substantial performance regression on lcalsALambda in the test-suite. Specifically, all the BM_PRESSURE_CALC_LAMBDA variants (171, 5001, and 44217) showed 5-7% degradation when targeting Haswell. Chandler said he might have some ideas of the issue.</div><div><br></div><div>--dlj</div></div></div></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Mar 8, 2019 at 1:53 PM Sanjay Patel via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Author: spatel<br>
Date: Fri Mar 8 13:54:41 2019<br>
New Revision: 355741<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=355741&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=355741&view=rev</a><br>
Log:<br>
[x86] scalarize extract element 0 of FP cmp<br>
<br>
An extension of D58282 noted in PR39665:<br>
<a href="https://bugs.llvm.org/show_bug.cgi?id=39665" rel="noreferrer" target="_blank">https://bugs.llvm.org/show_bug.cgi?id=39665</a><br>
<br>
This doesn't answer the request to use movmsk, but that's an<br>
independent problem. We need this and probably still need<br>
scalarization of FP selects because we can't do that as a<br>
target-independent transform (although it seems likely that<br>
targets besides x86 should have this transform).<br>
<br>
Modified:<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
llvm/trunk/test/CodeGen/X86/extractelement-fp.ll<br>
llvm/trunk/test/CodeGen/X86/vec_floor.ll<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=355741&r1=355740&r2=355741&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=355741&r1=355740&r2=355741&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Mar 8 13:54:41 2019<br>
@@ -34298,6 +34298,22 @@ static SDValue scalarizeExtEltFP(SDNode<br>
if (!Vec.hasOneUse() || !isNullConstant(Index) || VecVT.getScalarType() != VT)<br>
return SDValue();<br>
<br>
+ // Vector FP compares don't fit the pattern of FP math ops (propagate, not<br>
+ // extract, the condition code), so deal with those as a special-case.<br>
+ if (Vec.getOpcode() == ISD::SETCC) {<br>
+ EVT OpVT = Vec.getOperand(0).getValueType().getScalarType();<br>
+ if (OpVT != MVT::f32 && OpVT != MVT::f64)<br>
+ return SDValue();<br>
+<br>
+ // extract (setcc X, Y, CC), 0 --> setcc (extract X, 0), (extract Y, 0), CC<br>
+ SDLoc DL(ExtElt);<br>
+ SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT,<br>
+ Vec.getOperand(0), Index);<br>
+ SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT,<br>
+ Vec.getOperand(1), Index);<br>
+ return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1, Vec.getOperand(2));<br>
+ }<br>
+<br>
if (VT != MVT::f32 && VT != MVT::f64)<br>
return SDValue();<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/extractelement-fp.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extractelement-fp.ll?rev=355741&r1=355740&r2=355741&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extractelement-fp.ll?rev=355741&r1=355740&r2=355741&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/extractelement-fp.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/extractelement-fp.ll Fri Mar 8 13:54:41 2019<br>
@@ -132,9 +132,8 @@ define double @frem_v4f64(<4 x double> %<br>
define i1 @fcmp_v4f32(<4 x float> %x, <4 x float> %y) nounwind {<br>
; CHECK-LABEL: fcmp_v4f32:<br>
; CHECK: # %bb.0:<br>
-; CHECK-NEXT: vcmpltps %xmm0, %xmm1, %xmm0<br>
-; CHECK-NEXT: vpextrb $0, %xmm0, %eax<br>
-; CHECK-NEXT: # kill: def $al killed $al killed $eax<br>
+; CHECK-NEXT: vucomiss %xmm1, %xmm0<br>
+; CHECK-NEXT: seta %al<br>
; CHECK-NEXT: retq<br>
%v = fcmp ogt <4 x float> %x, %y<br>
%r = extractelement <4 x i1> %v, i32 0<br>
@@ -144,9 +143,8 @@ define i1 @fcmp_v4f32(<4 x float> %x, <4<br>
define i1 @fcmp_v4f64(<4 x double> %x, <4 x double> %y) nounwind {<br>
; CHECK-LABEL: fcmp_v4f64:<br>
; CHECK: # %bb.0:<br>
-; CHECK-NEXT: vcmpnlepd %ymm1, %ymm0, %ymm0<br>
-; CHECK-NEXT: vpextrb $0, %xmm0, %eax<br>
-; CHECK-NEXT: # kill: def $al killed $al killed $eax<br>
+; CHECK-NEXT: vucomisd %xmm0, %xmm1<br>
+; CHECK-NEXT: setb %al<br>
; CHECK-NEXT: vzeroupper<br>
; CHECK-NEXT: retq<br>
%v = fcmp ugt <4 x double> %x, %y<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/vec_floor.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_floor.ll?rev=355741&r1=355740&r2=355741&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_floor.ll?rev=355741&r1=355740&r2=355741&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/vec_floor.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/vec_floor.ll Fri Mar 8 13:54:41 2019<br>
@@ -1665,47 +1665,28 @@ define <2 x double> @floor_maskz_sd_trun<br>
define <4 x float> @floor_mask_ss_mask8(<4 x float> %x, <4 x float> %y, <4 x float> %w) nounwind {<br>
; SSE41-LABEL: floor_mask_ss_mask8:<br>
; SSE41: ## %bb.0:<br>
-; SSE41-NEXT: movaps %xmm0, %xmm3<br>
-; SSE41-NEXT: cmpeqps %xmm1, %xmm3<br>
-; SSE41-NEXT: pextrb $0, %xmm3, %eax<br>
-; SSE41-NEXT: testb $1, %al<br>
-; SSE41-NEXT: je LBB60_2<br>
-; SSE41-NEXT: ## %bb.1:<br>
-; SSE41-NEXT: xorps %xmm2, %xmm2<br>
-; SSE41-NEXT: roundss $9, %xmm0, %xmm2<br>
-; SSE41-NEXT: LBB60_2:<br>
-; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3]<br>
-; SSE41-NEXT: movaps %xmm1, %xmm0<br>
+; SSE41-NEXT: roundss $9, %xmm0, %xmm3<br>
+; SSE41-NEXT: cmpeqss %xmm1, %xmm0<br>
+; SSE41-NEXT: andps %xmm0, %xmm3<br>
+; SSE41-NEXT: andnps %xmm2, %xmm0<br>
+; SSE41-NEXT: orps %xmm3, %xmm0<br>
+; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]<br>
; SSE41-NEXT: retq<br>
;<br>
; AVX-LABEL: floor_mask_ss_mask8:<br>
; AVX: ## %bb.0:<br>
-; AVX-NEXT: vcmpeqps %xmm1, %xmm0, %xmm3<br>
-; AVX-NEXT: vpextrb $0, %xmm3, %eax<br>
-; AVX-NEXT: testb $1, %al<br>
-; AVX-NEXT: je LBB60_2<br>
-; AVX-NEXT: ## %bb.1:<br>
-; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm2<br>
-; AVX-NEXT: LBB60_2:<br>
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm2[0],xmm1[1,2,3]<br>
+; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm3<br>
+; AVX-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0<br>
+; AVX-NEXT: vblendvps %xmm0, %xmm3, %xmm2, %xmm0<br>
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]<br>
; AVX-NEXT: retq<br>
;<br>
-; AVX512F-LABEL: floor_mask_ss_mask8:<br>
-; AVX512F: ## %bb.0:<br>
-; AVX512F-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1<br>
-; AVX512F-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0<br>
-; AVX512F-NEXT: vcmpeqps %zmm1, %zmm0, %k1<br>
-; AVX512F-NEXT: vrndscaless $1, %xmm0, %xmm1, %xmm2 {%k1}<br>
-; AVX512F-NEXT: vmovaps %xmm2, %xmm0<br>
-; AVX512F-NEXT: vzeroupper<br>
-; AVX512F-NEXT: retq<br>
-;<br>
-; AVX512VL-LABEL: floor_mask_ss_mask8:<br>
-; AVX512VL: ## %bb.0:<br>
-; AVX512VL-NEXT: vcmpeqps %xmm1, %xmm0, %k1<br>
-; AVX512VL-NEXT: vrndscaless $1, %xmm0, %xmm1, %xmm2 {%k1}<br>
-; AVX512VL-NEXT: vmovaps %xmm2, %xmm0<br>
-; AVX512VL-NEXT: retq<br>
+; AVX512-LABEL: floor_mask_ss_mask8:<br>
+; AVX512: ## %bb.0:<br>
+; AVX512-NEXT: vcmpeqss %xmm1, %xmm0, %k1<br>
+; AVX512-NEXT: vrndscaless $1, %xmm0, %xmm1, %xmm2 {%k1}<br>
+; AVX512-NEXT: vmovaps %xmm2, %xmm0<br>
+; AVX512-NEXT: retq<br>
%mask1 = fcmp oeq <4 x float> %x, %y<br>
%mask = extractelement <4 x i1> %mask1, i64 0<br>
%s = extractelement <4 x float> %x, i64 0<br>
@@ -1719,50 +1700,25 @@ define <4 x float> @floor_mask_ss_mask8(<br>
define <4 x float> @floor_maskz_ss_mask8(<4 x float> %x, <4 x float> %y) nounwind {<br>
; SSE41-LABEL: floor_maskz_ss_mask8:<br>
; SSE41: ## %bb.0:<br>
-; SSE41-NEXT: movaps %xmm0, %xmm2<br>
-; SSE41-NEXT: cmpeqps %xmm1, %xmm2<br>
-; SSE41-NEXT: pextrb $0, %xmm2, %eax<br>
-; SSE41-NEXT: testb $1, %al<br>
-; SSE41-NEXT: jne LBB61_1<br>
-; SSE41-NEXT: ## %bb.2:<br>
-; SSE41-NEXT: xorps %xmm0, %xmm0<br>
-; SSE41-NEXT: jmp LBB61_3<br>
-; SSE41-NEXT: LBB61_1:<br>
-; SSE41-NEXT: roundss $9, %xmm0, %xmm0<br>
-; SSE41-NEXT: LBB61_3:<br>
-; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]<br>
-; SSE41-NEXT: movaps %xmm1, %xmm0<br>
+; SSE41-NEXT: roundss $9, %xmm0, %xmm2<br>
+; SSE41-NEXT: cmpeqss %xmm1, %xmm0<br>
+; SSE41-NEXT: andps %xmm2, %xmm0<br>
+; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]<br>
; SSE41-NEXT: retq<br>
;<br>
; AVX-LABEL: floor_maskz_ss_mask8:<br>
; AVX: ## %bb.0:<br>
-; AVX-NEXT: vcmpeqps %xmm1, %xmm0, %xmm2<br>
-; AVX-NEXT: vpextrb $0, %xmm2, %eax<br>
-; AVX-NEXT: testb $1, %al<br>
-; AVX-NEXT: jne LBB61_1<br>
-; AVX-NEXT: ## %bb.2:<br>
-; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0<br>
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]<br>
-; AVX-NEXT: retq<br>
-; AVX-NEXT: LBB61_1:<br>
-; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0<br>
+; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm2<br>
+; AVX-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0<br>
+; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0<br>
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]<br>
; AVX-NEXT: retq<br>
;<br>
-; AVX512F-LABEL: floor_maskz_ss_mask8:<br>
-; AVX512F: ## %bb.0:<br>
-; AVX512F-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1<br>
-; AVX512F-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0<br>
-; AVX512F-NEXT: vcmpeqps %zmm1, %zmm0, %k1<br>
-; AVX512F-NEXT: vrndscaless $1, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
-; AVX512F-NEXT: vzeroupper<br>
-; AVX512F-NEXT: retq<br>
-;<br>
-; AVX512VL-LABEL: floor_maskz_ss_mask8:<br>
-; AVX512VL: ## %bb.0:<br>
-; AVX512VL-NEXT: vcmpeqps %xmm1, %xmm0, %k1<br>
-; AVX512VL-NEXT: vrndscaless $1, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
-; AVX512VL-NEXT: retq<br>
+; AVX512-LABEL: floor_maskz_ss_mask8:<br>
+; AVX512: ## %bb.0:<br>
+; AVX512-NEXT: vcmpeqss %xmm1, %xmm0, %k1<br>
+; AVX512-NEXT: vrndscaless $1, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
+; AVX512-NEXT: retq<br>
%mask1 = fcmp oeq <4 x float> %x, %y<br>
%mask = extractelement <4 x i1> %mask1, i64 0<br>
%s = extractelement <4 x float> %x, i64 0<br>
@@ -1775,47 +1731,28 @@ define <4 x float> @floor_maskz_ss_mask8<br>
define <2 x double> @floor_mask_sd_mask8(<2 x double> %x, <2 x double> %y, <2 x double> %w) nounwind {<br>
; SSE41-LABEL: floor_mask_sd_mask8:<br>
; SSE41: ## %bb.0:<br>
-; SSE41-NEXT: movapd %xmm0, %xmm3<br>
-; SSE41-NEXT: cmpeqpd %xmm1, %xmm3<br>
-; SSE41-NEXT: pextrb $0, %xmm3, %eax<br>
-; SSE41-NEXT: testb $1, %al<br>
-; SSE41-NEXT: je LBB62_2<br>
-; SSE41-NEXT: ## %bb.1:<br>
-; SSE41-NEXT: xorps %xmm2, %xmm2<br>
-; SSE41-NEXT: roundsd $9, %xmm0, %xmm2<br>
-; SSE41-NEXT: LBB62_2:<br>
-; SSE41-NEXT: blendpd {{.*#+}} xmm1 = xmm2[0],xmm1[1]<br>
-; SSE41-NEXT: movapd %xmm1, %xmm0<br>
+; SSE41-NEXT: roundsd $9, %xmm0, %xmm3<br>
+; SSE41-NEXT: cmpeqsd %xmm1, %xmm0<br>
+; SSE41-NEXT: andpd %xmm0, %xmm3<br>
+; SSE41-NEXT: andnpd %xmm2, %xmm0<br>
+; SSE41-NEXT: orpd %xmm3, %xmm0<br>
+; SSE41-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]<br>
; SSE41-NEXT: retq<br>
;<br>
; AVX-LABEL: floor_mask_sd_mask8:<br>
; AVX: ## %bb.0:<br>
-; AVX-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm3<br>
-; AVX-NEXT: vpextrb $0, %xmm3, %eax<br>
-; AVX-NEXT: testb $1, %al<br>
-; AVX-NEXT: je LBB62_2<br>
-; AVX-NEXT: ## %bb.1:<br>
-; AVX-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm2<br>
-; AVX-NEXT: LBB62_2:<br>
-; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm2[0],xmm1[1]<br>
+; AVX-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm3<br>
+; AVX-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0<br>
+; AVX-NEXT: vblendvpd %xmm0, %xmm3, %xmm2, %xmm0<br>
+; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]<br>
; AVX-NEXT: retq<br>
;<br>
-; AVX512F-LABEL: floor_mask_sd_mask8:<br>
-; AVX512F: ## %bb.0:<br>
-; AVX512F-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1<br>
-; AVX512F-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0<br>
-; AVX512F-NEXT: vcmpeqpd %zmm1, %zmm0, %k1<br>
-; AVX512F-NEXT: vrndscalesd $1, %xmm0, %xmm1, %xmm2 {%k1}<br>
-; AVX512F-NEXT: vmovapd %xmm2, %xmm0<br>
-; AVX512F-NEXT: vzeroupper<br>
-; AVX512F-NEXT: retq<br>
-;<br>
-; AVX512VL-LABEL: floor_mask_sd_mask8:<br>
-; AVX512VL: ## %bb.0:<br>
-; AVX512VL-NEXT: vcmpeqpd %xmm1, %xmm0, %k1<br>
-; AVX512VL-NEXT: vrndscalesd $1, %xmm0, %xmm1, %xmm2 {%k1}<br>
-; AVX512VL-NEXT: vmovapd %xmm2, %xmm0<br>
-; AVX512VL-NEXT: retq<br>
+; AVX512-LABEL: floor_mask_sd_mask8:<br>
+; AVX512: ## %bb.0:<br>
+; AVX512-NEXT: vcmpeqsd %xmm1, %xmm0, %k1<br>
+; AVX512-NEXT: vrndscalesd $1, %xmm0, %xmm1, %xmm2 {%k1}<br>
+; AVX512-NEXT: vmovapd %xmm2, %xmm0<br>
+; AVX512-NEXT: retq<br>
%mask1 = fcmp oeq <2 x double> %x, %y<br>
%mask = extractelement <2 x i1> %mask1, i64 0<br>
%s = extractelement <2 x double> %x, i64 0<br>
@@ -1829,50 +1766,25 @@ define <2 x double> @floor_mask_sd_mask8<br>
define <2 x double> @floor_maskz_sd_mask8(<2 x double> %x, <2 x double> %y) nounwind {<br>
; SSE41-LABEL: floor_maskz_sd_mask8:<br>
; SSE41: ## %bb.0:<br>
-; SSE41-NEXT: movapd %xmm0, %xmm2<br>
-; SSE41-NEXT: cmpeqpd %xmm1, %xmm2<br>
-; SSE41-NEXT: pextrb $0, %xmm2, %eax<br>
-; SSE41-NEXT: testb $1, %al<br>
-; SSE41-NEXT: jne LBB63_1<br>
-; SSE41-NEXT: ## %bb.2:<br>
-; SSE41-NEXT: xorpd %xmm0, %xmm0<br>
-; SSE41-NEXT: jmp LBB63_3<br>
-; SSE41-NEXT: LBB63_1:<br>
-; SSE41-NEXT: roundsd $9, %xmm0, %xmm0<br>
-; SSE41-NEXT: LBB63_3:<br>
-; SSE41-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1]<br>
-; SSE41-NEXT: movapd %xmm1, %xmm0<br>
+; SSE41-NEXT: roundsd $9, %xmm0, %xmm2<br>
+; SSE41-NEXT: cmpeqsd %xmm1, %xmm0<br>
+; SSE41-NEXT: andpd %xmm2, %xmm0<br>
+; SSE41-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]<br>
; SSE41-NEXT: retq<br>
;<br>
; AVX-LABEL: floor_maskz_sd_mask8:<br>
; AVX: ## %bb.0:<br>
-; AVX-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm2<br>
-; AVX-NEXT: vpextrb $0, %xmm2, %eax<br>
-; AVX-NEXT: testb $1, %al<br>
-; AVX-NEXT: jne LBB63_1<br>
-; AVX-NEXT: ## %bb.2:<br>
-; AVX-NEXT: vxorpd %xmm0, %xmm0, %xmm0<br>
-; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]<br>
-; AVX-NEXT: retq<br>
-; AVX-NEXT: LBB63_1:<br>
-; AVX-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm0<br>
+; AVX-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm2<br>
+; AVX-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0<br>
+; AVX-NEXT: vandpd %xmm2, %xmm0, %xmm0<br>
; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]<br>
; AVX-NEXT: retq<br>
;<br>
-; AVX512F-LABEL: floor_maskz_sd_mask8:<br>
-; AVX512F: ## %bb.0:<br>
-; AVX512F-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1<br>
-; AVX512F-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0<br>
-; AVX512F-NEXT: vcmpeqpd %zmm1, %zmm0, %k1<br>
-; AVX512F-NEXT: vrndscalesd $1, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
-; AVX512F-NEXT: vzeroupper<br>
-; AVX512F-NEXT: retq<br>
-;<br>
-; AVX512VL-LABEL: floor_maskz_sd_mask8:<br>
-; AVX512VL: ## %bb.0:<br>
-; AVX512VL-NEXT: vcmpeqpd %xmm1, %xmm0, %k1<br>
-; AVX512VL-NEXT: vrndscalesd $1, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
-; AVX512VL-NEXT: retq<br>
+; AVX512-LABEL: floor_maskz_sd_mask8:<br>
+; AVX512: ## %bb.0:<br>
+; AVX512-NEXT: vcmpeqsd %xmm1, %xmm0, %k1<br>
+; AVX512-NEXT: vrndscalesd $1, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
+; AVX512-NEXT: retq<br>
%mask1 = fcmp oeq <2 x double> %x, %y<br>
%mask = extractelement <2 x i1> %mask1, i64 0<br>
%s = extractelement <2 x double> %x, i64 0<br>
@@ -2729,47 +2641,28 @@ define <2 x double> @ceil_maskz_sd_trunc<br>
define <4 x float> @ceil_mask_ss_mask8(<4 x float> %x, <4 x float> %y, <4 x float> %w) nounwind {<br>
; SSE41-LABEL: ceil_mask_ss_mask8:<br>
; SSE41: ## %bb.0:<br>
-; SSE41-NEXT: movaps %xmm0, %xmm3<br>
-; SSE41-NEXT: cmpeqps %xmm1, %xmm3<br>
-; SSE41-NEXT: pextrb $0, %xmm3, %eax<br>
-; SSE41-NEXT: testb $1, %al<br>
-; SSE41-NEXT: je LBB86_2<br>
-; SSE41-NEXT: ## %bb.1:<br>
-; SSE41-NEXT: xorps %xmm2, %xmm2<br>
-; SSE41-NEXT: roundss $10, %xmm0, %xmm2<br>
-; SSE41-NEXT: LBB86_2:<br>
-; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3]<br>
-; SSE41-NEXT: movaps %xmm1, %xmm0<br>
+; SSE41-NEXT: roundss $10, %xmm0, %xmm3<br>
+; SSE41-NEXT: cmpeqss %xmm1, %xmm0<br>
+; SSE41-NEXT: andps %xmm0, %xmm3<br>
+; SSE41-NEXT: andnps %xmm2, %xmm0<br>
+; SSE41-NEXT: orps %xmm3, %xmm0<br>
+; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]<br>
; SSE41-NEXT: retq<br>
;<br>
; AVX-LABEL: ceil_mask_ss_mask8:<br>
; AVX: ## %bb.0:<br>
-; AVX-NEXT: vcmpeqps %xmm1, %xmm0, %xmm3<br>
-; AVX-NEXT: vpextrb $0, %xmm3, %eax<br>
-; AVX-NEXT: testb $1, %al<br>
-; AVX-NEXT: je LBB86_2<br>
-; AVX-NEXT: ## %bb.1:<br>
-; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm2<br>
-; AVX-NEXT: LBB86_2:<br>
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm2[0],xmm1[1,2,3]<br>
+; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm3<br>
+; AVX-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0<br>
+; AVX-NEXT: vblendvps %xmm0, %xmm3, %xmm2, %xmm0<br>
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]<br>
; AVX-NEXT: retq<br>
;<br>
-; AVX512F-LABEL: ceil_mask_ss_mask8:<br>
-; AVX512F: ## %bb.0:<br>
-; AVX512F-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1<br>
-; AVX512F-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0<br>
-; AVX512F-NEXT: vcmpeqps %zmm1, %zmm0, %k1<br>
-; AVX512F-NEXT: vrndscaless $2, %xmm0, %xmm1, %xmm2 {%k1}<br>
-; AVX512F-NEXT: vmovaps %xmm2, %xmm0<br>
-; AVX512F-NEXT: vzeroupper<br>
-; AVX512F-NEXT: retq<br>
-;<br>
-; AVX512VL-LABEL: ceil_mask_ss_mask8:<br>
-; AVX512VL: ## %bb.0:<br>
-; AVX512VL-NEXT: vcmpeqps %xmm1, %xmm0, %k1<br>
-; AVX512VL-NEXT: vrndscaless $2, %xmm0, %xmm1, %xmm2 {%k1}<br>
-; AVX512VL-NEXT: vmovaps %xmm2, %xmm0<br>
-; AVX512VL-NEXT: retq<br>
+; AVX512-LABEL: ceil_mask_ss_mask8:<br>
+; AVX512: ## %bb.0:<br>
+; AVX512-NEXT: vcmpeqss %xmm1, %xmm0, %k1<br>
+; AVX512-NEXT: vrndscaless $2, %xmm0, %xmm1, %xmm2 {%k1}<br>
+; AVX512-NEXT: vmovaps %xmm2, %xmm0<br>
+; AVX512-NEXT: retq<br>
%mask1 = fcmp oeq <4 x float> %x, %y<br>
%mask = extractelement <4 x i1> %mask1, i64 0<br>
%s = extractelement <4 x float> %x, i64 0<br>
@@ -2783,50 +2676,25 @@ define <4 x float> @ceil_mask_ss_mask8(<<br>
define <4 x float> @ceil_maskz_ss_mask8(<4 x float> %x, <4 x float> %y) nounwind {<br>
; SSE41-LABEL: ceil_maskz_ss_mask8:<br>
; SSE41: ## %bb.0:<br>
-; SSE41-NEXT: movaps %xmm0, %xmm2<br>
-; SSE41-NEXT: cmpeqps %xmm1, %xmm2<br>
-; SSE41-NEXT: pextrb $0, %xmm2, %eax<br>
-; SSE41-NEXT: testb $1, %al<br>
-; SSE41-NEXT: jne LBB87_1<br>
-; SSE41-NEXT: ## %bb.2:<br>
-; SSE41-NEXT: xorps %xmm0, %xmm0<br>
-; SSE41-NEXT: jmp LBB87_3<br>
-; SSE41-NEXT: LBB87_1:<br>
-; SSE41-NEXT: roundss $10, %xmm0, %xmm0<br>
-; SSE41-NEXT: LBB87_3:<br>
-; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]<br>
-; SSE41-NEXT: movaps %xmm1, %xmm0<br>
+; SSE41-NEXT: roundss $10, %xmm0, %xmm2<br>
+; SSE41-NEXT: cmpeqss %xmm1, %xmm0<br>
+; SSE41-NEXT: andps %xmm2, %xmm0<br>
+; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]<br>
; SSE41-NEXT: retq<br>
;<br>
; AVX-LABEL: ceil_maskz_ss_mask8:<br>
; AVX: ## %bb.0:<br>
-; AVX-NEXT: vcmpeqps %xmm1, %xmm0, %xmm2<br>
-; AVX-NEXT: vpextrb $0, %xmm2, %eax<br>
-; AVX-NEXT: testb $1, %al<br>
-; AVX-NEXT: jne LBB87_1<br>
-; AVX-NEXT: ## %bb.2:<br>
-; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0<br>
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]<br>
-; AVX-NEXT: retq<br>
-; AVX-NEXT: LBB87_1:<br>
-; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm0<br>
+; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm2<br>
+; AVX-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0<br>
+; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0<br>
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]<br>
; AVX-NEXT: retq<br>
;<br>
-; AVX512F-LABEL: ceil_maskz_ss_mask8:<br>
-; AVX512F: ## %bb.0:<br>
-; AVX512F-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1<br>
-; AVX512F-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0<br>
-; AVX512F-NEXT: vcmpeqps %zmm1, %zmm0, %k1<br>
-; AVX512F-NEXT: vrndscaless $2, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
-; AVX512F-NEXT: vzeroupper<br>
-; AVX512F-NEXT: retq<br>
-;<br>
-; AVX512VL-LABEL: ceil_maskz_ss_mask8:<br>
-; AVX512VL: ## %bb.0:<br>
-; AVX512VL-NEXT: vcmpeqps %xmm1, %xmm0, %k1<br>
-; AVX512VL-NEXT: vrndscaless $2, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
-; AVX512VL-NEXT: retq<br>
+; AVX512-LABEL: ceil_maskz_ss_mask8:<br>
+; AVX512: ## %bb.0:<br>
+; AVX512-NEXT: vcmpeqss %xmm1, %xmm0, %k1<br>
+; AVX512-NEXT: vrndscaless $2, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
+; AVX512-NEXT: retq<br>
%mask1 = fcmp oeq <4 x float> %x, %y<br>
%mask = extractelement <4 x i1> %mask1, i64 0<br>
%s = extractelement <4 x float> %x, i64 0<br>
@@ -2839,47 +2707,28 @@ define <4 x float> @ceil_maskz_ss_mask8(<br>
define <2 x double> @ceil_mask_sd_mask8(<2 x double> %x, <2 x double> %y, <2 x double> %w) nounwind {<br>
; SSE41-LABEL: ceil_mask_sd_mask8:<br>
; SSE41: ## %bb.0:<br>
-; SSE41-NEXT: movapd %xmm0, %xmm3<br>
-; SSE41-NEXT: cmpeqpd %xmm1, %xmm3<br>
-; SSE41-NEXT: pextrb $0, %xmm3, %eax<br>
-; SSE41-NEXT: testb $1, %al<br>
-; SSE41-NEXT: je LBB88_2<br>
-; SSE41-NEXT: ## %bb.1:<br>
-; SSE41-NEXT: xorps %xmm2, %xmm2<br>
-; SSE41-NEXT: roundsd $10, %xmm0, %xmm2<br>
-; SSE41-NEXT: LBB88_2:<br>
-; SSE41-NEXT: blendpd {{.*#+}} xmm1 = xmm2[0],xmm1[1]<br>
-; SSE41-NEXT: movapd %xmm1, %xmm0<br>
+; SSE41-NEXT: roundsd $10, %xmm0, %xmm3<br>
+; SSE41-NEXT: cmpeqsd %xmm1, %xmm0<br>
+; SSE41-NEXT: andpd %xmm0, %xmm3<br>
+; SSE41-NEXT: andnpd %xmm2, %xmm0<br>
+; SSE41-NEXT: orpd %xmm3, %xmm0<br>
+; SSE41-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]<br>
; SSE41-NEXT: retq<br>
;<br>
; AVX-LABEL: ceil_mask_sd_mask8:<br>
; AVX: ## %bb.0:<br>
-; AVX-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm3<br>
-; AVX-NEXT: vpextrb $0, %xmm3, %eax<br>
-; AVX-NEXT: testb $1, %al<br>
-; AVX-NEXT: je LBB88_2<br>
-; AVX-NEXT: ## %bb.1:<br>
-; AVX-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm2<br>
-; AVX-NEXT: LBB88_2:<br>
-; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm2[0],xmm1[1]<br>
+; AVX-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm3<br>
+; AVX-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0<br>
+; AVX-NEXT: vblendvpd %xmm0, %xmm3, %xmm2, %xmm0<br>
+; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]<br>
; AVX-NEXT: retq<br>
;<br>
-; AVX512F-LABEL: ceil_mask_sd_mask8:<br>
-; AVX512F: ## %bb.0:<br>
-; AVX512F-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1<br>
-; AVX512F-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0<br>
-; AVX512F-NEXT: vcmpeqpd %zmm1, %zmm0, %k1<br>
-; AVX512F-NEXT: vrndscalesd $2, %xmm0, %xmm1, %xmm2 {%k1}<br>
-; AVX512F-NEXT: vmovapd %xmm2, %xmm0<br>
-; AVX512F-NEXT: vzeroupper<br>
-; AVX512F-NEXT: retq<br>
-;<br>
-; AVX512VL-LABEL: ceil_mask_sd_mask8:<br>
-; AVX512VL: ## %bb.0:<br>
-; AVX512VL-NEXT: vcmpeqpd %xmm1, %xmm0, %k1<br>
-; AVX512VL-NEXT: vrndscalesd $2, %xmm0, %xmm1, %xmm2 {%k1}<br>
-; AVX512VL-NEXT: vmovapd %xmm2, %xmm0<br>
-; AVX512VL-NEXT: retq<br>
+; AVX512-LABEL: ceil_mask_sd_mask8:<br>
+; AVX512: ## %bb.0:<br>
+; AVX512-NEXT: vcmpeqsd %xmm1, %xmm0, %k1<br>
+; AVX512-NEXT: vrndscalesd $2, %xmm0, %xmm1, %xmm2 {%k1}<br>
+; AVX512-NEXT: vmovapd %xmm2, %xmm0<br>
+; AVX512-NEXT: retq<br>
%mask1 = fcmp oeq <2 x double> %x, %y<br>
%mask = extractelement <2 x i1> %mask1, i64 0<br>
%s = extractelement <2 x double> %x, i64 0<br>
@@ -2893,50 +2742,25 @@ define <2 x double> @ceil_mask_sd_mask8(<br>
define <2 x double> @ceil_maskz_sd_mask8(<2 x double> %x, <2 x double> %y) nounwind {<br>
; SSE41-LABEL: ceil_maskz_sd_mask8:<br>
; SSE41: ## %bb.0:<br>
-; SSE41-NEXT: movapd %xmm0, %xmm2<br>
-; SSE41-NEXT: cmpeqpd %xmm1, %xmm2<br>
-; SSE41-NEXT: pextrb $0, %xmm2, %eax<br>
-; SSE41-NEXT: testb $1, %al<br>
-; SSE41-NEXT: jne LBB89_1<br>
-; SSE41-NEXT: ## %bb.2:<br>
-; SSE41-NEXT: xorpd %xmm0, %xmm0<br>
-; SSE41-NEXT: jmp LBB89_3<br>
-; SSE41-NEXT: LBB89_1:<br>
-; SSE41-NEXT: roundsd $10, %xmm0, %xmm0<br>
-; SSE41-NEXT: LBB89_3:<br>
-; SSE41-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1]<br>
-; SSE41-NEXT: movapd %xmm1, %xmm0<br>
+; SSE41-NEXT: roundsd $10, %xmm0, %xmm2<br>
+; SSE41-NEXT: cmpeqsd %xmm1, %xmm0<br>
+; SSE41-NEXT: andpd %xmm2, %xmm0<br>
+; SSE41-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]<br>
; SSE41-NEXT: retq<br>
;<br>
; AVX-LABEL: ceil_maskz_sd_mask8:<br>
; AVX: ## %bb.0:<br>
-; AVX-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm2<br>
-; AVX-NEXT: vpextrb $0, %xmm2, %eax<br>
-; AVX-NEXT: testb $1, %al<br>
-; AVX-NEXT: jne LBB89_1<br>
-; AVX-NEXT: ## %bb.2:<br>
-; AVX-NEXT: vxorpd %xmm0, %xmm0, %xmm0<br>
-; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]<br>
-; AVX-NEXT: retq<br>
-; AVX-NEXT: LBB89_1:<br>
-; AVX-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm0<br>
+; AVX-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm2<br>
+; AVX-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0<br>
+; AVX-NEXT: vandpd %xmm2, %xmm0, %xmm0<br>
; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]<br>
; AVX-NEXT: retq<br>
;<br>
-; AVX512F-LABEL: ceil_maskz_sd_mask8:<br>
-; AVX512F: ## %bb.0:<br>
-; AVX512F-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1<br>
-; AVX512F-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0<br>
-; AVX512F-NEXT: vcmpeqpd %zmm1, %zmm0, %k1<br>
-; AVX512F-NEXT: vrndscalesd $2, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
-; AVX512F-NEXT: vzeroupper<br>
-; AVX512F-NEXT: retq<br>
-;<br>
-; AVX512VL-LABEL: ceil_maskz_sd_mask8:<br>
-; AVX512VL: ## %bb.0:<br>
-; AVX512VL-NEXT: vcmpeqpd %xmm1, %xmm0, %k1<br>
-; AVX512VL-NEXT: vrndscalesd $2, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
-; AVX512VL-NEXT: retq<br>
+; AVX512-LABEL: ceil_maskz_sd_mask8:<br>
+; AVX512: ## %bb.0:<br>
+; AVX512-NEXT: vcmpeqsd %xmm1, %xmm0, %k1<br>
+; AVX512-NEXT: vrndscalesd $2, %xmm0, %xmm1, %xmm0 {%k1} {z}<br>
+; AVX512-NEXT: retq<br>
%mask1 = fcmp oeq <2 x double> %x, %y<br>
%mask = extractelement <2 x i1> %mask1, i64 0<br>
%s = extractelement <2 x double> %x, i64 0<br>
<br>
<br>
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</blockquote></div>