<html><head><meta http-equiv="Content-Type" content="text/html; charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;" class="">Hi Omer,<div class=""><br class=""></div><div class="">This test seems to break the X86 Machine Verifier.</div><div class=""><br class=""></div><div class="">($ LLVM_ENABLE_MACHINE_VERIFIER=1 ./build/bin/llvm-lit -v -a test/CodeGen/X86/branch_instruction_and_target_split_perf_nops.mir)</div><div class=""><br class=""></div><div class="">I have a few questions:</div><div class=""><br class=""></div><div class="">* Is this a test for <a href="https://reviews.llvm.org/D34393" class="">https://reviews.llvm.org/D34393</a> ?</div><div class="">* Why is this a MIR test? Why are the MIR bodies empty?</div><div class="">* Since you’re not really testing anything CodeGen specific here, I think this should be an LLVM IR test. Better, an MC test, but from reading the review it seems like you can’t see this in the assembly file.</div><div class=""><br class=""></div><div class="">Thanks,</div><div class=""><br class=""></div><div class="">— </div><div class="">Francis<br class=""><div><br class=""><blockquote type="cite" class=""><div class="">On 13 Nov 2017, at 15:02, Omer Paparo Bivas via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div class="">Author: opaparo<br class="">Date: Mon Nov 13 07:02:39 2017<br class="">New Revision: 318041<br class=""><br class="">URL: <a href="http://llvm.org/viewvc/llvm-project?rev=318041&view=rev" class="">http://llvm.org/viewvc/llvm-project?rev=318041&view=rev</a><br class="">Log:<br class="">Inserting a base test for X86 performance nops<br class=""><br class="">Change-Id: I69da08b617d7fae8024c5aee04720eb465f39b81<br class=""><br class="">Added:<br class=""> llvm/trunk/test/CodeGen/X86/branch_instruction_and_target_split_perf_nops.mir<br class=""><br class="">Added: llvm/trunk/test/CodeGen/X86/branch_instruction_and_target_split_perf_nops.mir<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/branch_instruction_and_target_split_perf_nops.mir?rev=318041&view=auto" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/branch_instruction_and_target_split_perf_nops.mir?rev=318041&view=auto</a><br class="">==============================================================================<br class="">--- llvm/trunk/test/CodeGen/X86/branch_instruction_and_target_split_perf_nops.mir (added)<br class="">+++ llvm/trunk/test/CodeGen/X86/branch_instruction_and_target_split_perf_nops.mir Mon Nov 13 07:02:39 2017<br class="">@@ -0,0 +1,288 @@<br class="">+# RUN: llc -mcpu=haswell -filetype=obj -start-before stack-protector -O2 %s -o - | llvm-objdump -d - | FileCheck %s<br class="">+<br class="">+# Test 1:<br class="">+#<br class="">+# Source C code:<br class="">+# volatile int y;<br class="">+# volatile int x;<br class="">+# <br class="">+# int switchCase(int z, int w) {<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span>int result = 0;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span>while (x > 0 && y < 0) {<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>switch(z) {<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>case 0:<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>result+=result*5;break;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>case 1:<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>result--; break;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>case 2:<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>result *= result; break;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>case 3:<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>result <<= 7; break;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>case 4:<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>result >>= 7; break;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>case 5:<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>result = result * 16 | ~result; break;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>}<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span>}<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span>return result;<br class="">+# }<br class="">+#<br class="">+# CHECK: 49: eb 4a jmp 74 <switchCase+0x95><br class="">+# CHECK: 57: eb 3c jmp 60 <switchCase+0x95><br class="">+# CHECK: 65: eb 2e jmp 46 <switchCase+0x95><br class="">+# CHECK: 73: eb 20 jmp 32 <switchCase+0x95><br class="">+# CHECK: 81: eb 12 jmp 18 <switchCase+0x95><br class="">+# CHECK: 93: 7f 8b jg -117 <switchCase+0x20><br class="">+<br class="">+# Test 2:<br class="">+#<br class="">+# Source C code:<br class="">+# <br class="">+# int ifElse(int z) {<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span>int w = 0;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span>while(1) {<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>if(x < 0)<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>w++;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>else if(y > 0)<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>w--;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>else if((x & y) == 3)<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>w*=2;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>else if ((x | y) == 18)<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>w += 2;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>else if ((y ^ x) == 154)<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>w -= 3;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>else if(((y ^ x) & 1) != 0)<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>break;<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span>}<br class="">+# <span class="Apple-tab-span" style="white-space:pre"> </span>return w;<br class="">+# }<br class="">+#<br class="">+# CHECK: 129: eb 13 jmp 19 <ifElse+0x7E><br class="">+# CHECK: 12e: eb a0 jmp -96 <ifElse+0x10><br class="">+# CHECK: 132: eb 9c jmp -100 <ifElse+0x10><br class="">+# CHECK: 137: eb 97 jmp -105 <ifElse+0x10><br class="">+# CHECK: 13c: eb 92 jmp -110 <ifElse+0x10><br class="">+--- |<br class="">+ ; ModuleID = 'D:\iusers\opaparo\dev_test\branch_instruction_and_target_split_perf_nops.ll'<br class="">+ source_filename = "D:\5C\5Ciusers\5C\5Copaparo\5C\5Cdev_test\5C\5Cbranch_instruction_and_target_split_perf_nops.c"<br class="">+ target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"<br class="">+ target triple = "x86_64-pc-windows-msvc19.0.24210"<br class="">+ <br class="">+ @x = common global i32 0, align 4<br class="">+ @y = common global i32 0, align 4<br class="">+ <br class="">+ ; Function Attrs: norecurse nounwind uwtable<br class="">+ define i32 @switchCase(i32 %z, i32 %w) local_unnamed_addr #0 {<br class="">+ entry:<br class="">+ %0 = load volatile i32, i32* @x, align 4, !tbaa !3<br class="">+ %cmp19 = icmp sgt i32 %0, 0<br class="">+ br i1 %cmp19, label %land.rhs.preheader, label %while.end<br class="">+ <br class="">+ land.rhs.preheader: ; preds = %entry<br class="">+ br label %land.rhs<br class="">+ <br class="">+ land.rhs: ; preds = %sw.epilog, %land.rhs.preheader<br class="">+ %result.020 = phi i32 [ %result.1, %sw.epilog ], [ 0, %land.rhs.preheader ]<br class="">+ %1 = load volatile i32, i32* @y, align 4, !tbaa !3<br class="">+ %cmp1 = icmp slt i32 %1, 0<br class="">+ br i1 %cmp1, label %while.body, label %while.end<br class="">+ <br class="">+ while.body: ; preds = %land.rhs<br class="">+ switch i32 %z, label %sw.epilog [<br class="">+ i32 0, label %sw.bb<br class="">+ i32 1, label %sw.bb2<br class="">+ i32 2, label %sw.bb3<br class="">+ i32 3, label %sw.bb5<br class="">+ i32 4, label %sw.bb6<br class="">+ i32 5, label %sw.bb7<br class="">+ ]<br class="">+ <br class="">+ sw.bb: ; preds = %while.body<br class="">+ %add = mul nsw i32 %result.020, 6<br class="">+ br label %sw.epilog<br class="">+ <br class="">+ sw.bb2: ; preds = %while.body<br class="">+ %dec = add nsw i32 %result.020, -1<br class="">+ br label %sw.epilog<br class="">+ <br class="">+ sw.bb3: ; preds = %while.body<br class="">+ %mul4 = mul nsw i32 %result.020, %result.020<br class="">+ br label %sw.epilog<br class="">+ <br class="">+ sw.bb5: ; preds = %while.body<br class="">+ %shl = shl i32 %result.020, 7<br class="">+ br label %sw.epilog<br class="">+ <br class="">+ sw.bb6: ; preds = %while.body<br class="">+ %shr = ashr i32 %result.020, 7<br class="">+ br label %sw.epilog<br class="">+ <br class="">+ sw.bb7: ; preds = %while.body<br class="">+ %mul8 = shl nsw i32 %result.020, 4<br class="">+ %neg = xor i32 %result.020, -1<br class="">+ %or = or i32 %mul8, %neg<br class="">+ br label %sw.epilog<br class="">+ <br class="">+ sw.epilog: ; preds = %sw.bb7, %sw.bb6, %sw.bb5, %sw.bb3, %sw.bb2, %sw.bb, %while.body<br class="">+ %result.1 = phi i32 [ %result.020, %while.body ], [ %or, %sw.bb7 ], [ %shr, %sw.bb6 ], [ %shl, %sw.bb5 ], [ %mul4, %sw.bb3 ], [ %dec, %sw.bb2 ], [ %add, %sw.bb ]<br class="">+ %2 = load volatile i32, i32* @x, align 4, !tbaa !3<br class="">+ %cmp = icmp sgt i32 %2, 0<br class="">+ br i1 %cmp, label %land.rhs, label %while.end<br class="">+ <br class="">+ while.end: ; preds = %sw.epilog, %land.rhs, %entry<br class="">+ %result.0.lcssa = phi i32 [ 0, %entry ], [ %result.020, %land.rhs ], [ %result.1, %sw.epilog ]<br class="">+ ret i32 %result.0.lcssa<br class="">+ }<br class="">+ <br class="">+ ; Function Attrs: norecurse nounwind uwtable<br class="">+ define i32 @ifElse(i32 %z) local_unnamed_addr #0 {<br class="">+ entry:<br class="">+ br label %while.cond.outer<br class="">+ <br class="">+ while.cond.outer: ; preds = %if.then, %if.then2, %if.then5, %if.then8, %if.then11, %entry<br class="">+ %<a href="http://w.0.ph" class="">w.0.ph</a> = phi i32 [ 0, %entry ], [ %sub, %if.then11 ], [ %add, %if.then8 ], [ %mul, %if.then5 ], [ %dec, %if.then2 ], [ %inc, %if.then ]<br class="">+ br label %while.cond<br class="">+ <br class="">+ while.cond: ; preds = %if.else12, %while.cond.outer<br class="">+ %0 = load volatile i32, i32* @x, align 4, !tbaa !3<br class="">+ %cmp = icmp slt i32 %0, 0<br class="">+ br i1 %cmp, label %if.then, label %if.else<br class="">+ <br class="">+ if.then: ; preds = %while.cond<br class="">+ %inc = add nsw i32 %<a href="http://w.0.ph" class="">w.0.ph</a>, 1<br class="">+ br label %while.cond.outer<br class="">+ <br class="">+ if.else: ; preds = %while.cond<br class="">+ %1 = load volatile i32, i32* @y, align 4, !tbaa !3<br class="">+ %cmp1 = icmp sgt i32 %1, 0<br class="">+ br i1 %cmp1, label %if.then2, label %if.else3<br class="">+ <br class="">+ if.then2: ; preds = %if.else<br class="">+ %dec = add nsw i32 %<a href="http://w.0.ph" class="">w.0.ph</a>, -1<br class="">+ br label %while.cond.outer<br class="">+ <br class="">+ if.else3: ; preds = %if.else<br class="">+ %2 = load volatile i32, i32* @x, align 4, !tbaa !3<br class="">+ %3 = load volatile i32, i32* @y, align 4, !tbaa !3<br class="">+ %and = and i32 %3, %2<br class="">+ %cmp4 = icmp eq i32 %and, 3<br class="">+ br i1 %cmp4, label %if.then5, label %if.else6<br class="">+ <br class="">+ if.then5: ; preds = %if.else3<br class="">+ %mul = shl nsw i32 %<a href="http://w.0.ph" class="">w.0.ph</a>, 1<br class="">+ br label %while.cond.outer<br class="">+ <br class="">+ if.else6: ; preds = %if.else3<br class="">+ %4 = load volatile i32, i32* @x, align 4, !tbaa !3<br class="">+ %5 = load volatile i32, i32* @y, align 4, !tbaa !3<br class="">+ %or = or i32 %5, %4<br class="">+ %cmp7 = icmp eq i32 %or, 18<br class="">+ br i1 %cmp7, label %if.then8, label %if.else9<br class="">+ <br class="">+ if.then8: ; preds = %if.else6<br class="">+ %add = add nsw i32 %<a href="http://w.0.ph" class="">w.0.ph</a>, 2<br class="">+ br label %while.cond.outer<br class="">+ <br class="">+ if.else9: ; preds = %if.else6<br class="">+ %6 = load volatile i32, i32* @y, align 4, !tbaa !3<br class="">+ %7 = load volatile i32, i32* @x, align 4, !tbaa !3<br class="">+ %xor = xor i32 %7, %6<br class="">+ %cmp10 = icmp eq i32 %xor, 154<br class="">+ br i1 %cmp10, label %if.then11, label %if.else12<br class="">+ <br class="">+ if.then11: ; preds = %if.else9<br class="">+ %sub = add nsw i32 %<a href="http://w.0.ph" class="">w.0.ph</a>, -3<br class="">+ br label %while.cond.outer<br class="">+ <br class="">+ if.else12: ; preds = %if.else9<br class="">+ %8 = load volatile i32, i32* @y, align 4, !tbaa !3<br class="">+ %9 = load volatile i32, i32* @x, align 4, !tbaa !3<br class="">+ %xor13 = xor i32 %9, %8<br class="">+ %and14 = and i32 %xor13, 1<br class="">+ %cmp15 = icmp eq i32 %and14, 0<br class="">+ br i1 %cmp15, label %while.cond, label %while.end<br class="">+ <br class="">+ while.end: ; preds = %if.else12<br class="">+ ret i32 %<a href="http://w.0.ph" class="">w.0.ph</a><br class="">+ }<br class="">+ <br class="">+ attributes #0 = { norecurse nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="haswell" "target-features"="+aes,+avx,+avx2,+bmi,+bmi2,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" "unsafe-fp-math"="false" "use-soft-float"="false" }<br class="">+ <br class="">+ !llvm.module.flags = !{!0, !1}<br class="">+ !llvm.ident = !{!2}<br class="">+ <br class="">+ !0 = !{i32 1, !"wchar_size", i32 2}<br class="">+ !1 = !{i32 7, !"PIC Level", i32 2}<br class="">+ !2 = !{!"clang version 6.0.0 (<a href="ssh://git-amr-1.devtools.intel.com:29418/dpd_icl-llvm_clang_worldread" class="">ssh://git-amr-1.devtools.intel.com:29418/dpd_icl-llvm_clang_worldread</a> 3789ad4283ec09df1ed8411abbb227d76e7ef8cb) (<a href="ssh://git-amr-1.devtools.intel.com:29418/dpd_icl-llvm_llvm_worldread" class="">ssh://git-amr-1.devtools.intel.com:29418/dpd_icl-llvm_llvm_worldread</a> 42897913cc9fac0d94e8636d9aed4dc193d7864e)"}<br class="">+ !3 = !{!4, !4, i64 0}<br class="">+ !4 = !{!"int", !5, i64 0}<br class="">+ !5 = !{!"omnipotent char", !6, i64 0}<br class="">+ !6 = !{!"Simple C/C++ TBAA"}<br class="">+<br class="">+...<br class="">+---<br class="">+name: switchCase<br class="">+alignment: 4<br class="">+exposesReturnsTwice: false<br class="">+legalized: false<br class="">+regBankSelected: false<br class="">+selected: false<br class="">+tracksRegLiveness: true<br class="">+registers: <br class="">+liveins: <br class="">+frameInfo: <br class="">+ isFrameAddressTaken: false<br class="">+ isReturnAddressTaken: false<br class="">+ hasStackMap: false<br class="">+ hasPatchPoint: false<br class="">+ stackSize: 0<br class="">+ offsetAdjustment: 0<br class="">+ maxAlignment: 0<br class="">+ adjustsStack: false<br class="">+ hasCalls: false<br class="">+ stackProtector: ''<br class="">+ maxCallFrameSize: 4294967295<br class="">+ hasOpaqueSPAdjustment: false<br class="">+ hasVAStart: false<br class="">+ hasMustTailInVarArgFunc: false<br class="">+ savePoint: ''<br class="">+ restorePoint: ''<br class="">+fixedStack: <br class="">+stack: <br class="">+constants: <br class="">+body: |<br class="">+<br class="">+...<br class="">+---<br class="">+name: ifElse<br class="">+alignment: 4<br class="">+exposesReturnsTwice: false<br class="">+legalized: false<br class="">+regBankSelected: false<br class="">+selected: false<br class="">+tracksRegLiveness: true<br class="">+registers: <br class="">+liveins: <br class="">+frameInfo: <br class="">+ isFrameAddressTaken: false<br class="">+ isReturnAddressTaken: false<br class="">+ hasStackMap: false<br class="">+ hasPatchPoint: false<br class="">+ stackSize: 0<br class="">+ offsetAdjustment: 0<br class="">+ maxAlignment: 0<br class="">+ adjustsStack: false<br class="">+ hasCalls: false<br class="">+ stackProtector: ''<br class="">+ maxCallFrameSize: 4294967295<br class="">+ hasOpaqueSPAdjustment: false<br class="">+ hasVAStart: false<br class="">+ hasMustTailInVarArgFunc: false<br class="">+ savePoint: ''<br class="">+ restorePoint: ''<br class="">+fixedStack: <br class="">+stack: <br class="">+constants: <br class="">+body: |<br class="">+<br class="">+...<br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a><br class="">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits<br class=""></div></div></blockquote></div><br class=""></div></body></html>