<div dir="ltr"><br><br><div class="gmail_quote"><div dir="ltr">On Wed, Oct 10, 2018 at 8:51 PM Renato Golin via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: rengolin<br>
Date: Wed Oct 10 11:49:49 2018<br>
New Revision: 344172<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=344172&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=344172&view=rev</a><br>
Log:<br>
[LV] Add a new reduction pattern match<br>
<br>
Adding a new reduction pattern match for vectorizing code similar to TSVC s3111:<br>
<br>
for (int i = 0; i < N; i++)<br>
if (a[i] > b)<br>
sum += a[i];<br>
<br>
This patch adds support for fadd, fsub and fmull, as well as multiple<br>
branches and different (but compatible) instructions (ex. add+sub) in<br>
different branches.<br>
<br>
I have forwarded to trunk, added fsub and fmul functionality and<br>
additional tests, but the credit goes to Takahiro, who did most of the<br>
actual work.<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D49168" rel="noreferrer" target="_blank">https://reviews.llvm.org/D49168</a><br>
<br>
Patch by Takahiro Miyoshi <<a href="mailto:takahiro.miyoshi@linaro.org" target="_blank">takahiro.miyoshi@linaro.org</a>>.<br>
<br>
<br>
Added:<br>
llvm/trunk/test/Transforms/LoopVectorize/if-reduction.ll<br>
Modified:<br>
llvm/trunk/include/llvm/Analysis/IVDescriptors.h<br>
llvm/trunk/lib/Analysis/IVDescriptors.cpp<br>
<br>
Modified: llvm/trunk/include/llvm/Analysis/IVDescriptors.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/IVDescriptors.h?rev=344172&r1=344171&r2=344172&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/IVDescriptors.h?rev=344172&r1=344171&r2=344172&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/Analysis/IVDescriptors.h (original)<br>
+++ llvm/trunk/include/llvm/Analysis/IVDescriptors.h Wed Oct 10 11:49:49 2018<br>
@@ -140,7 +140,8 @@ public:<br>
<br>
/// Returns true if instruction I has multiple uses in Insts<br>
static bool hasMultipleUsesOf(Instruction *I,<br>
- SmallPtrSetImpl<Instruction *> &Insts);<br>
+ SmallPtrSetImpl<Instruction *> &Insts,<br>
+ unsigned MaxNumUses);<br>
<br>
/// Returns true if all uses of the instruction I is within the Set.<br>
static bool areAllUsesIn(Instruction *I, SmallPtrSetImpl<Instruction *> &Set);<br>
@@ -150,6 +151,10 @@ public:<br>
/// or max(X, Y).<br>
static InstDesc isMinMaxSelectCmpPattern(Instruction *I, InstDesc &Prev);<br>
<br>
+ /// Returns a struct describing if the instruction is a<br>
+ /// Select(FCmp(X, Y), (Z = X op PHINode), PHINode) instruction pattern.<br>
+ static InstDesc isConditionalRdxPattern(RecurrenceKind Kind, Instruction *I);<br>
+<br>
/// Returns identity corresponding to the RecurrenceKind.<br>
static Constant *getRecurrenceIdentity(RecurrenceKind K, Type *Tp);<br>
<br>
<br>
Modified: llvm/trunk/lib/Analysis/IVDescriptors.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IVDescriptors.cpp?rev=344172&r1=344171&r2=344172&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IVDescriptors.cpp?rev=344172&r1=344171&r2=344172&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Analysis/IVDescriptors.cpp (original)<br>
+++ llvm/trunk/lib/Analysis/IVDescriptors.cpp Wed Oct 10 11:49:49 2018<br>
@@ -299,9 +299,17 @@ bool RecurrenceDescriptor::AddReductionV<br>
return false;<br>
}<br>
<br>
+ bool IsASelect = isa<SelectInst>(Cur);<br>
+<br>
+ // A conditional reduction operation must only have 2 or less uses in<br>
+ // VisitedInsts.<br>
+ if (IsASelect && (Kind == RK_FloatAdd || Kind == RK_FloatMult) &&<br>
+ hasMultipleUsesOf(Cur, VisitedInsts, 2))<br>
+ return false;<br>
+<br>
// A reduction operation must only have one use of the reduction value.<br>
- if (!IsAPhi && Kind != RK_IntegerMinMax && Kind != RK_FloatMinMax &&<br>
- hasMultipleUsesOf(Cur, VisitedInsts))<br>
+ if (!IsAPhi && !IsASelect && Kind != RK_IntegerMinMax &&<br>
+ Kind != RK_FloatMinMax && hasMultipleUsesOf(Cur, VisitedInsts, 1))<br>
return false;<br>
<br>
// All inputs to a PHI node must be a reduction value.<br>
@@ -362,7 +370,8 @@ bool RecurrenceDescriptor::AddReductionV<br>
} else if (!isa<PHINode>(UI) &&<br>
((!isa<FCmpInst>(UI) && !isa<ICmpInst>(UI) &&<br>
!isa<SelectInst>(UI)) ||<br>
- !isMinMaxSelectCmpPattern(UI, IgnoredVal).isRecurrence()))<br>
+ (!isConditionalRdxPattern(Kind, UI).isRecurrence() &&<br>
+ !isMinMaxSelectCmpPattern(UI, IgnoredVal).isRecurrence())))<br>
return false;<br>
<br>
// Remember that we completed the cycle.<br>
@@ -491,6 +500,52 @@ RecurrenceDescriptor::isMinMaxSelectCmpP<br>
return InstDesc(false, I);<br>
}<br>
<br>
+/// Returns true if the select instruction has users in the compare-and-add<br>
+/// reduction pattern below. The select instruction argument is the last one<br>
+/// in the sequence.<br>
+///<br>
+/// %sum.1 = phi ...<br>
+/// ...<br>
+/// %cmp = fcmp pred %0, %CFP<br>
+/// %add = fadd %0, %sum.1<br>
+/// %sum.2 = select %cmp, %add, %sum.1<br>
+RecurrenceDescriptor::InstDesc<br>
+RecurrenceDescriptor::isConditionalRdxPattern(<br>
+ RecurrenceKind Kind, Instruction *I) {<br>
+ SelectInst *SI = dyn_cast<SelectInst>(I);<br>
+ if (!SI)<br>
+ return InstDesc(false, I);<br>
+<br>
+ CmpInst *CI = dyn_cast<CmpInst>(SI->getCondition());<br>
+ // Only handle single use cases for now.<br>
+ if (!CI || !CI->hasOneUse())<br>
+ return InstDesc(false, I);<br>
+<br>
+ Value *TrueVal = SI->getTrueValue();<br>
+ Value *FalseVal = SI->getFalseValue();<br>
+ // Handle only when either of operands of select instruction is a PHI<br>
+ // node for now.<br>
+ if ((isa<PHINode>(*TrueVal) && isa<PHINode>(*FalseVal)) ||<br>
+ (!isa<PHINode>(*TrueVal) && !isa<PHINode>(*FalseVal)))<br>
+ return InstDesc(false, I);<br>
+<br>
+ Instruction *I1 =<br>
+ isa<PHINode>(*TrueVal) ? dyn_cast<Instruction>(FalseVal)<br>
+ : dyn_cast<Instruction>(TrueVal);<br>
+ if (!I1 || !I1->isBinaryOp())<br>
+ return InstDesc(false, I);<br>
+<br>
+ Value *Op1, *Op2;<br>
+ if (m_FAdd(m_Value(Op1), m_Value(Op2)).match(I1) ||<br>
+ m_FSub(m_Value(Op1), m_Value(Op2)).match(I1))<br>
+ return InstDesc(Kind == RK_FloatAdd, SI);<br></blockquote><div><br></div><div>Are these patterns safe without checking for associative math? Seeing some numerical weirdness after this change, but haven't looked closely.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+<br>
+ if (m_FMul(m_Value(Op1), m_Value(Op2)).match(I1))<br>
+ return InstDesc(Kind == RK_FloatMult, SI);<br>
+<br>
+ return InstDesc(false, I);<br>
+}<br>
+<br>
RecurrenceDescriptor::InstDesc<br>
RecurrenceDescriptor::isRecurrenceInstr(Instruction *I, RecurrenceKind Kind,<br>
InstDesc &Prev, bool HasFunNoNaNAttr) {<br>
@@ -520,9 +575,12 @@ RecurrenceDescriptor::isRecurrenceInstr(<br>
case Instruction::FSub:<br>
case Instruction::FAdd:<br>
return InstDesc(Kind == RK_FloatAdd, I, UAI);<br>
+ case Instruction::Select:<br>
+ if (Kind == RK_FloatAdd || Kind == RK_FloatMult)<br>
+ return isConditionalRdxPattern(Kind, I);<br>
+ LLVM_FALLTHROUGH;<br>
case Instruction::FCmp:<br>
case Instruction::ICmp:<br>
- case Instruction::Select:<br>
if (Kind != RK_IntegerMinMax &&<br>
(!HasFunNoNaNAttr || Kind != RK_FloatMinMax))<br>
return InstDesc(false, I);<br>
@@ -531,13 +589,14 @@ RecurrenceDescriptor::isRecurrenceInstr(<br>
}<br>
<br>
bool RecurrenceDescriptor::hasMultipleUsesOf(<br>
- Instruction *I, SmallPtrSetImpl<Instruction *> &Insts) {<br>
+ Instruction *I, SmallPtrSetImpl<Instruction *> &Insts,<br>
+ unsigned MaxNumUses) {<br>
unsigned NumUses = 0;<br>
for (User::op_iterator Use = I->op_begin(), E = I->op_end(); Use != E;<br>
++Use) {<br>
if (Insts.count(dyn_cast<Instruction>(*Use)))<br>
++NumUses;<br>
- if (NumUses > 1)<br>
+ if (NumUses > MaxNumUses)<br>
return true;<br>
}<br>
<br>
<br>
Added: llvm/trunk/test/Transforms/LoopVectorize/if-reduction.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/if-reduction.ll?rev=344172&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/if-reduction.ll?rev=344172&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/LoopVectorize/if-reduction.ll (added)<br>
+++ llvm/trunk/test/Transforms/LoopVectorize/if-reduction.ll Wed Oct 10 11:49:49 2018<br>
@@ -0,0 +1,666 @@<br>
+; RUN: opt -S -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 < %s | FileCheck %s<br>
+<br>
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"<br>
+<br>
+; Float pattern:<br>
+; Check vectorization of reduction code which has an fadd instruction after<br>
+; an fcmp instruction which compares an array element and 0.<br>
+;<br>
+; float fcmp_0_fadd_select1(float * restrict x, const int N) {<br>
+; float sum = 0.<br>
+; for (int i = 0; i < N; ++i)<br>
+; if (x[i] > (float)0.)<br>
+; sum += x[i];<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_0_fadd_select1(<br>
+; CHECK: %[[V1:.*]] = fcmp fast ogt <4 x float> %[[V0:.*]], zeroinitializer<br>
+; CHECK: %[[V3:.*]] = fadd fast <4 x float> %[[V0]], %[[V2:.*]]<br>
+; CHECK: select <4 x i1> %[[V1]], <4 x float> %[[V3]], <4 x float> %[[V2]]<br>
+define float @fcmp_0_fadd_select1(float* noalias %x, i32 %N) nounwind readonly {<br>
+entry:<br>
+ %cmp.1 = icmp sgt i32 %N, 0<br>
+ br i1 %cmp.1, label %for.header, label %for.end<br>
+<br>
+for.header: ; preds = %entry<br>
+ %zext = zext i32 %N to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %header, %for.body<br>
+ %indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]<br>
+ %sum.1 = phi float [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]<br>
+ %arrayidx = getelementptr inbounds float, float* %x, i64 %indvars.iv<br>
+ %0 = load float, float* %arrayidx, align 4<br>
+ %cmp.2 = fcmp fast ogt float %0, 0.000000e+00<br>
+ %add = fadd fast float %0, %sum.1<br>
+ %sum.2 = select i1 %cmp.2, float %add, float %sum.1<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %zext<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.body, %entry<br>
+ %1 = phi float [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]<br>
+ ret float %1<br>
+}<br>
+<br>
+; Double pattern:<br>
+; Check vectorization of reduction code which has an fadd instruction after<br>
+; an fcmp instruction which compares an array element and 0.<br>
+;<br>
+; double fcmp_0_fadd_select2(double * restrict x, const int N) {<br>
+; double sum = 0.<br>
+; for (int i = 0; i < N; ++i)<br>
+; if (x[i] > 0.)<br>
+; sum += x[i];<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_0_fadd_select2(<br>
+; CHECK: %[[V1:.*]] = fcmp fast ogt <4 x double> %[[V0:.*]], zeroinitializer<br>
+; CHECK: %[[V3:.*]] = fadd fast <4 x double> %[[V0]], %[[V2:.*]]<br>
+; CHECK: select <4 x i1> %[[V1]], <4 x double> %[[V3]], <4 x double> %[[V2]]<br>
+define double @fcmp_0_fadd_select2(double* noalias %x, i32 %N) nounwind readonly {<br>
+entry:<br>
+ %cmp.1 = icmp sgt i32 %N, 0<br>
+ br i1 %cmp.1, label %for.header, label %for.end<br>
+<br>
+for.header: ; preds = %entry<br>
+ %zext = zext i32 %N to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %header, %for.body<br>
+ %indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]<br>
+ %sum.1 = phi double [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]<br>
+ %arrayidx = getelementptr inbounds double, double* %x, i64 %indvars.iv<br>
+ %0 = load double, double* %arrayidx, align 4<br>
+ %cmp.2 = fcmp fast ogt double %0, 0.000000e+00<br>
+ %add = fadd fast double %0, %sum.1<br>
+ %sum.2 = select i1 %cmp.2, double %add, double %sum.1<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %zext<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.body, %entry<br>
+ %1 = phi double [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]<br>
+ ret double %1<br>
+}<br>
+<br>
+; Float pattern:<br>
+; Check vectorization of reduction code which has an fadd instruction after<br>
+; an fcmp instruction which compares an array element and a floating-point<br>
+; value.<br>
+;<br>
+; float fcmp_val_fadd_select1(float * restrict x, float y, const int N) {<br>
+; float sum = 0.<br>
+; for (int i = 0; i < N; ++i)<br>
+; if (x[i] > y)<br>
+; sum += x[i];<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_val_fadd_select1(<br>
+; CHECK: %[[V1:.*]] = fcmp fast ogt <4 x float> %[[V0:.*]], %broadcast.splat2<br>
+; CHECK: %[[V3:.*]] = fadd fast <4 x float> %[[V0]], %[[V2:.*]]<br>
+; CHECK: select <4 x i1> %[[V1]], <4 x float> %[[V3]], <4 x float> %[[V2]]<br>
+define float @fcmp_val_fadd_select1(float* noalias %x, float %y, i32 %N) nounwind readonly {<br>
+entry:<br>
+ %cmp.1 = icmp sgt i32 %N, 0<br>
+ br i1 %cmp.1, label %for.header, label %for.end<br>
+<br>
+for.header: ; preds = %entry<br>
+ %zext = zext i32 %N to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %header, %for.body<br>
+ %indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]<br>
+ %sum.1 = phi float [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]<br>
+ %arrayidx = getelementptr inbounds float, float* %x, i64 %indvars.iv<br>
+ %0 = load float, float* %arrayidx, align 4<br>
+ %cmp.2 = fcmp fast ogt float %0, %y<br>
+ %add = fadd fast float %0, %sum.1<br>
+ %sum.2 = select i1 %cmp.2, float %add, float %sum.1<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %zext<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.body, %entry<br>
+ %1 = phi float [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]<br>
+ ret float %1<br>
+}<br>
+<br>
+; Double pattern:<br>
+; Check vectorization of reduction code which has an fadd instruction after<br>
+; an fcmp instruction which compares an array element and a floating-point<br>
+; value.<br>
+;<br>
+; double fcmp_val_fadd_select2(double * restrict x, double y, const int N) {<br>
+; double sum = 0.<br>
+; for (int i = 0; i < N; ++i)<br>
+; if (x[i] > y)<br>
+; sum += x[i];<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_val_fadd_select2(<br>
+; CHECK: %[[V1:.*]] = fcmp fast ogt <4 x double> %[[V0:.*]], %broadcast.splat2<br>
+; CHECK: %[[V3:.*]] = fadd fast <4 x double> %[[V0]], %[[V2:.*]]<br>
+; CHECK: select <4 x i1> %[[V1]], <4 x double> %[[V3]], <4 x double> %[[V2]]<br>
+define double @fcmp_val_fadd_select2(double* noalias %x, double %y, i32 %N) nounwind readonly {<br>
+entry:<br>
+ %cmp.1 = icmp sgt i32 %N, 0<br>
+ br i1 %cmp.1, label %for.header, label %for.end<br>
+<br>
+for.header: ; preds = %entry<br>
+ %zext = zext i32 %N to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %header, %for.body<br>
+ %indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]<br>
+ %sum.1 = phi double [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]<br>
+ %arrayidx = getelementptr inbounds double, double* %x, i64 %indvars.iv<br>
+ %0 = load double, double* %arrayidx, align 4<br>
+ %cmp.2 = fcmp fast ogt double %0, %y<br>
+ %add = fadd fast double %0, %sum.1<br>
+ %sum.2 = select i1 %cmp.2, double %add, double %sum.1<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %zext<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.body, %entry<br>
+ %1 = phi double [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]<br>
+ ret double %1<br>
+}<br>
+<br>
+; Float pattern:<br>
+; Check vectorization of reduction code which has an fadd instruction after<br>
+; an fcmp instruction which compares an array element and another array<br>
+; element.<br>
+;<br>
+; float fcmp_array_elm_fadd_select1(float * restrict x, float * restrict y,<br>
+; const int N) {<br>
+; float sum = 0.<br>
+; for (int i = 0; i < N; ++i)<br>
+; if (x[i] > y[i])<br>
+; sum += x[i];<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_array_elm_fadd_select1(<br>
+; CHECK: %[[V2:.*]] = fcmp fast ogt <4 x float> %[[V0:.*]], %[[V1:.*]]<br>
+; CHECK: %[[V4:.*]] = fadd fast <4 x float> %[[V0]], %[[V3:.*]]<br>
+; CHECK: select <4 x i1> %[[V2]], <4 x float> %[[V4]], <4 x float> %[[V3]]<br>
+define float @fcmp_array_elm_fadd_select1(float* noalias %x, float* noalias %y, i32 %N) nounwind readonly {<br>
+entry:<br>
+ %cmp.1 = icmp sgt i32 %N, 0<br>
+ br i1 %cmp.1, label %for.header, label %for.end<br>
+<br>
+for.header: ; preds = %entry<br>
+ %zext = zext i32 %N to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %for.body, %for.header<br>
+ %indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]<br>
+ %sum.1 = phi float [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]<br>
+ %arrayidx.1 = getelementptr inbounds float, float* %x, i64 %indvars.iv<br>
+ %0 = load float, float* %arrayidx.1, align 4<br>
+ %arrayidx.2 = getelementptr inbounds float, float* %y, i64 %indvars.iv<br>
+ %1 = load float, float* %arrayidx.2, align 4<br>
+ %cmp.2 = fcmp fast ogt float %0, %1<br>
+ %add = fadd fast float %0, %sum.1<br>
+ %sum.2 = select i1 %cmp.2, float %add, float %sum.1<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %zext<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.body, %entry<br>
+ %2 = phi float [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]<br>
+ ret float %2<br>
+}<br>
+<br>
+; Double pattern:<br>
+; Check vectorization of reduction code which has an fadd instruction after<br>
+; an fcmp instruction which compares an array element and another array<br>
+; element.<br>
+;<br>
+; double fcmp_array_elm_fadd_select2(double * restrict x, double * restrict y,<br>
+; const int N) {<br>
+; double sum = 0.<br>
+; for (int i = 0; i < N; ++i)<br>
+; if (x[i] > y[i])<br>
+; sum += x[i];<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_array_elm_fadd_select2(<br>
+; CHECK: %[[V2:.*]] = fcmp fast ogt <4 x double> %[[V0:.*]], %[[V1:.*]]<br>
+; CHECK: %[[V4:.*]] = fadd fast <4 x double> %[[V0]], %[[V3:.*]]<br>
+; CHECK: select <4 x i1> %[[V2]], <4 x double> %[[V4]], <4 x double> %[[V3]]<br>
+define double @fcmp_array_elm_fadd_select2(double* noalias %x, double* noalias %y, i32 %N) nounwind readonly {<br>
+entry:<br>
+ %cmp.1 = icmp sgt i32 %N, 0<br>
+ br i1 %cmp.1, label %for.header, label %for.end<br>
+<br>
+for.header: ; preds = %entry<br>
+ %zext = zext i32 %N to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %for.body, %for.header<br>
+ %indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]<br>
+ %sum.1 = phi double [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]<br>
+ %arrayidx.1 = getelementptr inbounds double, double* %x, i64 %indvars.iv<br>
+ %0 = load double, double* %arrayidx.1, align 4<br>
+ %arrayidx.2 = getelementptr inbounds double, double* %y, i64 %indvars.iv<br>
+ %1 = load double, double* %arrayidx.2, align 4<br>
+ %cmp.2 = fcmp fast ogt double %0, %1<br>
+ %add = fadd fast double %0, %sum.1<br>
+ %sum.2 = select i1 %cmp.2, double %add, double %sum.1<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %zext<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.body, %entry<br>
+ %2 = phi double [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]<br>
+ ret double %2<br>
+}<br>
+<br>
+; Float pattern:<br>
+; Check vectorization of reduction code which has an fsub instruction after<br>
+; an fcmp instruction which compares an array element and 0.<br>
+;<br>
+; float fcmp_0_fsub_select1(float * restrict x, const int N) {<br>
+; float sum = 0.<br>
+; for (int i = 0; i < N; ++i)<br>
+; if (x[i] > (float)0.)<br>
+; sum -= x[i];<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_0_fsub_select1(<br>
+; CHECK: %[[V1:.*]] = fcmp ogt <4 x float> %[[V0:.*]], zeroinitializer<br>
+; CHECK: %[[V3:.*]] = fsub <4 x float> %[[V2:.*]], %[[V0]]<br>
+; CHECK: select <4 x i1> %[[V1]], <4 x float> %[[V3]], <4 x float> %[[V2]]<br>
+define float @fcmp_0_fsub_select1(float* noalias %x, i32 %N) nounwind readonly {<br>
+entry:<br>
+ %cmp.1 = icmp sgt i32 %N, 0<br>
+ br i1 %cmp.1, label %for.header, label %for.end<br>
+<br>
+for.header: ; preds = %entry<br>
+ %zext = zext i32 %N to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %for.body, %for.header<br>
+ %indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]<br>
+ %sum.1 = phi float [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]<br>
+ %arrayidx = getelementptr inbounds float, float* %x, i64 %indvars.iv<br>
+ %0 = load float, float* %arrayidx, align 4<br>
+ %cmp.2 = fcmp ogt float %0, 0.000000e+00<br>
+ %sub = fsub float %sum.1, %0<br>
+ %sum.2 = select i1 %cmp.2, float %sub, float %sum.1<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %zext<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.body, %entry<br>
+ %1 = phi float [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]<br>
+ ret float %1<br>
+}<br>
+<br>
+; Double pattern:<br>
+; Check vectorization of reduction code which has an fsub instruction after<br>
+; an fcmp instruction which compares an array element and 0.<br>
+;<br>
+; double fcmp_0_fsub_select2(double * restrict x, const int N) {<br>
+; double sum = 0.<br>
+; for (int i = 0; i < N; ++i)<br>
+; if (x[i] > 0.)<br>
+; sum -= x[i];<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_0_fsub_select2(<br>
+; CHECK: %[[V1:.*]] = fcmp ogt <4 x double> %[[V0:.*]], zeroinitializer<br>
+; CHECK: %[[V3:.*]] = fsub <4 x double> %[[V2:.*]], %[[V0]]<br>
+; CHECK: select <4 x i1> %[[V1]], <4 x double> %[[V3]], <4 x double> %[[V2]]<br>
+define double @fcmp_0_fsub_select2(double* noalias %x, i32 %N) nounwind readonly {<br>
+entry:<br>
+ %cmp.1 = icmp sgt i32 %N, 0<br>
+ br i1 %cmp.1, label %for.header, label %for.end<br>
+<br>
+for.header: ; preds = %entry<br>
+ %zext = zext i32 %N to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %for.body, %for.header<br>
+ %indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]<br>
+ %sum.1 = phi double [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]<br>
+ %arrayidx = getelementptr inbounds double, double* %x, i64 %indvars.iv<br>
+ %0 = load double, double* %arrayidx, align 4<br>
+ %cmp.2 = fcmp ogt double %0, 0.000000e+00<br>
+ %sub = fsub double %sum.1, %0<br>
+ %sum.2 = select i1 %cmp.2, double %sub, double %sum.1<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %zext<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.body, %entry<br>
+ %1 = phi double [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]<br>
+ ret double %1<br>
+}<br>
+<br>
+; Float pattern:<br>
+; Check vectorization of reduction code which has an fmul instruction after<br>
+; an fcmp instruction which compares an array element and 0.<br>
+;<br>
+; float fcmp_0_fmult_select1(float * restrict x, const int N) {<br>
+; float sum = 0.<br>
+; for (int i = 0; i < N; ++i)<br>
+; if (x[i] > (float)0.)<br>
+; sum *= x[i];<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_0_fmult_select1(<br>
+; CHECK: %[[V1:.*]] = fcmp ogt <4 x float> %[[V0:.*]], zeroinitializer<br>
+; CHECK: %[[V3:.*]] = fmul <4 x float> %[[V2:.*]], %[[V0]]<br>
+; CHECK: select <4 x i1> %[[V1]], <4 x float> %[[V3]], <4 x float> %[[V2]]<br>
+define float @fcmp_0_fmult_select1(float* noalias %x, i32 %N) nounwind readonly {<br>
+entry:<br>
+ %cmp.1 = icmp sgt i32 %N, 0<br>
+ br i1 %cmp.1, label %for.header, label %for.end<br>
+<br>
+for.header: ; preds = %entry<br>
+ %zext = zext i32 %N to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %for.body, %for.header<br>
+ %indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]<br>
+ %sum.1 = phi float [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]<br>
+ %arrayidx = getelementptr inbounds float, float* %x, i64 %indvars.iv<br>
+ %0 = load float, float* %arrayidx, align 4<br>
+ %cmp.2 = fcmp ogt float %0, 0.000000e+00<br>
+ %mult = fmul float %sum.1, %0<br>
+ %sum.2 = select i1 %cmp.2, float %mult, float %sum.1<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %zext<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.body, %entry<br>
+ %1 = phi float [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]<br>
+ ret float %1<br>
+}<br>
+<br>
+; Double pattern:<br>
+; Check vectorization of reduction code which has an fmul instruction after<br>
+; an fcmp instruction which compares an array element and 0.<br>
+;<br>
+; double fcmp_0_fmult_select2(double * restrict x, const int N) {<br>
+; double sum = 0.<br>
+; for (int i = 0; i < N; ++i)<br>
+; if (x[i] > 0.)<br>
+; sum *= x[i];<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_0_fmult_select2(<br>
+; CHECK: %[[V1:.*]] = fcmp ogt <4 x double> %[[V0:.*]], zeroinitializer<br>
+; CHECK: %[[V3:.*]] = fmul <4 x double> %[[V2:.*]], %[[V0]]<br>
+; CHECK: select <4 x i1> %[[V1]], <4 x double> %[[V3]], <4 x double> %[[V2]]<br>
+define double @fcmp_0_fmult_select2(double* noalias %x, i32 %N) nounwind readonly {<br>
+entry:<br>
+ %cmp.1 = icmp sgt i32 %N, 0<br>
+ br i1 %cmp.1, label %for.header, label %for.end<br>
+<br>
+for.header: ; preds = %entry<br>
+ %zext = zext i32 %N to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %for.body, %for.header<br>
+ %indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]<br>
+ %sum.1 = phi double [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]<br>
+ %arrayidx = getelementptr inbounds double, double* %x, i64 %indvars.iv<br>
+ %0 = load double, double* %arrayidx, align 4<br>
+ %cmp.2 = fcmp ogt double %0, 0.000000e+00<br>
+ %mult = fmul double %sum.1, %0<br>
+ %sum.2 = select i1 %cmp.2, double %mult, double %sum.1<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %zext<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.body, %entry<br>
+ %1 = phi double [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]<br>
+ ret double %1<br>
+}<br>
+<br>
+; Float multi pattern<br>
+; Check vectorisation of reduction code with a pair of selects to different<br>
+; fadd patterns.<br>
+;<br>
+; float fcmp_multi(float *a, int n) {<br>
+; float sum=0.0;<br>
+; for (int i=0;i<n;i++) {<br>
+; if (a[i]>1.0)<br>
+; sum+=a[i];<br>
+; else if (a[i]<3.0)<br>
+; sum+=2*a[i];<br>
+; else<br>
+; sum+=3*a[i];<br>
+; }<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_multi(<br>
+; CHECK: %[[C1:.*]] = fcmp ogt <4 x float> %[[V0:.*]], <float 1.000000e+00,<br>
+; CHECK: %[[C2:.*]] = fcmp olt <4 x float> %[[V0]], <float 3.000000e+00,<br>
+; CHECK-DAG: %[[M1:.*]] = fmul fast <4 x float> %[[V0]], <float 3.000000e+00,<br>
+; CHECK-DAG: %[[M2:.*]] = fmul fast <4 x float> %[[V0]], <float 2.000000e+00,<br>
+; CHECK: %[[C11:.*]] = xor <4 x i1> %[[C1]], <i1 true,<br>
+; CHECK-DAG: %[[C12:.*]] = and <4 x i1> %[[C2]], %[[C11]]<br>
+; CHECK-DAG: %[[C21:.*]] = xor <4 x i1> %[[C2]], <i1 true,<br>
+; CHECK: %[[C22:.*]] = and <4 x i1> %[[C21]], %[[C11]]<br>
+; CHECK: %[[S1:.*]] = select <4 x i1> %[[C22]], <4 x float> %[[M1]], <4 x float> %[[M2]]<br>
+; CHECK: %[[S2:.*]] = select <4 x i1> %[[C1]], <4 x float> %[[V0]], <4 x float> %[[S1]]<br>
+; CHECK: fadd fast <4 x float> %[[S2]],<br>
+define float @fcmp_multi(float* nocapture readonly %a, i32 %n) nounwind readonly {<br>
+entry:<br>
+ %cmp10 = icmp sgt i32 %n, 0<br>
+ br i1 %cmp10, label %for.body.preheader, label %for.end<br>
+<br>
+for.body.preheader: ; preds = %entry<br>
+ %wide.trip.count = zext i32 %n to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %for.inc, %for.body.preheader<br>
+ %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.inc ]<br>
+ %sum.011 = phi float [ 0.000000e+00, %for.body.preheader ], [ %sum.1, %for.inc ]<br>
+ %arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv<br>
+ %0 = load float, float* %arrayidx, align 4<br>
+ %cmp1 = fcmp ogt float %0, 1.000000e+00<br>
+ br i1 %cmp1, label %for.inc, label %if.else<br>
+<br>
+if.else: ; preds = %for.body<br>
+ %cmp8 = fcmp olt float %0, 3.000000e+00<br>
+ br i1 %cmp8, label %if.then10, label %if.else14<br>
+<br>
+if.then10: ; preds = %if.else<br>
+ %mul = fmul fast float %0, 2.000000e+00<br>
+ br label %for.inc<br>
+<br>
+if.else14: ; preds = %if.else<br>
+ %mul17 = fmul fast float %0, 3.000000e+00<br>
+ br label %for.inc<br>
+<br>
+for.inc: ; preds = %for.body, %if.else14, %if.then10<br>
+ %.pn = phi float [ %mul, %if.then10 ], [ %mul17, %if.else14 ], [ %0, %for.body ]<br>
+ %sum.1 = fadd fast float %.pn, %sum.011<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.inc, %entry<br>
+ %sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %sum.1, %for.inc ]<br>
+ ret float %sum.0.lcssa<br>
+}<br>
+<br>
+; Float fadd + fsub patterns<br>
+; Check vectorisation of reduction code with a pair of selects to different<br>
+; instructions { fadd, fsub } but equivalent (change in constant).<br>
+;<br>
+; float fcmp_multi(float *a, int n) {<br>
+; float sum=0.0;<br>
+; for (int i=0;i<n;i++) {<br>
+; if (a[i]>1.0)<br>
+; sum+=a[i];<br>
+; else if (a[i]<3.0)<br>
+; sum-=a[i];<br>
+; }<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_fadd_fsub(<br>
+; CHECK: %[[C1:.*]] = fcmp ogt <4 x float> %[[V0:.*]], <float 1.000000e+00,<br>
+; CHECK: %[[C2:.*]] = fcmp olt <4 x float> %[[V0]], <float 3.000000e+00,<br>
+; CHECK-DAG: %[[SUB:.*]] = fsub fast <4 x float><br>
+; CHECK-DAG: %[[ADD:.*]] = fadd fast <4 x float><br>
+; CHECK: %[[C11:.*]] = xor <4 x i1> %[[C1]], <i1 true,<br>
+; CHECK-DAG: %[[C12:.*]] = and <4 x i1> %[[C2]], %[[C11]]<br>
+; CHECK-DAG: %[[C21:.*]] = xor <4 x i1> %[[C2]], <i1 true,<br>
+; CHECK: %[[C22:.*]] = and <4 x i1> %[[C21]], %[[C11]]<br>
+; CHECK: %[[S1:.*]] = select <4 x i1> %[[C12]], <4 x float> %[[SUB]], <4 x float> %[[ADD]]<br>
+; CHECK: %[[S2:.*]] = select <4 x i1> %[[C22]], {{.*}} <4 x float> %[[S1]]<br>
+define float @fcmp_fadd_fsub(float* nocapture readonly %a, i32 %n) nounwind readonly {<br>
+entry:<br>
+ %cmp9 = icmp sgt i32 %n, 0<br>
+ br i1 %cmp9, label %for.body.preheader, label %for.end<br>
+<br>
+for.body.preheader: ; preds = %entry<br>
+ %wide.trip.count = zext i32 %n to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %for.inc, %for.body.preheader<br>
+ %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.inc ]<br>
+ %sum.010 = phi float [ 0.000000e+00, %for.body.preheader ], [ %sum.1, %for.inc ]<br>
+ %arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv<br>
+ %0 = load float, float* %arrayidx, align 4<br>
+ %cmp1 = fcmp ogt float %0, 1.000000e+00<br>
+ br i1 %cmp1, label %if.then, label %if.else<br>
+<br>
+if.then: ; preds = %for.body<br>
+ %add = fadd fast float %0, %sum.010<br>
+ br label %for.inc<br>
+<br>
+if.else: ; preds = %for.body<br>
+ %cmp8 = fcmp olt float %0, 3.000000e+00<br>
+ br i1 %cmp8, label %if.then10, label %for.inc<br>
+<br>
+if.then10: ; preds = %if.else<br>
+ %sub = fsub fast float %sum.010, %0<br>
+ br label %for.inc<br>
+<br>
+for.inc: ; preds = %if.then, %if.then10, %if.else<br>
+ %sum.1 = phi float [ %add, %if.then ], [ %sub, %if.then10 ], [ %sum.010, %if.else ]<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.inc, %entry<br>
+ %sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %sum.1, %for.inc ]<br>
+ ret float %sum.0.lcssa<br>
+}<br>
+<br>
+; Float fadd + fmul patterns<br>
+; Check lack of vectorisation of reduction code with a pair of non-compatible<br>
+; instructions { fadd, fmul }.<br>
+;<br>
+; float fcmp_multi(float *a, int n) {<br>
+; float sum=0.0;<br>
+; for (int i=0;i<n;i++) {<br>
+; if (a[i]>1.0)<br>
+; sum+=a[i];<br>
+; else if (a[i]<3.0)<br>
+; sum*=a[i];<br>
+; }<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_fadd_fmul(<br>
+; CHECK-NOT: <4 x float><br>
+define float @fcmp_fadd_fmul(float* nocapture readonly %a, i32 %n) nounwind readonly {<br>
+entry:<br>
+ %cmp9 = icmp sgt i32 %n, 0<br>
+ br i1 %cmp9, label %for.body.preheader, label %for.end<br>
+<br>
+for.body.preheader: ; preds = %entry<br>
+ %wide.trip.count = zext i32 %n to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %for.inc, %for.body.preheader<br>
+ %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.inc ]<br>
+ %sum.010 = phi float [ 0.000000e+00, %for.body.preheader ], [ %sum.1, %for.inc ]<br>
+ %arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv<br>
+ %0 = load float, float* %arrayidx, align 4<br>
+ %cmp1 = fcmp ogt float %0, 1.000000e+00<br>
+ br i1 %cmp1, label %if.then, label %if.else<br>
+<br>
+if.then: ; preds = %for.body<br>
+ %add = fadd fast float %0, %sum.010<br>
+ br label %for.inc<br>
+<br>
+if.else: ; preds = %for.body<br>
+ %cmp8 = fcmp olt float %0, 3.000000e+00<br>
+ br i1 %cmp8, label %if.then10, label %for.inc<br>
+<br>
+if.then10: ; preds = %if.else<br>
+ %mul = fmul fast float %0, %sum.010<br>
+ br label %for.inc<br>
+<br>
+for.inc: ; preds = %if.then, %if.then10, %if.else<br>
+ %sum.1 = phi float [ %add, %if.then ], [ %mul, %if.then10 ], [ %sum.010, %if.else ]<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.inc, %entry<br>
+ %sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %sum.1, %for.inc ]<br>
+ ret float %sum.0.lcssa<br>
+}<br>
+<br>
+; Float fadd + store patterns<br>
+; Check lack of vectorisation of reduction code with a store back, given it<br>
+; has loop dependency on a[i].<br>
+;<br>
+; float fcmp_store_back(float a[], int LEN) {<br>
+; float sum = 0.0;<br>
+; for (int i = 0; i < LEN; i++) {<br>
+; sum += a[i];<br>
+; a[i] = sum;<br>
+; }<br>
+; return sum;<br>
+; }<br>
+<br>
+; CHECK-LABEL: @fcmp_store_back(<br>
+; CHECK-NOT: <4 x float><br>
+define float @fcmp_store_back(float* nocapture %a, i32 %LEN) nounwind readonly {<br>
+entry:<br>
+ %cmp7 = icmp sgt i32 %LEN, 0<br>
+ br i1 %cmp7, label %for.body.preheader, label %for.end<br>
+<br>
+for.body.preheader: ; preds = %entry<br>
+ %wide.trip.count = zext i32 %LEN to i64<br>
+ br label %for.body<br>
+<br>
+for.body: ; preds = %for.body, %for.body.preheader<br>
+ %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]<br>
+ %sum.08 = phi float [ 0.000000e+00, %for.body.preheader ], [ %add, %for.body ]<br>
+ %arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv<br>
+ %0 = load float, float* %arrayidx, align 4<br>
+ %add = fadd fast float %0, %sum.08<br>
+ store float %add, float* %arrayidx, align 4<br>
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1<br>
+ %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count<br>
+ br i1 %exitcond, label %for.end, label %for.body<br>
+<br>
+for.end: ; preds = %for.body, %entry<br>
+ %sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add, %for.body ]<br>
+ ret float %sum.0.lcssa<br>
+}<br>
<br>
<br>
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