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<p style="margin-top:0;margin-bottom:0">It was fixed, but I've kept the pass disabled. We have it enabled downstream, but we don't compile anything sufficiently large other than a stage 2 builder. If you or Reid have a larger code base, I would be very grateful
if you could test it too.</p>
<p style="margin-top:0;margin-bottom:0"><br>
</p>
<p style="margin-top:0;margin-bottom:0">thanks,</p>
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<p></p>
<p style="font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">Sam Parker</span></p>
<span style="font-family:Calibri,Helvetica,sans-serif"></span>
<p style="font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">Compilation Tools Engineer | Arm</span></p>
<span style="font-family:Calibri,Helvetica,sans-serif"></span>
<p style="font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">. . . . . . . . . . . . . . . . . . . . . . . . . . .</span></p>
<span style="font-family:Calibri,Helvetica,sans-serif"></span>
<p style="font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">Arm.com</span></p>
<p></p>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Friedman, Eli <efriedma@codeaurora.org><br>
<b>Sent:</b> 23 August 2018 20:37:03<br>
<b>To:</b> Reid Kleckner; Sam Parker; Sjoerd Meijer<br>
<b>Cc:</b> llvm-commits<br>
<b>Subject:</b> Re: [llvm] r338354 - [ARM] Revert r337821</font>
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<div class="x_moz-cite-prefix">Was this ever fixed? Or is ARMCodeGenPrepare still disabled because of this bug?<br>
<br>
-Eli<br>
<br>
On 7/31/2018 5:25 PM, Reid Kleckner via llvm-commits wrote:<br>
</div>
<blockquote type="cite">
<div dir="ltr">The reduced test case is:
<div><br>
</div>
<div>
<pre id="x_gmail-hterm:copy-to-clipboard-source" style="color:rgb(0,0,0)">typedef char a;
enum b {};
enum c : a;
enum d { e, f, g, h, i };
template <class j, int k, int l> class m {
public:
static const int n = (1 << k << l) - 1;
static const int o = k + l;
static j p(int aa) { return j((aa & n) >> k); }
};
class q {
public:
b s() { return m<b, 0, 3>::p(r); }
bool ab() {
d a = m<d, m<c, m<b, 0, 3>::o, 3>::o, 3>::p(r);
return a == e;
}
bool u() {
d t = m<d, m<c, m<b, 0, 3>::o, 3>::o, 3>::p(r);
return t == i;
}
short r;
};
class v;
class x {
public:
v *ac();
};
class v {
public:
q *ad() { return &w; }
q w;
};
class ae {
x *af() const;
enum y { z, ag, ah };
y ai() const;
};
ae::y ae::ai() const {
v b = *af()->ac();
if (<a href="http://b.ad">b.ad</a>()->ab())
return z;
if (<a href="http://b.ad">b.ad</a>()->u())
return <a href="http://b.ad">b.ad</a>()->s() ? ag : ah;
return ah;
}</pre>
When I compile like so it crashes when this patch is applied:</div>
<div>
<pre id="x_gmail-hterm:copy-to-clipboard-source" style="color:rgb(0,0,0)">$ ./bin/clang -c ast.cpp --target=thumbv7--linux-android -std=c++14 -O2
Duplicate integer as switch case
switch i32 %trunc, label %cleanup.fold.split [
i32 0, label %cleanup
i32 0, label %if.then7
]
i32 0
fatal error: error in backend: Broken function found, compilation aborted!
clang-7: error: clang frontend command failed with exit code 70 (use -v to see invocation)</pre>
</div>
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<br>
<div class="x_gmail_quote">
<div dir="ltr">On Tue, Jul 31, 2018 at 4:10 PM Reid Kleckner <<a href="mailto:rnk@google.com">rnk@google.com</a>> wrote:<br>
</div>
<blockquote class="x_gmail_quote" style="margin:0 0 0
.8ex; border-left:1px #ccc solid; padding-left:1ex">
<div dir="ltr">I reverted this in r338452. It seems ARMCodeGenPrepare is not ready for prime time. It introduces verifier failures that look like:
<div>
<div> Duplicate integer as switch case</div>
<div> switch i32 %trunc, label %if.end13 [</div>
<div> i32 0, label %cleanup36</div>
<div> i32 0, label %if.then8</div>
<div> ], !dbg !4981</div>
<div> i32 0</div>
<div> fatal error: error in backend: Broken function found, compilation aborted!</div>
</div>
<div><br>
</div>
<div>I'll keep reducing and send along what I get.</div>
</div>
<br>
<div class="x_gmail_quote">
<div dir="ltr">On Tue, Jul 31, 2018 at 2:04 AM Sam Parker via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>> wrote:<br>
</div>
<blockquote class="x_gmail_quote" style="margin:0 0 0
.8ex; border-left:1px #ccc solid; padding-left:1ex">
Author: sam_parker<br>
Date: Tue Jul 31 02:04:14 2018<br>
New Revision: 338354<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=338354&view=rev" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-project?rev=338354&view=rev</a><br>
Log:<br>
[ARM] Revert r337821<br>
<br>
Re-enabling ARMCodeGenPrepare by default after failing to reproduce<br>
the bootstrap issues that I was concerned it was causing.<br>
<br>
<br>
Modified:<br>
llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp<br>
llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll<br>
llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll<br>
llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp?rev=338354&r1=338353&r2=338354&view=diff" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp?rev=338354&r1=338353&r2=338354&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp Tue Jul 31 02:04:14 2018<br>
@@ -42,7 +42,7 @@<br>
using namespace llvm;<br>
<br>
static cl::opt<bool><br>
-DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(true),<br>
+DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(false),<br>
cl::desc("Disable ARM specific CodeGenPrepare pass"));<br>
<br>
static cl::opt<bool><br>
<br>
Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll?rev=338354&r1=338353&r2=338354&view=diff" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll?rev=338354&r1=338353&r2=338354&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll (original)<br>
+++ llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll Tue Jul 31 02:04:14 2018<br>
@@ -1,6 +1,6 @@<br>
-; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP<br>
-; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP<br>
-; RUN: llc -mtriple=thumbv8 %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM<br>
+; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP<br>
+; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP<br>
+; RUN: llc -mtriple=thumbv8 %s -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM<br>
<br>
; CHECK-COMMON-LABEL: test_ult_254_inc_imm:<br>
; CHECK-DSP: adds r0, #1<br>
<br>
Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll?rev=338354&r1=338353&r2=338354&view=diff" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll?rev=338354&r1=338353&r2=338354&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll (original)<br>
+++ llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll Tue Jul 31 02:04:14 2018<br>
@@ -1,7 +1,7 @@<br>
-; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP<br>
-; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP<br>
-; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP<br>
-; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM<br>
+; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP<br>
+; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP<br>
+; RUN: llc -mtriple=thumbv8m.main -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP<br>
+; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM<br>
<br>
; Test that ARMCodeGenPrepare can handle:<br>
; - loops<br>
<br>
Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll?rev=338354&r1=338353&r2=338354&view=diff" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll?rev=338354&r1=338353&r2=338354&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll (original)<br>
+++ llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll Tue Jul 31 02:04:14 2018<br>
@@ -1,7 +1,7 @@<br>
-; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck %s<br>
-; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - | FileCheck %s<br>
-; RUN: llc -mtriple=thumbv7 %s -arm-disable-cgp=false -o - | FileCheck %s<br>
-; RUN: llc -mtriple=armv8 %s -arm-disable-cgp=false -o - | FileCheck %s<br>
+; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s<br>
+; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s<br>
+; RUN: llc -mtriple=thumbv7 %s -o - | FileCheck %s<br>
+; RUN: llc -mtriple=armv8 %s -o - | FileCheck %s<br>
<br>
; Test to check that ARMCodeGenPrepare doesn't optimised away sign extends.<br>
; CHECK-LABEL: test_signed_load:<br>
<br>
<br>
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<fieldset class="x_mimeAttachmentHeader"></fieldset> <br>
<pre>_______________________________________________
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<pre class="x_moz-signature" cols="72">--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project</pre>
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