<html><head><meta http-equiv="Content-Type" content="text/html; charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;" class="">Hi Chandler,<div class=""><br class=""></div><div class="">I completely missed this email. Thanks for reverting. I’ll look into this now (and another related commit).</div><div class=""><br class=""></div><div class="">Aditya<br class=""><div><br class=""><blockquote type="cite" class=""><div class="">On Aug 16, 2018, at 9:33 PM, Chandler Carruth <<a href="mailto:chandlerc@gmail.com" class="">chandlerc@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class="">As it has been well over 2 hours without update, i'm going to just revert.</div><br class=""><div class="gmail_quote"><div dir="ltr" class="">On Thu, Aug 16, 2018 at 7:42 PM Chandler Carruth <<a href="mailto:chandlerc@gmail.com" class="">chandlerc@gmail.com</a>> wrote:<br class=""></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr" class="">(and lots of other bots it looks like)</div><br class=""><div class="gmail_quote"><div dir="ltr" class="">On Thu, Aug 16, 2018 at 7:39 PM Chandler Carruth <<a href="mailto:chandlerc@gmail.com" target="_blank" class="">chandlerc@gmail.com</a>> wrote:<br class=""></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr" class="">Not sure the bot blame will work, but pretty sure this broke LTO bots:<div class=""><a href="http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/12107/steps/test-stage2-compiler/logs/stdio" target="_blank" class="">http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/12107/steps/test-stage2-compiler/logs/stdio</a><br class=""></div><div class=""><a href="http://lab.llvm.org:8011/builders/clang-with-lto-ubuntu/builds/9867/steps/test-stage2-compiler/logs/stdio" target="_blank" class="">http://lab.llvm.org:8011/builders/clang-with-lto-ubuntu/builds/9867/steps/test-stage2-compiler/logs/stdio</a><br class=""></div></div><br class=""><div class="gmail_quote"><div dir="ltr" class="">On Thu, Aug 16, 2018 at 6:42 PM Aditya Nandakumar via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" target="_blank" class="">llvm-commits@lists.llvm.org</a>> wrote:<br class=""></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: aditya_nandakumar<br class="">
Date: Thu Aug 16 18:41:56 2018<br class="">
New Revision: 339977<br class="">
<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=339977&view=rev" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project?rev=339977&view=rev</a><br class="">
Log:<br class="">
[GISel]: Add Opcodes for a few LLVM Intrinsics<br class="">
<br class="">
<a href="https://reviews.llvm.org/D50401" rel="noreferrer" target="_blank" class="">https://reviews.llvm.org/D50401</a><br class="">
<br class="">
Add opcodes for llvm.intrinsic.trunc, round, and update the IRTranslator<br class="">
for the same.<br class="">
<br class="">
Reviewed by: dsanders.<br class="">
<br class="">
Modified:<br class="">
llvm/trunk/include/llvm/Support/TargetOpcodes.def<br class="">
llvm/trunk/include/llvm/Target/GenericOpcodes.td<br class="">
llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp<br class="">
llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll<br class="">
<br class="">
Modified: llvm/trunk/include/llvm/Support/TargetOpcodes.def<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetOpcodes.def?rev=339977&r1=339976&r2=339977&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetOpcodes.def?rev=339977&r1=339976&r2=339977&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/include/llvm/Support/TargetOpcodes.def (original)<br class="">
+++ llvm/trunk/include/llvm/Support/TargetOpcodes.def Thu Aug 16 18:41:56 2018<br class="">
@@ -268,6 +268,12 @@ HANDLE_TARGET_OPCODE(G_INTTOPTR)<br class="">
/// COPY is the relevant instruction.<br class="">
HANDLE_TARGET_OPCODE(G_BITCAST)<br class="">
<br class="">
+/// INTRINSIC trunc intrinsic.<br class="">
+HANDLE_TARGET_OPCODE(G_INTRINSIC_TRUNC)<br class="">
+<br class="">
+/// INTRINSIC round intrinsic.<br class="">
+HANDLE_TARGET_OPCODE(G_INTRINSIC_ROUND)<br class="">
+<br class="">
/// Generic load (including anyext load)<br class="">
HANDLE_TARGET_OPCODE(G_LOAD)<br class="">
<br class="">
<br class="">
Modified: llvm/trunk/include/llvm/Target/GenericOpcodes.td<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/GenericOpcodes.td?rev=339977&r1=339976&r2=339977&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/GenericOpcodes.td?rev=339977&r1=339976&r2=339977&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/include/llvm/Target/GenericOpcodes.td (original)<br class="">
+++ llvm/trunk/include/llvm/Target/GenericOpcodes.td Thu Aug 16 18:41:56 2018<br class="">
@@ -513,6 +513,21 @@ def G_FLOG2 : GenericInstruction {<br class="">
}<br class="">
<br class="">
//------------------------------------------------------------------------------<br class="">
+// Opcodes for LLVM Intrinsics<br class="">
+//------------------------------------------------------------------------------<br class="">
+def G_INTRINSIC_TRUNC : GenericInstruction {<br class="">
+ let OutOperandList = (outs type0:$dst);<br class="">
+ let InOperandList = (ins type0:$src1);<br class="">
+ let hasSideEffects = 0;<br class="">
+}<br class="">
+<br class="">
+def G_INTRINSIC_ROUND : GenericInstruction {<br class="">
+ let OutOperandList = (outs type0:$dst);<br class="">
+ let InOperandList = (ins type0:$src1);<br class="">
+ let hasSideEffects = 0;<br class="">
+}<br class="">
+<br class="">
+//------------------------------------------------------------------------------<br class="">
// Memory ops<br class="">
//------------------------------------------------------------------------------<br class="">
<br class="">
<br class="">
Modified: llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp?rev=339977&r1=339976&r2=339977&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp?rev=339977&r1=339976&r2=339977&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp (original)<br class="">
+++ llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp Thu Aug 16 18:41:56 2018<br class="">
@@ -850,6 +850,16 @@ bool IRTranslator::translateKnownIntrins<br class="">
.addDef(getOrCreateVReg(CI))<br class="">
.addUse(getOrCreateVReg(*CI.getArgOperand(0)));<br class="">
return true;<br class="">
+ case Intrinsic::trunc:<br class="">
+ MIRBuilder.buildInstr(TargetOpcode::G_INTRINSIC_TRUNC)<br class="">
+ .addDef(getOrCreateVReg(CI))<br class="">
+ .addUse(getOrCreateVReg(*CI.getArgOperand(0)));<br class="">
+ return true;<br class="">
+ case Intrinsic::round:<br class="">
+ MIRBuilder.buildInstr(TargetOpcode::G_INTRINSIC_ROUND)<br class="">
+ .addDef(getOrCreateVReg(CI))<br class="">
+ .addUse(getOrCreateVReg(*CI.getArgOperand(0)));<br class="">
+ return true;<br class="">
case Intrinsic::fma:<br class="">
MIRBuilder.buildInstr(TargetOpcode::G_FMA)<br class="">
.addDef(getOrCreateVReg(CI))<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll?rev=339977&r1=339976&r2=339977&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll?rev=339977&r1=339976&r2=339977&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll Thu Aug 16 18:41:56 2018<br class="">
@@ -1408,6 +1408,26 @@ define float @test_fabs_intrin(float %a)<br class="">
ret float %res<br class="">
}<br class="">
<br class="">
+declare float @llvm.trunc.f32(float)<br class="">
+define float @test_intrinsic_trunc(float %a) {<br class="">
+; CHECK-LABEL: name: test_intrinsic_trunc<br class="">
+; CHECK: [[A:%[0-9]+]]:_(s32) = COPY $s0<br class="">
+; CHECK: [[RES:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[A]]<br class="">
+; CHECK: $s0 = COPY [[RES]]<br class="">
+ %res = call float @llvm.trunc.f32(float %a)<br class="">
+ ret float %res<br class="">
+}<br class="">
+<br class="">
+declare float @llvm.round.f32(float)<br class="">
+define float @test_intrinsic_round(float %a) {<br class="">
+; CHECK-LABEL: name: test_intrinsic_round<br class="">
+; CHECK: [[A:%[0-9]+]]:_(s32) = COPY $s0<br class="">
+; CHECK: [[RES:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[A]]<br class="">
+; CHECK: $s0 = COPY [[RES]]<br class="">
+ %res = call float @llvm.round.f32(float %a)<br class="">
+ ret float %res<br class="">
+}<br class="">
+<br class="">
declare i32 @llvm.ctlz.i32(i32, i1)<br class="">
define i32 @test_ctlz_intrinsic_zero_not_undef(i32 %a) {<br class="">
; CHECK-LABEL: name: test_ctlz_intrinsic_zero_not_undef<br class="">
<br class="">
<br class="">
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