<html><head><meta http-equiv="Content-Type" content="text/html; charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;" class="">Hi Galina,<div class=""><br class=""></div><div class="">Sorry for the late response; I didn’t check my e-mail over the weekend.</div><div class=""><br class=""></div><div class="">I think this should be fixed by r338267. I don’t have access to a Windows machine, so I can’t verify locally, but it appears that an extra verification pass is added in Windows. When I grep for the line causing the failure, it doesn’t show up in the test output for Linux or macOS.</div><div class=""><br class=""></div><div class="">Hopefully this will fix it!</div><div class=""><br class=""></div><div class="">- Jessica</div><div class=""><div><br class=""><blockquote type="cite" class=""><div class="">On Jul 27, 2018, at 9:19 PM, Galina Kistanova <<a href="mailto:gkistanova@gmail.com" class="">gkistanova@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class=""><div class="">Hello Jessica,</div><div class=""><br class=""></div><div class="">This commit broke tests on one of our builders:</div><div class=""><a href="http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/11299" class="">http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/11299</a></div><div class=""><br class=""></div><div class="">. . .</div><div class="">Failing Tests (1):</div><div class=""> LLVM :: CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll</div><div class=""><br class=""></div><div class="">Please have a look?</div><div class=""><br class=""></div><div class="">Thanks</div><div class=""><br class=""></div><div class="">Galina</div></div><div class="gmail_extra"><br class=""><div class="gmail_quote">On Fri, Jul 27, 2018 at 1:18 PM, Jessica Paquette via llvm-commits <span dir="ltr" class=""><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank" class="">llvm-commits@lists.llvm.org</a>></span> wrote:<br class=""><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: paquette<br class="">
Date: Fri Jul 27 13:18:27 2018<br class="">
New Revision: 338160<br class="">
<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=338160&view=rev" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-<wbr class="">project?rev=338160&view=rev</a><br class="">
Log:<br class="">
Recommit "Enable MachineOutliner by default under -Oz for AArch64"<br class="">
<br class="">
Fixed the ASAN failure from before in r338148, so recommiting.<br class="">
<br class="">
This patch enables the MachineOutliner by default in AArch64 under -Oz.<br class="">
<br class="">
The MachineOutliner offers around a 4.5% improvement on the current -Oz code<br class="">
size improvements.<br class="">
<br class="">
We have done work into improving the debuggability of outlined code, so that<br class="">
users of -Oz won't be surprised by the optimization. We have also been executing<br class="">
the LLVM test suite and common external tests such as the SPEC suites<br class="">
continuously with no issue. The outliner has a low compile-time overhead of<br class="">
roughly 1%. At this point, the outliner would be a really good addition to the<br class="">
-Oz pass pipeline!<br class="">
<br class="">
Added:<br class="">
llvm/trunk/test/CodeGen/<wbr class="">AArch64/machine-outliner-<wbr class="">default.mir<br class="">
Modified:<br class="">
llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64InstrInfo.cpp<br class="">
llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64InstrInfo.h<br class="">
llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64TargetMachine.cpp<br class="">
llvm/trunk/test/CodeGen/<wbr class="">AArch64/O3-pipeline.ll<br class="">
llvm/trunk/test/CodeGen/<wbr class="">AArch64/arm64-memset-to-bzero.<wbr class="">ll<br class="">
llvm/trunk/test/CodeGen/<wbr class="">AArch64/arm64-opt-remarks-<wbr class="">lazy-bfi.ll<br class="">
llvm/trunk/test/CodeGen/<wbr class="">AArch64/cond-sel.ll<br class="">
llvm/trunk/test/CodeGen/<wbr class="">AArch64/machine-outliner-<wbr class="">flags.ll<br class="">
llvm/trunk/test/CodeGen/<wbr class="">AArch64/max-jump-table.ll<br class="">
<br class="">
Modified: llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64InstrInfo.cpp<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp?rev=338160&r1=338159&r2=338160&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-<wbr class="">project/llvm/trunk/lib/Target/<wbr class="">AArch64/AArch64InstrInfo.cpp?<wbr class="">rev=338160&r1=338159&r2=<wbr class="">338160&view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64InstrInfo.cpp (original)<br class="">
+++ llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64InstrInfo.cpp Fri Jul 27 13:18:27 2018<br class="">
@@ -5482,3 +5482,8 @@ MachineBasicBlock::iterator AArch64Instr<br class="">
<br class="">
return CallPt;<br class="">
}<br class="">
+<br class="">
+bool AArch64InstrInfo::<wbr class="">shouldOutlineFromFunctionByDef<wbr class="">ault(<br class="">
+ MachineFunction &MF) const {<br class="">
+ return MF.getFunction().<wbr class="">optForMinSize();<br class="">
+}<br class="">
<br class="">
Modified: llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64InstrInfo.h<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.h?rev=338160&r1=338159&r2=338160&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-<wbr class="">project/llvm/trunk/lib/Target/<wbr class="">AArch64/AArch64InstrInfo.h?<wbr class="">rev=338160&r1=338159&r2=<wbr class="">338160&view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64InstrInfo.h (original)<br class="">
+++ llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64InstrInfo.h Fri Jul 27 13:18:27 2018<br class="">
@@ -249,6 +249,7 @@ public:<br class="">
insertOutlinedCall(Module &M, MachineBasicBlock &MBB,<br class="">
MachineBasicBlock::iterator &It, MachineFunction &MF,<br class="">
const outliner::Candidate &C) const override;<br class="">
+ bool shouldOutlineFromFunctionByDef<wbr class="">ault(MachineFunction &MF) const override;<br class="">
/// Returns true if the instruction sets to an immediate value that can be<br class="">
/// executed more efficiently.<br class="">
bool isExynosResetFast(const MachineInstr &MI) const;<br class="">
<br class="">
Modified: llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64TargetMachine.cpp<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp?rev=338160&r1=338159&r2=338160&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-<wbr class="">project/llvm/trunk/lib/Target/<wbr class="">AArch64/AArch64TargetMachine.<wbr class="">cpp?rev=338160&r1=338159&r2=<wbr class="">338160&view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64TargetMachine.cpp (original)<br class="">
+++ llvm/trunk/lib/Target/AArch64/<wbr class="">AArch64TargetMachine.cpp Fri Jul 27 13:18:27 2018<br class="">
@@ -255,6 +255,9 @@ AArch64TargetMachine::<wbr class="">AArch64TargetMachi<br class="">
<br class="">
// AArch64 supports the MachineOutliner.<br class="">
setMachineOutliner(true);<br class="">
+<br class="">
+ // AArch64 supports default outlining behaviour.<br class="">
+ setSupportsDefaultOutlining(<wbr class="">true);<br class="">
}<br class="">
<br class="">
AArch64TargetMachine::~<wbr class="">AArch64TargetMachine() = default;<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/<wbr class="">AArch64/O3-pipeline.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/O3-pipeline.ll?rev=338160&r1=338159&r2=338160&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-<wbr class="">project/llvm/trunk/test/<wbr class="">CodeGen/AArch64/O3-pipeline.<wbr class="">ll?rev=338160&r1=338159&r2=<wbr class="">338160&view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/test/CodeGen/<wbr class="">AArch64/O3-pipeline.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/<wbr class="">AArch64/O3-pipeline.ll Fri Jul 27 13:18:27 2018<br class="">
@@ -154,6 +154,8 @@<br class="">
; CHECK-NEXT: Insert fentry calls<br class="">
; CHECK-NEXT: Insert XRay ops<br class="">
; CHECK-NEXT: Implement the 'patchable-function' attribute<br class="">
+; CHECK-NEXT: Machine Outliner<br class="">
+; CHECK-NEXT: FunctionPass Manager<br class="">
; CHECK-NEXT: Lazy Machine Block Frequency Analysis<br class="">
; CHECK-NEXT: Machine Optimization Remark Emitter<br class="">
; CHECK-NEXT: AArch64 Assembly Printer<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/<wbr class="">AArch64/arm64-memset-to-bzero.<wbr class="">ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-memset-to-bzero.ll?rev=338160&r1=338159&r2=338160&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-<wbr class="">project/llvm/trunk/test/<wbr class="">CodeGen/AArch64/arm64-memset-<wbr class="">to-bzero.ll?rev=338160&r1=<wbr class="">338159&r2=338160&view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/test/CodeGen/<wbr class="">AArch64/arm64-memset-to-bzero.<wbr class="">ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/<wbr class="">AArch64/arm64-memset-to-bzero.<wbr class="">ll Fri Jul 27 13:18:27 2018<br class="">
@@ -1,6 +1,6 @@<br class="">
-; RUN: llc %s -mtriple=arm64-apple-darwin -o - | \<br class="">
-; RUN: FileCheck --check-prefixes=CHECK,CHECK-<wbr class="">DARWIN %s<br class="">
-; RUN: llc %s -mtriple=arm64-linux-gnu -o - | \<br class="">
+; RUN: llc %s -enable-machine-outliner=never -mtriple=arm64-apple-darwin -o - \<br class="">
+; RUN: | FileCheck --check-prefixes=CHECK,CHECK-<wbr class="">DARWIN %s<br class="">
+; RUN: llc %s -enable-machine-outliner=never -mtriple=arm64-linux-gnu -o - | \<br class="">
; RUN: FileCheck --check-prefixes=CHECK,CHECK-<wbr class="">LINUX %s<br class="">
; <<a href="rdar://problem/14199482" class="">rdar://problem/14199482</a>> ARM64: Calls to bzero() replaced with calls to memset()<br class="">
<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/<wbr class="">AArch64/arm64-opt-remarks-<wbr class="">lazy-bfi.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll?rev=338160&r1=338159&r2=338160&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-<wbr class="">project/llvm/trunk/test/<wbr class="">CodeGen/AArch64/arm64-opt-<wbr class="">remarks-lazy-bfi.ll?rev=<wbr class="">338160&r1=338159&r2=338160&<wbr class="">view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/test/CodeGen/<wbr class="">AArch64/arm64-opt-remarks-<wbr class="">lazy-bfi.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/<wbr class="">AArch64/arm64-opt-remarks-<wbr class="">lazy-bfi.ll Fri Jul 27 13:18:27 2018<br class="">
@@ -26,8 +26,8 @@<br class="">
; requested. (This hard-codes the previous pass to the Assembly Printer,<br class="">
; please adjust accordingly.)<br class="">
<br class="">
-; HOTNESS: Executing Pass 'Implement the 'patchable-function' attribute'<br class="">
-; HOTNESS-NEXT: Freeing Pass 'Implement the 'patchable-function' attribute'<br class="">
+; HOTNESS: Freeing Pass 'Machine Outliner'<br class="">
+; HOTNESS-NEXT: Executing Pass 'Function Pass Manager'<br class="">
; HOTNESS-NEXT: Executing Pass 'Lazy Machine Block Frequency Analysis'<br class="">
; HOTNESS-NEXT: Executing Pass 'Machine Optimization Remark Emitter'<br class="">
; HOTNESS-NEXT: Building MachineBlockFrequencyInfo on the fly<br class="">
@@ -41,8 +41,8 @@<br class="">
; HOTNESS: arm64-summary-remarks.ll:5:0: 1 instructions in function (hotness: 33)<br class="">
<br class="">
<br class="">
-; NO_HOTNESS: Executing Pass 'Implement the 'patchable-function' attribute'<br class="">
-; NO_HOTNESS-NEXT: Freeing Pass 'Implement the 'patchable-function' attribute'<br class="">
+; NO_HOTNESS: Freeing Pass 'Machine Outliner'<br class="">
+; NO_HOTNESS-NEXT: Executing Pass 'Function Pass Manager'<br class="">
; NO_HOTNESS-NEXT: Executing Pass 'Lazy Machine Block Frequency Analysis'<br class="">
; NO_HOTNESS-NEXT: Executing Pass 'Machine Optimization Remark Emitter'<br class="">
; NO_HOTNESS-NEXT: Executing Pass 'AArch64 Assembly Printer'<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/<wbr class="">AArch64/cond-sel.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/cond-sel.ll?rev=338160&r1=338159&r2=338160&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-<wbr class="">project/llvm/trunk/test/<wbr class="">CodeGen/AArch64/cond-sel.ll?<wbr class="">rev=338160&r1=338159&r2=<wbr class="">338160&view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/test/CodeGen/<wbr class="">AArch64/cond-sel.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/<wbr class="">AArch64/cond-sel.ll Fri Jul 27 13:18:27 2018<br class="">
@@ -1,5 +1,5 @@<br class="">
-; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-<wbr class="">gnu -mcpu=cyclone | FileCheck %s<br class="">
-; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-<wbr class="">gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s<br class="">
+; RUN: llc -enable-machine-outliner=never -verify-machineinstrs < %s -mtriple=aarch64-none-linux-<wbr class="">gnu -mcpu=cyclone | FileCheck %s<br class="">
+; RUN: llc -enable-machine-outliner=never -verify-machineinstrs < %s -mtriple=aarch64-none-linux-<wbr class="">gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s<br class="">
<br class="">
@var32 = global i32 0<br class="">
@var64 = global i64 0<br class="">
<br class="">
Added: llvm/trunk/test/CodeGen/<wbr class="">AArch64/machine-outliner-<wbr class="">default.mir<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/machine-outliner-default.mir?rev=338160&view=auto" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-<wbr class="">project/llvm/trunk/test/<wbr class="">CodeGen/AArch64/machine-<wbr class="">outliner-default.mir?rev=<wbr class="">338160&view=auto</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/test/CodeGen/<wbr class="">AArch64/machine-outliner-<wbr class="">default.mir (added)<br class="">
+++ llvm/trunk/test/CodeGen/<wbr class="">AArch64/machine-outliner-<wbr class="">default.mir Fri Jul 27 13:18:27 2018<br class="">
@@ -0,0 +1,71 @@<br class="">
+# RUN: llc -mtriple=aarch64--- -run-pass=machine-outliner \<br class="">
+# RUN: -verify-machineinstrs %s -o - | FileCheck %s<br class="">
+<br class="">
+--- |<br class="">
+ define void @outline_1() #0 { ret void }<br class="">
+ define void @outline_2() #0 { ret void }<br class="">
+ define void @outline_3() #0 { ret void }<br class="">
+ define void @dont_outline() #1 { ret void }<br class="">
+<br class="">
+ attributes #0 = { noredzone minsize optsize }<br class="">
+ attributes #1 = { noredzone }<br class="">
+...<br class="">
+---<br class="">
+<br class="">
+name: outline_1<br class="">
+tracksRegLiveness: true<br class="">
+body: |<br class="">
+ bb.0:<br class="">
+ ; CHECK-LABEL: bb.0:<br class="">
+ ; CHECK: OUTLINED<br class="">
+ liveins: $w8, $wzr<br class="">
+ $w8 = ORRWri $wzr, 1<br class="">
+ $w8 = ORRWri $wzr, 2<br class="">
+ $w8 = ORRWri $wzr, 3<br class="">
+ $w8 = ORRWri $wzr, 4<br class="">
+ RET undef $lr<br class="">
+...<br class="">
+---<br class="">
+<br class="">
+name: outline_2<br class="">
+tracksRegLiveness: true<br class="">
+body: |<br class="">
+ bb.0:<br class="">
+ ; CHECK-LABEL: bb.0:<br class="">
+ ; CHECK: OUTLINED<br class="">
+ liveins: $w8, $wzr<br class="">
+ $w8 = ORRWri $wzr, 1<br class="">
+ $w8 = ORRWri $wzr, 2<br class="">
+ $w8 = ORRWri $wzr, 3<br class="">
+ $w8 = ORRWri $wzr, 4<br class="">
+ RET undef $lr<br class="">
+...<br class="">
+---<br class="">
+<br class="">
+name: outline_3<br class="">
+tracksRegLiveness: true<br class="">
+body: |<br class="">
+ bb.0:<br class="">
+ ; CHECK-LABEL: bb.0:<br class="">
+ ; CHECK: OUTLINED<br class="">
+ liveins: $w8, $wzr<br class="">
+ $w8 = ORRWri $wzr, 1<br class="">
+ $w8 = ORRWri $wzr, 2<br class="">
+ $w8 = ORRWri $wzr, 3<br class="">
+ $w8 = ORRWri $wzr, 4<br class="">
+ RET undef $lr<br class="">
+...<br class="">
+---<br class="">
+<br class="">
+name: dont_outline<br class="">
+tracksRegLiveness: true<br class="">
+body: |<br class="">
+ bb.0:<br class="">
+ ; CHECK-LABEL: bb.0:<br class="">
+ ; CHECK-NOT: BL<br class="">
+ liveins: $w8, $wzr<br class="">
+ $w8 = ORRWri $wzr, 1<br class="">
+ $w8 = ORRWri $wzr, 2<br class="">
+ $w8 = ORRWri $wzr, 3<br class="">
+ $w8 = ORRWri $wzr, 4<br class="">
+ RET undef $lr<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/<wbr class="">AArch64/machine-outliner-<wbr class="">flags.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/machine-outliner-flags.ll?rev=338160&r1=338159&r2=338160&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-<wbr class="">project/llvm/trunk/test/<wbr class="">CodeGen/AArch64/machine-<wbr class="">outliner-flags.ll?rev=338160&<wbr class="">r1=338159&r2=338160&view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/test/CodeGen/<wbr class="">AArch64/machine-outliner-<wbr class="">flags.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/<wbr class="">AArch64/machine-outliner-<wbr class="">flags.ll Fri Jul 27 13:18:27 2018<br class="">
@@ -14,7 +14,7 @@<br class="">
; RUN: | FileCheck %s -check-prefix=NEVER<br class="">
<br class="">
; RUN: llc %s -debug-pass=Structure -verify-machineinstrs \<br class="">
-; RUN: -mtriple arm64---- -o /dev/null 2>&1 \<br class="">
+; RUN: --debug-only=machine-outliner -mtriple arm64---- -o /dev/null 2>&1 \<br class="">
; RUN: | FileCheck %s -check-prefix=NOT-ADDED<br class="">
<br class="">
; RUN: llc %s -O=0 -debug-pass=Structure -verify-machineinstrs \<br class="">
@@ -27,10 +27,11 @@<br class="">
; Cases where it should be added:<br class="">
; * -enable-machine-outliner<br class="">
; * -enable-machine-outliner=<wbr class="">always<br class="">
+; * -enable-machine-outliner is not passed (AArch64 supports<br class="">
+; target-default outlining)<br class="">
;<br class="">
; Cases where it should not be added:<br class="">
; * -O0 or equivalent<br class="">
-; * -enable-machine-outliner is not passed<br class="">
; * -enable-machine-outliner=never is passed<br class="">
<br class="">
; ALWAYS: Machine Outliner<br class="">
@@ -38,7 +39,8 @@<br class="">
; ENABLE: Machine Outliner<br class="">
; ENABLE: Machine Outliner: Running on all functions<br class="">
; NEVER-NOT: Machine Outliner<br class="">
-; NOT-ADDED-NOT: Machine Outliner<br class="">
+; NOT-ADDED: Machine Outliner<br class="">
+; NOT-ADDED: Machine Outliner: Running on target-default functions<br class="">
; OPTNONE-NOT: Machine Outliner<br class="">
<br class="">
define void @foo() {<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/<wbr class="">AArch64/max-jump-table.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/max-jump-table.ll?rev=338160&r1=338159&r2=338160&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-<wbr class="">project/llvm/trunk/test/<wbr class="">CodeGen/AArch64/max-jump-<wbr class="">table.ll?rev=338160&r1=338159&<wbr class="">r2=338160&view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/test/CodeGen/<wbr class="">AArch64/max-jump-table.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/<wbr class="">AArch64/max-jump-table.ll Fri Jul 27 13:18:27 2018<br class="">
@@ -89,6 +89,7 @@ entry:<br class="">
; CHECKM1-NOT: %jump-table.1<br class="">
; CHECKM3-NEXT: %jump-table.0: %bb.1 %bb.2 %bb.3 %bb.4 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.5 %bb.6{{$}}<br class="">
; CHECKM3-NOT: %jump-table.1<br class="">
+; CHECK-DAG: End machine code for function jt2.<br class="">
<br class="">
bb1: tail call void @ext(i32 1) br label %return<br class="">
bb2: tail call void @ext(i32 2) br label %return<br class="">
<br class="">
<br class="">
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