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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Yeah. I reverted right after. I forgot to reply to this saying that. Sorry.<o:p></o:p></span></p>
<p class="MsoNormal"><a name="_MailEndCompose"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></a></p>
<p class="MsoNormal"><a name="_____replyseparator"></a><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> David Blaikie [mailto:dblaikie@gmail.com]
<br>
<b>Sent:</b> Monday, July 16, 2018 11:02 AM<br>
<b>To:</b> Topper, Craig <craig.topper@intel.com><br>
<b>Cc:</b> llvm-commits@lists.llvm.org<br>
<b>Subject:</b> Re: [llvm] r336950 - foo<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Missing a commit message?<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Thu, Jul 12, 2018 at 2:58 PM Craig Topper via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal">Author: ctopper<br>
Date: Thu Jul 12 14:53:07 2018<br>
New Revision: 336950<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=336950&view=rev" target="_blank">
http://llvm.org/viewvc/llvm-project?rev=336950&view=rev</a><br>
Log:<br>
foo<br>
<br>
Modified:<br>
llvm/trunk/lib/Target/X86/X86InstrAVX512.td<br>
llvm/trunk/lib/Target/X86/X86InstrSSE.td<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=336950&r1=336949&r2=336950&view=diff" target="_blank">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=336950&r1=336949&r2=336950&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Thu Jul 12 14:53:07 2018<br>
@@ -11484,13 +11484,13 @@ multiclass AVX512_scalar_math_fp_pattern<br>
def : Pat<(_.VT (MoveNode (_.VT VR128X:$dst), (_.VT (scalar_to_vector<br>
(Op (_.EltVT (extractelt (_.VT VR128X:$dst), (iPTR 0))),<br>
_.FRC:$src))))),<br>
- (!cast<I>("V"#OpcPrefix#Zrr_Int) _.VT:$dst,<br>
+ (!cast<Instruction>("V"#OpcPrefix#Zrr_Int) _.VT:$dst,<br>
(COPY_TO_REGCLASS _.FRC:$src, VR128X))>;<br>
<br>
// vector math op with insert via movss<br>
def : Pat<(_.VT (MoveNode (_.VT VR128X:$dst),<br>
(Op (_.VT VR128X:$dst), (_.VT VR128X:$src)))),<br>
- (!cast<I>("V"#OpcPrefix#Zrr_Int) _.VT:$dst, _.VT:$src)>;<br>
+ (!cast<Instruction>("V"#OpcPrefix#Zrr_Int) _.VT:$dst, _.VT:$src)>;<br>
<br>
// extracted masked scalar math op with insert via movss<br>
def : Pat<(MoveNode (_.VT VR128X:$src1),<br>
@@ -11499,17 +11499,17 @@ multiclass AVX512_scalar_math_fp_pattern<br>
(Op (_.EltVT (extractelt (_.VT VR128X:$src1), (iPTR 0))),<br>
_.FRC:$src2),<br>
_.FRC:$src0))),<br>
- (!cast<I>("V"#OpcPrefix#Zrr_Intk) (COPY_TO_REGCLASS _.FRC:$src0, VR128X),<br>
+ (!cast<Instruction>("V"#OpcPrefix#Zrr_Intk) (COPY_TO_REGCLASS _.FRC:$src0, VR128X),<br>
VK1WM:$mask, _.VT:$src1,<br>
(COPY_TO_REGCLASS _.FRC:$src2, VR128X))>;<br>
- <br>
+<br>
// extracted masked scalar math op with insert via movss<br>
def : Pat<(MoveNode (_.VT VR128X:$src1),<br>
(scalar_to_vector<br>
(X86selects VK1WM:$mask,<br>
(Op (_.EltVT (extractelt (_.VT VR128X:$src1), (iPTR 0))),<br>
_.FRC:$src2), (_.EltVT ZeroFP)))),<br>
- (!cast<I>("V"#OpcPrefix#Zrr_Intkz) <br>
+ (!cast<Instruction>("V"#OpcPrefix#Zrr_Intkz) <br>
VK1WM:$mask, _.VT:$src1,<br>
(COPY_TO_REGCLASS _.FRC:$src2, VR128X))>;<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=336950&r1=336949&r2=336950&view=diff" target="_blank">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=336950&r1=336949&r2=336950&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Jul 12 14:53:07 2018<br>
@@ -2647,13 +2647,13 @@ multiclass scalar_math_patterns<SDNode O<br>
def : Pat<(VT (Move (VT VR128:$dst), (VT (scalar_to_vector<br>
(Op (EltTy (extractelt (VT VR128:$dst), (iPTR 0))),<br>
RC:$src))))),<br>
- (!cast<I>(OpcPrefix#rr_Int) VT:$dst,<br>
+ (!cast<Instruction>(OpcPrefix#rr_Int) VT:$dst,<br>
(COPY_TO_REGCLASS RC:$src, VR128))>;<br>
<br>
// vector math op with insert via movss/movsd<br>
def : Pat<(VT (Move (VT VR128:$dst),<br>
(Op (VT VR128:$dst), (VT VR128:$src)))),<br>
- (!cast<I>(OpcPrefix#rr_Int) VT:$dst, VT:$src)>;<br>
+ (!cast<Instruction>(OpcPrefix#rr_Int) VT:$dst, VT:$src)>;<br>
}<br>
<br>
// Repeat for AVX versions of the instructions.<br>
@@ -2662,13 +2662,13 @@ multiclass scalar_math_patterns<SDNode O<br>
def : Pat<(VT (Move (VT VR128:$dst), (VT (scalar_to_vector<br>
(Op (EltTy (extractelt (VT VR128:$dst), (iPTR 0))),<br>
RC:$src))))),<br>
- (!cast<I>("V"#OpcPrefix#rr_Int) VT:$dst,<br>
+ (!cast<Instruction>("V"#OpcPrefix#rr_Int) VT:$dst,<br>
(COPY_TO_REGCLASS RC:$src, VR128))>;<br>
<br>
// vector math op with insert via movss/movsd<br>
def : Pat<(VT (Move (VT VR128:$dst),<br>
(Op (VT VR128:$dst), (VT VR128:$src)))),<br>
- (!cast<I>("V"#OpcPrefix#rr_Int) VT:$dst, VT:$src)>;<br>
+ (!cast<Instruction>("V"#OpcPrefix#rr_Int) VT:$dst, VT:$src)>;<br>
}<br>
}<br>
<br>
@@ -2927,14 +2927,14 @@ multiclass scalar_unary_math_patterns<SD<br>
let Predicates = [BasePredicate] in {<br>
def : Pat<(VT (Move VT:$dst, (scalar_to_vector<br>
(OpNode (extractelt VT:$src, 0))))),<br>
- (!cast<I>(OpcPrefix#r_Int) VT:$dst, VT:$src)>;<br>
+ (!cast<Instruction>(OpcPrefix#r_Int) VT:$dst, VT:$src)>;<br>
}<br>
<br>
// Repeat for AVX versions of the instructions.<br>
- let Predicates = [HasAVX] in {<br>
+ let Predicates = [UseAVX] in {<br>
def : Pat<(VT (Move VT:$dst, (scalar_to_vector<br>
(OpNode (extractelt VT:$src, 0))))),<br>
- (!cast<I>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src)>;<br>
+ (!cast<Instruction>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src)>;<br>
}<br>
}<br>
<br>
@@ -2944,14 +2944,14 @@ multiclass scalar_unary_math_imm_pattern<br>
let Predicates = [BasePredicate] in {<br>
def : Pat<(VT (Move VT:$dst, (scalar_to_vector<br>
(OpNode (extractelt VT:$src, 0))))),<br>
- (!cast<Ii8>(OpcPrefix#r_Int) VT:$dst, VT:$src, (i32 ImmV))>;<br>
+ (!cast<Instruction>(OpcPrefix#r_Int) VT:$dst, VT:$src, (i32 ImmV))>;<br>
}<br>
<br>
// Repeat for AVX versions of the instructions.<br>
- let Predicates = [HasAVX] in {<br>
+ let Predicates = [UseAVX] in {<br>
def : Pat<(VT (Move VT:$dst, (scalar_to_vector<br>
(OpNode (extractelt VT:$src, 0))))),<br>
- (!cast<Ii8>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src, (i32 ImmV))>;<br>
+ (!cast<Instruction>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src, (i32 ImmV))>;<br>
}<br>
}<br>
<br>
@@ -2963,13 +2963,13 @@ multiclass scalar_unary_math_intr_patter<br>
Predicate BasePredicate> {<br>
let Predicates = [BasePredicate] in {<br>
def : Pat<(VT (Move VT:$dst, (Intr VT:$src))),<br>
- (!cast<I>(OpcPrefix#r_Int) VT:$dst, VT:$src)>;<br>
+ (!cast<Instruction>(OpcPrefix#r_Int) VT:$dst, VT:$src)>;<br>
}<br>
<br>
// Repeat for AVX versions of the instructions.<br>
let Predicates = [HasAVX] in {<br>
def : Pat<(VT (Move VT:$dst, (Intr VT:$src))),<br>
- (!cast<I>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src)>;<br>
+ (!cast<Instruction>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src)>;<br>
}<br>
}<br>
<br>
<br>
<br>
_______________________________________________<br>
llvm-commits mailing list<br>
<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br>
<a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><o:p></o:p></p>
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