<div dir="ltr">Looks like this got re-reverted as it is breaking LLDB too. I would like to understand it better since we typically rely on Large/PIC for the code model in the JIT, and it has worked historically.<div><br></div><div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-style:solid;border-left-color:rgb(204,204,204);padding-left:1ex">I restricted the MCJIT/eh-lg-pic.ll test to Linux, since the large PIC code model is not implemented for MachO yet.</blockquote><div><br></div><div>What is the source for that claim? I thought the behavior of a relocation model/code-model pair was up to the platform to decide (though in practice if it's not well defined on MachO yet we may want to match Linux's behavior).</div><div><br></div><div>-- Lang.</div><div> </div></div></div><br><div class="gmail_quote"><div dir="ltr">On Mon, Jun 25, 2018 at 11:20 AM Reid Kleckner via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: rnk<br>
Date: Mon Jun 25 11:16:27 2018<br>
New Revision: 335508<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=335508&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=335508&view=rev</a><br>
Log:<br>
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"<br>
<br>
The large code model allows code and data segments to exceed 2GB, which<br>
means that some symbol references may require a displacement that cannot<br>
be encoded as a displacement from RIP. The large PIC model even relaxes<br>
the assumption that the GOT itself is within 2GB of all code. Therefore,<br>
we need a special code sequence to materialize it:<br>
.LtmpN:<br>
leaq .LtmpN(%rip), %rbx<br>
movabsq $_GLOBAL_OFFSET_TABLE_-.LtmpN, %rax # Scratch<br>
addq %rax, %rbx # GOT base reg<br>
<br>
>From that, non-local references go through the GOT base register instead<br>
of being PC-relative loads. Local references typically use GOTOFF<br>
symbols, like this:<br>
movq extern_gv@GOT(%rbx), %rax<br>
movq local_gv@GOTOFF(%rbx), %rax<br>
<br>
All calls end up being indirect:<br>
movabsq $local_fn@GOTOFF, %rax<br>
addq %rbx, %rax<br>
callq *%rax<br>
<br>
The medium code model retains the assumption that the code segment is<br>
less than 2GB, so calls are once again direct, and the RIP-relative<br>
loads can be used to access the GOT. Materializing the GOT is easy:<br>
leaq _GLOBAL_OFFSET_TABLE_(%rip), %rbx # GOT base reg<br>
<br>
DSO local data accesses will use it:<br>
movq local_gv@GOTOFF(%rbx), %rax<br>
<br>
Non-local data accesses will use RIP-relative addressing, which means we<br>
may not always need to materialize the GOT base:<br>
movq extern_gv@GOTPCREL(%rip), %rax<br>
<br>
Direct calls are basically the same as they are in the small code model:<br>
They use direct, PC-relative addressing, and the PLT is used for calls<br>
to non-local functions.<br>
<br>
This patch adds reasonably comprehensive testing of LEA, but there are<br>
lots of interesting folding opportunities that are unimplemented.<br>
<br>
I restricted the MCJIT/eh-lg-pic.ll test to Linux, since the large PIC<br>
code model is not implemented for MachO yet.<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D47211" rel="noreferrer" target="_blank">https://reviews.llvm.org/D47211</a><br>
<br>
Added:<br>
llvm/trunk/test/CodeGen/X86/code-model.ll<br>
Modified:<br>
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp<br>
llvm/trunk/lib/Target/X86/X86InstrCompiler.td<br>
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp<br>
llvm/trunk/lib/Target/X86/X86MCInstLower.cpp<br>
llvm/trunk/lib/Target/X86/X86Subtarget.cpp<br>
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp<br>
llvm/trunk/test/CodeGen/X86/cleanuppad-large-codemodel.ll<br>
llvm/trunk/test/CodeGen/X86/fast-isel-call-cleanup.ll<br>
llvm/trunk/test/CodeGen/X86/fast-isel-constpool.ll<br>
llvm/trunk/test/CodeGen/X86/hipe-cc64.ll<br>
llvm/trunk/test/ExecutionEngine/MCJIT/eh-lg-pic.ll<br>
llvm/trunk/utils/UpdateTestChecks/asm.py<br>
llvm/trunk/utils/update_llc_test_checks.py<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Jun 25 11:16:27 2018<br>
@@ -940,11 +940,13 @@ bool X86DAGToDAGISel::matchWrapper(SDVal<br>
<br>
bool IsRIPRel = N.getOpcode() == X86ISD::WrapperRIP;<br>
<br>
- // Only do this address mode folding for 64-bit if we're in the small code<br>
- // model.<br>
- // FIXME: But we can do GOTPCREL addressing in the medium code model.<br>
+ // We can't use an addressing mode in the 64-bit large code model. In the<br>
+ // medium code model, we use can use an mode when RIP wrappers are present.<br>
+ // That signifies access to globals that are known to be "near", such as the<br>
+ // GOT itself.<br>
CodeModel::Model M = TM.getCodeModel();<br>
- if (Subtarget->is64Bit() && M != CodeModel::Small && M != CodeModel::Kernel)<br>
+ if (Subtarget->is64Bit() &&<br>
+ (M == CodeModel::Large || (M == CodeModel::Medium && !IsRIPRel)))<br>
return true;<br>
<br>
// Base and index reg must be 0 in order to use %rip as base.<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Mon Jun 25 11:16:27 2018<br>
@@ -37,6 +37,10 @@ let hasSideEffects = 0, isNotDuplicable<br>
def MOVPC32r : Ii32<0xE8, Pseudo, (outs GR32:$reg), (ins i32imm:$label),<br>
"", []>;<br>
<br>
+// 64-bit large code model PIC base construction.<br>
+let hasSideEffects = 0, mayLoad = 1, isNotDuplicable = 1, SchedRW = [WriteJump] in<br>
+ def MOVGOT64r : PseudoI<(outs GR64:$reg),<br>
+ (ins GR64:$scratch, i64i32imm_pcrel:$got), []>;<br>
<br>
// ADJCALLSTACKDOWN/UP implicitly use/def ESP because they may be expanded into<br>
// a stack adjustment and the codegen must know that they may modify the stack<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Jun 25 11:16:27 2018<br>
@@ -11239,7 +11239,9 @@ isSafeToMoveRegClassDefs(const TargetReg<br>
/// TODO: Eliminate this and move the code to X86MachineFunctionInfo.<br>
///<br>
unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {<br>
- assert(!Subtarget.is64Bit() &&<br>
+ assert((!Subtarget.is64Bit() ||<br>
+ MF->getTarget().getCodeModel() == CodeModel::Medium ||<br>
+ MF->getTarget().getCodeModel() == CodeModel::Large) &&<br>
"X86-64 PIC uses RIP relative addressing");<br>
<br>
X86MachineFunctionInfo *X86FI = MF->getInfo<X86MachineFunctionInfo>();<br>
@@ -11250,7 +11252,8 @@ unsigned X86InstrInfo::getGlobalBaseReg(<br>
// Create the register. The code to initialize it is inserted<br>
// later, by the CGBR pass (below).<br>
MachineRegisterInfo &RegInfo = MF->getRegInfo();<br>
- GlobalBaseReg = RegInfo.createVirtualRegister(&X86::GR32_NOSPRegClass);<br>
+ GlobalBaseReg = RegInfo.createVirtualRegister(<br>
+ Subtarget.is64Bit() ? &X86::GR64_NOSPRegClass : &X86::GR32_NOSPRegClass);<br>
X86FI->setGlobalBaseReg(GlobalBaseReg);<br>
return GlobalBaseReg;<br>
}<br>
@@ -12624,9 +12627,10 @@ namespace {<br>
static_cast<const X86TargetMachine *>(&MF.getTarget());<br>
const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();<br>
<br>
- // Don't do anything if this is 64-bit as 64-bit PIC<br>
- // uses RIP relative addressing.<br>
- if (STI.is64Bit())<br>
+ // Don't do anything in the 64-bit small and kernel code models. They use<br>
+ // RIP-relative addressing for everything.<br>
+ if (STI.is64Bit() && (TM->getCodeModel() == CodeModel::Small ||<br>
+ TM->getCodeModel() == CodeModel::Kernel))<br>
return false;<br>
<br>
// Only emit a global base reg in PIC mode.<br>
@@ -12653,17 +12657,41 @@ namespace {<br>
else<br>
PC = GlobalBaseReg;<br>
<br>
- // Operand of MovePCtoStack is completely ignored by asm printer. It's<br>
- // only used in JIT code emission as displacement to pc.<br>
- BuildMI(FirstMBB, MBBI, DL, TII->get(X86::MOVPC32r), PC).addImm(0);<br>
-<br>
- // If we're using vanilla 'GOT' PIC style, we should use relative addressing<br>
- // not to pc, but to _GLOBAL_OFFSET_TABLE_ external.<br>
- if (STI.isPICStyleGOT()) {<br>
- // Generate addl $__GLOBAL_OFFSET_TABLE_ + [.-piclabel], %some_register<br>
- BuildMI(FirstMBB, MBBI, DL, TII->get(X86::ADD32ri), GlobalBaseReg)<br>
- .addReg(PC).addExternalSymbol("_GLOBAL_OFFSET_TABLE_",<br>
- X86II::MO_GOT_ABSOLUTE_ADDRESS);<br>
+ if (STI.is64Bit()) {<br>
+ if (TM->getCodeModel() == CodeModel::Medium) {<br>
+ // In the medium code model, use a RIP-relative LEA to materialize the<br>
+ // GOT.<br>
+ BuildMI(FirstMBB, MBBI, DL, TII->get(X86::LEA64r), PC)<br>
+ .addReg(X86::RIP)<br>
+ .addImm(0)<br>
+ .addReg(0)<br>
+ .addExternalSymbol("_GLOBAL_OFFSET_TABLE_")<br>
+ .addReg(0);<br>
+ } else if (TM->getCodeModel() == CodeModel::Large) {<br>
+ // Loading the GOT in the large code model requires math with labels,<br>
+ // so we use a pseudo instruction and expand it during MC emission.<br>
+ unsigned Scratch = RegInfo.createVirtualRegister(&X86::GR64RegClass);<br>
+ BuildMI(FirstMBB, MBBI, DL, TII->get(X86::MOVGOT64r), PC)<br>
+ .addReg(Scratch, RegState::Undef | RegState::Define)<br>
+ .addExternalSymbol("_GLOBAL_OFFSET_TABLE_");<br>
+ } else {<br>
+ llvm_unreachable("unexpected code model");<br>
+ }<br>
+ } else {<br>
+ // Operand of MovePCtoStack is completely ignored by asm printer. It's<br>
+ // only used in JIT code emission as displacement to pc.<br>
+ BuildMI(FirstMBB, MBBI, DL, TII->get(X86::MOVPC32r), PC).addImm(0);<br>
+<br>
+ // If we're using vanilla 'GOT' PIC style, we should use relative<br>
+ // addressing not to pc, but to _GLOBAL_OFFSET_TABLE_ external.<br>
+ if (STI.isPICStyleGOT()) {<br>
+ // Generate addl $__GLOBAL_OFFSET_TABLE_ + [.-piclabel],<br>
+ // %some_register<br>
+ BuildMI(FirstMBB, MBBI, DL, TII->get(X86::ADD32ri), GlobalBaseReg)<br>
+ .addReg(PC)<br>
+ .addExternalSymbol("_GLOBAL_OFFSET_TABLE_",<br>
+ X86II::MO_GOT_ABSOLUTE_ADDRESS);<br>
+ }<br>
}<br>
<br>
return true;<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86MCInstLower.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCInstLower.cpp?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCInstLower.cpp?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86MCInstLower.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86MCInstLower.cpp Mon Jun 25 11:16:27 2018<br>
@@ -1982,6 +1982,41 @@ void X86AsmPrinter::EmitInstruction(cons<br>
return;<br>
}<br>
<br>
+ case X86::MOVGOT64r: {<br>
+ // Materializes the GOT for the 64-bit large code model.<br>
+ MCSymbol *DotSym = OutContext.createTempSymbol();<br>
+ OutStreamer->EmitLabel(DotSym);<br>
+<br>
+ unsigned DstReg = MI->getOperand(0).getReg();<br>
+ unsigned ScratchReg = MI->getOperand(1).getReg();<br>
+ MCSymbol *GOTSym = MCInstLowering.GetSymbolFromOperand(MI->getOperand(2));<br>
+<br>
+ // .LtmpN: leaq .LtmpN(%rip), %dst<br>
+ const MCExpr *DotExpr = MCSymbolRefExpr::create(DotSym, OutContext);<br>
+ EmitAndCountInstruction(MCInstBuilder(X86::LEA64r)<br>
+ .addReg(DstReg) // dest<br>
+ .addReg(X86::RIP) // base<br>
+ .addImm(1) // scale<br>
+ .addReg(0) // index<br>
+ .addExpr(DotExpr) // disp<br>
+ .addReg(0)); // seg<br>
+<br>
+ // movq $_GLOBAL_OFFSET_TABLE_ - .LtmpN, %scratch<br>
+ const MCExpr *GOTSymExpr = MCSymbolRefExpr::create(GOTSym, OutContext);<br>
+ const MCExpr *GOTDiffExpr =<br>
+ MCBinaryExpr::createSub(GOTSymExpr, DotExpr, OutContext);<br>
+ EmitAndCountInstruction(MCInstBuilder(X86::MOV64ri)<br>
+ .addReg(ScratchReg) // dest<br>
+ .addExpr(GOTDiffExpr)); // disp<br>
+<br>
+ // addq %scratch, %dst<br>
+ EmitAndCountInstruction(MCInstBuilder(X86::ADD64rr)<br>
+ .addReg(DstReg) // dest<br>
+ .addReg(DstReg) // dest<br>
+ .addReg(ScratchReg)); // src<br>
+ return;<br>
+ }<br>
+<br>
case X86::ADD32ri: {<br>
// Lower the MO_GOT_ABSOLUTE_ADDRESS form of ADD32ri.<br>
if (MI->getOperand(2).getTargetFlags() != X86II::MO_GOT_ABSOLUTE_ADDRESS)<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Mon Jun 25 11:16:27 2018<br>
@@ -68,15 +68,31 @@ X86Subtarget::classifyGlobalReference(co<br>
<br>
unsigned char<br>
X86Subtarget::classifyLocalReference(const GlobalValue *GV) const {<br>
- // 64 bits can use %rip addressing for anything local.<br>
- if (is64Bit())<br>
- return X86II::MO_NO_FLAG;<br>
-<br>
- // If this is for a position dependent executable, the static linker can<br>
- // figure it out.<br>
+ // If we're not PIC, it's not very interesting.<br>
if (!isPositionIndependent())<br>
return X86II::MO_NO_FLAG;<br>
<br>
+ // For 64-bit, we need to consider the code model.<br>
+ if (is64Bit()) {<br>
+ switch (TM.getCodeModel()) {<br>
+ // 64-bit small code model is simple: All rip-relative.<br>
+ case CodeModel::Small:<br>
+ case CodeModel::Kernel:<br>
+ return X86II::MO_NO_FLAG;<br>
+<br>
+ // The large PIC code model uses GOTOFF.<br>
+ case CodeModel::Large:<br>
+ return X86II::MO_GOTOFF;<br>
+<br>
+ // Medium is a hybrid: RIP-rel for code, GOTOFF for DSO local data.<br>
+ case CodeModel::Medium:<br>
+ if (isa<Function>(GV))<br>
+ return X86II::MO_NO_FLAG; // All code is RIP-relative<br>
+ return X86II::MO_GOTOFF; // Local symbols use GOTOFF.<br>
+ }<br>
+ llvm_unreachable("invalid code model");<br>
+ }<br>
+<br>
// The COFF dynamic linker just patches the executable sections.<br>
if (isTargetCOFF())<br>
return X86II::MO_NO_FLAG;<br>
@@ -97,8 +113,8 @@ X86Subtarget::classifyLocalReference(con<br>
<br>
unsigned char X86Subtarget::classifyGlobalReference(const GlobalValue *GV,<br>
const Module &M) const {<br>
- // Large model never uses stubs.<br>
- if (TM.getCodeModel() == CodeModel::Large)<br>
+ // The static large model never uses stubs.<br>
+ if (TM.getCodeModel() == CodeModel::Large && !isPositionIndependent())<br>
return X86II::MO_NO_FLAG;<br>
<br>
// Absolute symbols can be referenced directly.<br>
@@ -120,7 +136,7 @@ unsigned char X86Subtarget::classifyGlob<br>
if (isTargetCOFF())<br>
return X86II::MO_DLLIMPORT;<br>
<br>
- if (is64Bit())<br>
+ if (is64Bit() && TM.getCodeModel() != CodeModel::Large)<br>
return X86II::MO_GOTPCREL;<br>
<br>
if (isTargetDarwin()) {<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Mon Jun 25 11:16:27 2018<br>
@@ -156,9 +156,15 @@ static std::string computeDataLayout(con<br>
}<br>
<br>
static Reloc::Model getEffectiveRelocModel(const Triple &TT,<br>
+ bool JIT,<br>
Optional<Reloc::Model> RM) {<br>
bool is64Bit = TT.getArch() == Triple::x86_64;<br>
if (!RM.hasValue()) {<br>
+ // JIT codegen should use static relocations by default, since it's<br>
+ // typically executed in process and not relocatable.<br>
+ if (JIT)<br>
+ return Reloc::Static;<br>
+<br>
// Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode.<br>
// Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we<br>
// use static relocation model by default.<br>
@@ -210,7 +216,7 @@ X86TargetMachine::X86TargetMachine(const<br>
CodeGenOpt::Level OL, bool JIT)<br>
: LLVMTargetMachine(<br>
T, computeDataLayout(TT), TT, CPU, FS, Options,<br>
- getEffectiveRelocModel(TT, RM),<br>
+ getEffectiveRelocModel(TT, JIT, RM),<br>
getEffectiveCodeModel(CM, JIT, TT.getArch() == Triple::x86_64), OL),<br>
TLOF(createTLOF(getTargetTriple())) {<br>
// Windows stack unwinder gets confused when execution flow "falls through"<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/cleanuppad-large-codemodel.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cleanuppad-large-codemodel.ll?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cleanuppad-large-codemodel.ll?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/cleanuppad-large-codemodel.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/cleanuppad-large-codemodel.ll Mon Jun 25 11:16:27 2018<br>
@@ -1,4 +1,4 @@<br>
-; RUN: llc -mtriple=x86_64-pc-windows-msvc -code-model=large -o - < %s | FileCheck %s<br>
+; RUN: llc -mtriple=x86_64-pc-windows-msvc -code-model=large -relocation-model=static -o - < %s | FileCheck %s<br>
<br>
declare i32 @__CxxFrameHandler3(...)<br>
<br>
<br>
Added: llvm/trunk/test/CodeGen/X86/code-model.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/code-model.ll?rev=335508&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/code-model.ll?rev=335508&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/code-model.ll (added)<br>
+++ llvm/trunk/test/CodeGen/X86/code-model.ll Mon Jun 25 11:16:27 2018<br>
@@ -0,0 +1,384 @@<br>
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py<br>
+; Run with --no_x86_scrub_rip because we care a lot about how globals are<br>
+; accessed in the code model.<br>
+<br>
+; RUN: llc < %s -relocation-model=static -code-model=small | FileCheck %s --check-prefix=CHECK --check-prefix=SMALL-STATIC<br>
+; RUN: llc < %s -relocation-model=static -code-model=medium | FileCheck %s --check-prefix=CHECK --check-prefix=MEDIUM-STATIC<br>
+; RUN: llc < %s -relocation-model=static -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-STATIC<br>
+; RUN: llc < %s -relocation-model=pic -code-model=small | FileCheck %s --check-prefix=CHECK --check-prefix=SMALL-PIC<br>
+; RUN: llc < %s -relocation-model=pic -code-model=medium | FileCheck %s --check-prefix=CHECK --check-prefix=MEDIUM-PIC<br>
+; RUN: llc < %s -relocation-model=pic -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-PIC<br>
+<br>
+; Generated from this C source:<br>
+;<br>
+; static int static_data[10];<br>
+; int global_data[10] = {1, 2};<br>
+; extern int extern_data[10];<br>
+;<br>
+; int *lea_static_data() { return &static_data[0]; }<br>
+; int *lea_global_data() { return &global_data[0]; }<br>
+; int *lea_extern_data() { return &extern_data[0]; }<br>
+;<br>
+; static void static_fn(void) {}<br>
+; void global_fn(void) {}<br>
+; void extern_fn(void);<br>
+;<br>
+; typedef void (*void_fn)(void);<br>
+; void_fn lea_static_fn() { return &static_fn; }<br>
+; void_fn lea_global_fn() { return &global_fn; }<br>
+; void_fn lea_extern_fn() { return &extern_fn; }<br>
+<br>
+<br>
+; ModuleID = 'model.c'<br>
+source_filename = "model.c"<br>
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"<br>
+target triple = "x86_64--linux"<br>
+<br>
+@global_data = dso_local global [10 x i32] [i32 1, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0], align 16<br>
+@static_data = internal global [10 x i32] zeroinitializer, align 16<br>
+@extern_data = external global [10 x i32], align 16<br>
+<br>
+define dso_local i32* @lea_static_data() #0 {<br>
+; SMALL-STATIC-LABEL: lea_static_data:<br>
+; SMALL-STATIC: # %bb.0:<br>
+; SMALL-STATIC-NEXT: movl $static_data, %eax<br>
+; SMALL-STATIC-NEXT: retq<br>
+;<br>
+; MEDIUM-STATIC-LABEL: lea_static_data:<br>
+; MEDIUM-STATIC: # %bb.0:<br>
+; MEDIUM-STATIC-NEXT: movabsq $static_data, %rax<br>
+; MEDIUM-STATIC-NEXT: retq<br>
+;<br>
+; LARGE-STATIC-LABEL: lea_static_data:<br>
+; LARGE-STATIC: # %bb.0:<br>
+; LARGE-STATIC-NEXT: movabsq $static_data, %rax<br>
+; LARGE-STATIC-NEXT: retq<br>
+;<br>
+; SMALL-PIC-LABEL: lea_static_data:<br>
+; SMALL-PIC: # %bb.0:<br>
+; SMALL-PIC-NEXT: leaq static_data(%rip), %rax<br>
+; SMALL-PIC-NEXT: retq<br>
+;<br>
+; MEDIUM-PIC-LABEL: lea_static_data:<br>
+; MEDIUM-PIC: # %bb.0:<br>
+; MEDIUM-PIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx<br>
+; MEDIUM-PIC-NEXT: movabsq $static_data@GOTOFF, %rax<br>
+; MEDIUM-PIC-NEXT: addq %rcx, %rax<br>
+; MEDIUM-PIC-NEXT: retq<br>
+;<br>
+; LARGE-PIC-LABEL: lea_static_data:<br>
+; LARGE-PIC: # %bb.0:<br>
+; LARGE-PIC-NEXT: .Ltmp0:<br>
+; LARGE-PIC-NEXT: leaq .Ltmp0(%rip), %rcx<br>
+; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp0, %rax<br>
+; LARGE-PIC-NEXT: addq %rax, %rcx<br>
+; LARGE-PIC-NEXT: movabsq $static_data@GOTOFF, %rax<br>
+; LARGE-PIC-NEXT: addq %rcx, %rax<br>
+; LARGE-PIC-NEXT: retq<br>
+ ret i32* getelementptr inbounds ([10 x i32], [10 x i32]* @static_data, i64 0, i64 0)<br>
+}<br>
+<br>
+define dso_local i32* @lea_global_data() #0 {<br>
+; SMALL-STATIC-LABEL: lea_global_data:<br>
+; SMALL-STATIC: # %bb.0:<br>
+; SMALL-STATIC-NEXT: movl $global_data, %eax<br>
+; SMALL-STATIC-NEXT: retq<br>
+;<br>
+; MEDIUM-STATIC-LABEL: lea_global_data:<br>
+; MEDIUM-STATIC: # %bb.0:<br>
+; MEDIUM-STATIC-NEXT: movabsq $global_data, %rax<br>
+; MEDIUM-STATIC-NEXT: retq<br>
+;<br>
+; LARGE-STATIC-LABEL: lea_global_data:<br>
+; LARGE-STATIC: # %bb.0:<br>
+; LARGE-STATIC-NEXT: movabsq $global_data, %rax<br>
+; LARGE-STATIC-NEXT: retq<br>
+;<br>
+; SMALL-PIC-LABEL: lea_global_data:<br>
+; SMALL-PIC: # %bb.0:<br>
+; SMALL-PIC-NEXT: leaq global_data(%rip), %rax<br>
+; SMALL-PIC-NEXT: retq<br>
+;<br>
+; MEDIUM-PIC-LABEL: lea_global_data:<br>
+; MEDIUM-PIC: # %bb.0:<br>
+; MEDIUM-PIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx<br>
+; MEDIUM-PIC-NEXT: movabsq $global_data@GOTOFF, %rax<br>
+; MEDIUM-PIC-NEXT: addq %rcx, %rax<br>
+; MEDIUM-PIC-NEXT: retq<br>
+;<br>
+; LARGE-PIC-LABEL: lea_global_data:<br>
+; LARGE-PIC: # %bb.0:<br>
+; LARGE-PIC-NEXT: .Ltmp1:<br>
+; LARGE-PIC-NEXT: leaq .Ltmp1(%rip), %rcx<br>
+; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp1, %rax<br>
+; LARGE-PIC-NEXT: addq %rax, %rcx<br>
+; LARGE-PIC-NEXT: movabsq $global_data@GOTOFF, %rax<br>
+; LARGE-PIC-NEXT: addq %rcx, %rax<br>
+; LARGE-PIC-NEXT: retq<br>
+ ret i32* getelementptr inbounds ([10 x i32], [10 x i32]* @global_data, i64 0, i64 0)<br>
+}<br>
+<br>
+define dso_local i32* @lea_extern_data() #0 {<br>
+; SMALL-STATIC-LABEL: lea_extern_data:<br>
+; SMALL-STATIC: # %bb.0:<br>
+; SMALL-STATIC-NEXT: movl $extern_data, %eax<br>
+; SMALL-STATIC-NEXT: retq<br>
+;<br>
+; MEDIUM-STATIC-LABEL: lea_extern_data:<br>
+; MEDIUM-STATIC: # %bb.0:<br>
+; MEDIUM-STATIC-NEXT: movabsq $extern_data, %rax<br>
+; MEDIUM-STATIC-NEXT: retq<br>
+;<br>
+; LARGE-STATIC-LABEL: lea_extern_data:<br>
+; LARGE-STATIC: # %bb.0:<br>
+; LARGE-STATIC-NEXT: movabsq $extern_data, %rax<br>
+; LARGE-STATIC-NEXT: retq<br>
+;<br>
+; SMALL-PIC-LABEL: lea_extern_data:<br>
+; SMALL-PIC: # %bb.0:<br>
+; SMALL-PIC-NEXT: movq extern_data@GOTPCREL(%rip), %rax<br>
+; SMALL-PIC-NEXT: retq<br>
+;<br>
+; MEDIUM-PIC-LABEL: lea_extern_data:<br>
+; MEDIUM-PIC: # %bb.0:<br>
+; MEDIUM-PIC-NEXT: movq extern_data@GOTPCREL(%rip), %rax<br>
+; MEDIUM-PIC-NEXT: retq<br>
+;<br>
+; LARGE-PIC-LABEL: lea_extern_data:<br>
+; LARGE-PIC: # %bb.0:<br>
+; LARGE-PIC-NEXT: .Ltmp2:<br>
+; LARGE-PIC-NEXT: leaq .Ltmp2(%rip), %rax<br>
+; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp2, %rcx<br>
+; LARGE-PIC-NEXT: addq %rcx, %rax<br>
+; LARGE-PIC-NEXT: movabsq $extern_data@GOT, %rcx<br>
+; LARGE-PIC-NEXT: movq (%rax,%rcx), %rax<br>
+; LARGE-PIC-NEXT: retq<br>
+ ret i32* getelementptr inbounds ([10 x i32], [10 x i32]* @extern_data, i64 0, i64 0)<br>
+}<br>
+<br>
+define dso_local i32 @load_global_data() #0 {<br>
+; SMALL-STATIC-LABEL: load_global_data:<br>
+; SMALL-STATIC: # %bb.0:<br>
+; SMALL-STATIC-NEXT: movl global_data+8(%rip), %eax<br>
+; SMALL-STATIC-NEXT: retq<br>
+;<br>
+; MEDIUM-STATIC-LABEL: load_global_data:<br>
+; MEDIUM-STATIC: # %bb.0:<br>
+; MEDIUM-STATIC-NEXT: movabsq $global_data, %rax<br>
+; MEDIUM-STATIC-NEXT: movl 8(%rax), %eax<br>
+; MEDIUM-STATIC-NEXT: retq<br>
+;<br>
+; LARGE-STATIC-LABEL: load_global_data:<br>
+; LARGE-STATIC: # %bb.0:<br>
+; LARGE-STATIC-NEXT: movabsq $global_data, %rax<br>
+; LARGE-STATIC-NEXT: movl 8(%rax), %eax<br>
+; LARGE-STATIC-NEXT: retq<br>
+;<br>
+; SMALL-PIC-LABEL: load_global_data:<br>
+; SMALL-PIC: # %bb.0:<br>
+; SMALL-PIC-NEXT: movl global_data+8(%rip), %eax<br>
+; SMALL-PIC-NEXT: retq<br>
+;<br>
+; MEDIUM-PIC-LABEL: load_global_data:<br>
+; MEDIUM-PIC: # %bb.0:<br>
+; MEDIUM-PIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax<br>
+; MEDIUM-PIC-NEXT: movabsq $global_data@GOTOFF, %rcx<br>
+; MEDIUM-PIC-NEXT: movl 8(%rax,%rcx), %eax<br>
+; MEDIUM-PIC-NEXT: retq<br>
+;<br>
+; LARGE-PIC-LABEL: load_global_data:<br>
+; LARGE-PIC: # %bb.0:<br>
+; LARGE-PIC-NEXT: .Ltmp3:<br>
+; LARGE-PIC-NEXT: leaq .Ltmp3(%rip), %rax<br>
+; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp3, %rcx<br>
+; LARGE-PIC-NEXT: addq %rcx, %rax<br>
+; LARGE-PIC-NEXT: movabsq $global_data@GOTOFF, %rcx<br>
+; LARGE-PIC-NEXT: movl 8(%rax,%rcx), %eax<br>
+; LARGE-PIC-NEXT: retq<br>
+ %rv = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @global_data, i64 0, i64 2)<br>
+ ret i32 %rv<br>
+}<br>
+<br>
+define dso_local i32 @load_extern_data() #0 {<br>
+; SMALL-STATIC-LABEL: load_extern_data:<br>
+; SMALL-STATIC: # %bb.0:<br>
+; SMALL-STATIC-NEXT: movl extern_data+8(%rip), %eax<br>
+; SMALL-STATIC-NEXT: retq<br>
+;<br>
+; MEDIUM-STATIC-LABEL: load_extern_data:<br>
+; MEDIUM-STATIC: # %bb.0:<br>
+; MEDIUM-STATIC-NEXT: movabsq $extern_data, %rax<br>
+; MEDIUM-STATIC-NEXT: movl 8(%rax), %eax<br>
+; MEDIUM-STATIC-NEXT: retq<br>
+;<br>
+; LARGE-STATIC-LABEL: load_extern_data:<br>
+; LARGE-STATIC: # %bb.0:<br>
+; LARGE-STATIC-NEXT: movabsq $extern_data, %rax<br>
+; LARGE-STATIC-NEXT: movl 8(%rax), %eax<br>
+; LARGE-STATIC-NEXT: retq<br>
+;<br>
+; SMALL-PIC-LABEL: load_extern_data:<br>
+; SMALL-PIC: # %bb.0:<br>
+; SMALL-PIC-NEXT: movq extern_data@GOTPCREL(%rip), %rax<br>
+; SMALL-PIC-NEXT: movl 8(%rax), %eax<br>
+; SMALL-PIC-NEXT: retq<br>
+;<br>
+; MEDIUM-PIC-LABEL: load_extern_data:<br>
+; MEDIUM-PIC: # %bb.0:<br>
+; MEDIUM-PIC-NEXT: movq extern_data@GOTPCREL(%rip), %rax<br>
+; MEDIUM-PIC-NEXT: movl 8(%rax), %eax<br>
+; MEDIUM-PIC-NEXT: retq<br>
+;<br>
+; LARGE-PIC-LABEL: load_extern_data:<br>
+; LARGE-PIC: # %bb.0:<br>
+; LARGE-PIC-NEXT: .Ltmp4:<br>
+; LARGE-PIC-NEXT: leaq .Ltmp4(%rip), %rax<br>
+; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp4, %rcx<br>
+; LARGE-PIC-NEXT: addq %rcx, %rax<br>
+; LARGE-PIC-NEXT: movabsq $extern_data@GOT, %rcx<br>
+; LARGE-PIC-NEXT: movq (%rax,%rcx), %rax<br>
+; LARGE-PIC-NEXT: movl 8(%rax), %eax<br>
+; LARGE-PIC-NEXT: retq<br>
+ %rv = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @extern_data, i64 0, i64 2)<br>
+ ret i32 %rv<br>
+}<br>
+<br>
+define dso_local void @global_fn() #0 {<br>
+; CHECK-LABEL: global_fn:<br>
+; CHECK: # %bb.0:<br>
+; CHECK-NEXT: retq<br>
+ ret void<br>
+}<br>
+<br>
+define internal void @static_fn() #0 {<br>
+; CHECK-LABEL: static_fn:<br>
+; CHECK: # %bb.0:<br>
+; CHECK-NEXT: retq<br>
+ ret void<br>
+}<br>
+<br>
+declare void @extern_fn()<br>
+<br>
+define dso_local void ()* @lea_static_fn() #0 {<br>
+; SMALL-STATIC-LABEL: lea_static_fn:<br>
+; SMALL-STATIC: # %bb.0:<br>
+; SMALL-STATIC-NEXT: movl $static_fn, %eax<br>
+; SMALL-STATIC-NEXT: retq<br>
+;<br>
+; MEDIUM-STATIC-LABEL: lea_static_fn:<br>
+; MEDIUM-STATIC: # %bb.0:<br>
+; MEDIUM-STATIC-NEXT: movabsq $static_fn, %rax<br>
+; MEDIUM-STATIC-NEXT: retq<br>
+;<br>
+; LARGE-STATIC-LABEL: lea_static_fn:<br>
+; LARGE-STATIC: # %bb.0:<br>
+; LARGE-STATIC-NEXT: movabsq $static_fn, %rax<br>
+; LARGE-STATIC-NEXT: retq<br>
+;<br>
+; SMALL-PIC-LABEL: lea_static_fn:<br>
+; SMALL-PIC: # %bb.0:<br>
+; SMALL-PIC-NEXT: leaq static_fn(%rip), %rax<br>
+; SMALL-PIC-NEXT: retq<br>
+;<br>
+; MEDIUM-PIC-LABEL: lea_static_fn:<br>
+; MEDIUM-PIC: # %bb.0:<br>
+; MEDIUM-PIC-NEXT: movabsq $static_fn, %rax<br>
+; MEDIUM-PIC-NEXT: retq<br>
+;<br>
+; LARGE-PIC-LABEL: lea_static_fn:<br>
+; LARGE-PIC: # %bb.0:<br>
+; LARGE-PIC-NEXT: .Ltmp5:<br>
+; LARGE-PIC-NEXT: leaq .Ltmp5(%rip), %rcx<br>
+; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp5, %rax<br>
+; LARGE-PIC-NEXT: addq %rax, %rcx<br>
+; LARGE-PIC-NEXT: movabsq $static_fn@GOTOFF, %rax<br>
+; LARGE-PIC-NEXT: addq %rcx, %rax<br>
+; LARGE-PIC-NEXT: retq<br>
+ ret void ()* @static_fn<br>
+}<br>
+<br>
+define dso_local void ()* @lea_global_fn() #0 {<br>
+; SMALL-STATIC-LABEL: lea_global_fn:<br>
+; SMALL-STATIC: # %bb.0:<br>
+; SMALL-STATIC-NEXT: movl $global_fn, %eax<br>
+; SMALL-STATIC-NEXT: retq<br>
+;<br>
+; MEDIUM-STATIC-LABEL: lea_global_fn:<br>
+; MEDIUM-STATIC: # %bb.0:<br>
+; MEDIUM-STATIC-NEXT: movabsq $global_fn, %rax<br>
+; MEDIUM-STATIC-NEXT: retq<br>
+;<br>
+; LARGE-STATIC-LABEL: lea_global_fn:<br>
+; LARGE-STATIC: # %bb.0:<br>
+; LARGE-STATIC-NEXT: movabsq $global_fn, %rax<br>
+; LARGE-STATIC-NEXT: retq<br>
+;<br>
+; SMALL-PIC-LABEL: lea_global_fn:<br>
+; SMALL-PIC: # %bb.0:<br>
+; SMALL-PIC-NEXT: leaq global_fn(%rip), %rax<br>
+; SMALL-PIC-NEXT: retq<br>
+;<br>
+; MEDIUM-PIC-LABEL: lea_global_fn:<br>
+; MEDIUM-PIC: # %bb.0:<br>
+; MEDIUM-PIC-NEXT: movabsq $global_fn, %rax<br>
+; MEDIUM-PIC-NEXT: retq<br>
+;<br>
+; LARGE-PIC-LABEL: lea_global_fn:<br>
+; LARGE-PIC: # %bb.0:<br>
+; LARGE-PIC-NEXT: .Ltmp6:<br>
+; LARGE-PIC-NEXT: leaq .Ltmp6(%rip), %rcx<br>
+; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp6, %rax<br>
+; LARGE-PIC-NEXT: addq %rax, %rcx<br>
+; LARGE-PIC-NEXT: movabsq $global_fn@GOTOFF, %rax<br>
+; LARGE-PIC-NEXT: addq %rcx, %rax<br>
+; LARGE-PIC-NEXT: retq<br>
+ ret void ()* @global_fn<br>
+}<br>
+<br>
+define dso_local void ()* @lea_extern_fn() #0 {<br>
+; SMALL-STATIC-LABEL: lea_extern_fn:<br>
+; SMALL-STATIC: # %bb.0:<br>
+; SMALL-STATIC-NEXT: movl $extern_fn, %eax<br>
+; SMALL-STATIC-NEXT: retq<br>
+;<br>
+; MEDIUM-STATIC-LABEL: lea_extern_fn:<br>
+; MEDIUM-STATIC: # %bb.0:<br>
+; MEDIUM-STATIC-NEXT: movabsq $extern_fn, %rax<br>
+; MEDIUM-STATIC-NEXT: retq<br>
+;<br>
+; LARGE-STATIC-LABEL: lea_extern_fn:<br>
+; LARGE-STATIC: # %bb.0:<br>
+; LARGE-STATIC-NEXT: movabsq $extern_fn, %rax<br>
+; LARGE-STATIC-NEXT: retq<br>
+;<br>
+; SMALL-PIC-LABEL: lea_extern_fn:<br>
+; SMALL-PIC: # %bb.0:<br>
+; SMALL-PIC-NEXT: movq extern_fn@GOTPCREL(%rip), %rax<br>
+; SMALL-PIC-NEXT: retq<br>
+;<br>
+; MEDIUM-PIC-LABEL: lea_extern_fn:<br>
+; MEDIUM-PIC: # %bb.0:<br>
+; MEDIUM-PIC-NEXT: movq extern_fn@GOTPCREL(%rip), %rax<br>
+; MEDIUM-PIC-NEXT: retq<br>
+;<br>
+; LARGE-PIC-LABEL: lea_extern_fn:<br>
+; LARGE-PIC: # %bb.0:<br>
+; LARGE-PIC-NEXT: .Ltmp7:<br>
+; LARGE-PIC-NEXT: leaq .Ltmp7(%rip), %rax<br>
+; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp7, %rcx<br>
+; LARGE-PIC-NEXT: addq %rcx, %rax<br>
+; LARGE-PIC-NEXT: movabsq $extern_fn@GOT, %rcx<br>
+; LARGE-PIC-NEXT: movq (%rax,%rcx), %rax<br>
+; LARGE-PIC-NEXT: retq<br>
+ ret void ()* @extern_fn<br>
+}<br>
+<br>
+attributes #0 = { noinline nounwind uwtable }<br>
+<br>
+!llvm.module.flags = !{!0, !1, !2}<br>
+!llvm.ident = !{!3}<br>
+<br>
+!0 = !{i32 1, !"wchar_size", i32 4}<br>
+!1 = !{i32 7, !"PIC Level", i32 2}<br>
+!2 = !{i32 7, !"PIE Level", i32 2}<br>
+!3 = !{!"clang version 7.0.0 "}<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-call-cleanup.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-call-cleanup.ll?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-call-cleanup.ll?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/fast-isel-call-cleanup.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/fast-isel-call-cleanup.ll Mon Jun 25 11:16:27 2018<br>
@@ -1,4 +1,4 @@<br>
-; RUN: llc -fast-isel-sink-local-values -fast-isel -O0 -code-model=large -mcpu=generic -mtriple=x86_64-apple-darwin10 -relocation-model=pic < %s | FileCheck %s<br>
+; RUN: llc -fast-isel-sink-local-values -fast-isel -O0 -code-model=large -mcpu=generic -mtriple=x86_64-linux -relocation-model=static < %s | FileCheck %s<br>
<br>
; Check that fast-isel cleans up when it fails to lower a call instruction.<br>
define void @fastiselcall() {<br>
@@ -9,7 +9,7 @@ entry:<br>
; FastISel's local value code was dead, so it's gone.<br>
; CHECK-NOT: movl $42,<br>
; SDag-ISel's arg mov:<br>
-; CHECK: movabsq $_targetfn, %[[REG:[^ ]*]]<br>
+; CHECK: movabsq $targetfn, %[[REG:[^ ]*]]<br>
; CHECK: movl $42, %edi<br>
; CHECK: callq *%[[REG]]<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-constpool.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-constpool.ll?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-constpool.ll?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/fast-isel-constpool.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/fast-isel-constpool.ll Mon Jun 25 11:16:27 2018<br>
@@ -16,7 +16,11 @@ define float @constpool_float(float %x)<br>
;<br>
; LARGE-LABEL: constpool_float:<br>
; LARGE: ## %bb.0:<br>
-; LARGE-NEXT: movabsq $LCPI0_0, %rax<br>
+; LARGE-NEXT: Ltmp0:<br>
+; LARGE-NEXT: leaq {{.*}}(%rip), %rax<br>
+; LARGE-NEXT: movabsq $__GLOBAL_OFFSET_TABLE_-Ltmp0, %rcx<br>
+; LARGE-NEXT: addq %rcx, %rax<br>
+; LARGE-NEXT: movabsq $LCPI0_0@GOTOFF, %rax<br>
; LARGE-NEXT: addss (%rax), %xmm0<br>
; LARGE-NEXT: retq<br>
;<br>
@@ -28,7 +32,11 @@ define float @constpool_float(float %x)<br>
;<br>
; LARGE_AVX-LABEL: constpool_float:<br>
; LARGE_AVX: ## %bb.0:<br>
-; LARGE_AVX-NEXT: movabsq $LCPI0_0, %rax<br>
+; LARGE_AVX-NEXT: Ltmp0:<br>
+; LARGE_AVX-NEXT: leaq {{.*}}(%rip), %rax<br>
+; LARGE_AVX-NEXT: movabsq $__GLOBAL_OFFSET_TABLE_-Ltmp0, %rcx<br>
+; LARGE_AVX-NEXT: addq %rcx, %rax<br>
+; LARGE_AVX-NEXT: movabsq $LCPI0_0@GOTOFF, %rax<br>
; LARGE_AVX-NEXT: vaddss (%rax), %xmm0, %xmm0<br>
; LARGE_AVX-NEXT: retq<br>
<br>
@@ -45,7 +53,11 @@ define double @constpool_double(double %<br>
;<br>
; LARGE-LABEL: constpool_double:<br>
; LARGE: ## %bb.0:<br>
-; LARGE-NEXT: movabsq $LCPI1_0, %rax<br>
+; LARGE-NEXT: Ltmp1:<br>
+; LARGE-NEXT: leaq {{.*}}(%rip), %rax<br>
+; LARGE-NEXT: movabsq $__GLOBAL_OFFSET_TABLE_-Ltmp1, %rcx<br>
+; LARGE-NEXT: addq %rcx, %rax<br>
+; LARGE-NEXT: movabsq $LCPI1_0@GOTOFF, %rax<br>
; LARGE-NEXT: addsd (%rax), %xmm0<br>
; LARGE-NEXT: retq<br>
;<br>
@@ -57,7 +69,11 @@ define double @constpool_double(double %<br>
;<br>
; LARGE_AVX-LABEL: constpool_double:<br>
; LARGE_AVX: ## %bb.0:<br>
-; LARGE_AVX-NEXT: movabsq $LCPI1_0, %rax<br>
+; LARGE_AVX-NEXT: Ltmp1:<br>
+; LARGE_AVX-NEXT: leaq {{.*}}(%rip), %rax<br>
+; LARGE_AVX-NEXT: movabsq $__GLOBAL_OFFSET_TABLE_-Ltmp1, %rcx<br>
+; LARGE_AVX-NEXT: addq %rcx, %rax<br>
+; LARGE_AVX-NEXT: movabsq $LCPI1_0@GOTOFF, %rax<br>
; LARGE_AVX-NEXT: vaddsd (%rax), %xmm0, %xmm0<br>
; LARGE_AVX-NEXT: retq<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/hipe-cc64.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/hipe-cc64.ll?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/hipe-cc64.ll?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/hipe-cc64.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/hipe-cc64.ll Mon Jun 25 11:16:27 2018<br>
@@ -1,4 +1,4 @@<br>
-; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -stack-alignment=8 -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s<br>
+; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -relocation-model=static -code-model=medium -stack-alignment=8 -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s<br>
<br>
; Check the HiPE calling convention works (x86-64)<br>
<br>
<br>
Modified: llvm/trunk/test/ExecutionEngine/MCJIT/eh-lg-pic.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/ExecutionEngine/MCJIT/eh-lg-pic.ll?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/ExecutionEngine/MCJIT/eh-lg-pic.ll?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/ExecutionEngine/MCJIT/eh-lg-pic.ll (original)<br>
+++ llvm/trunk/test/ExecutionEngine/MCJIT/eh-lg-pic.ll Mon Jun 25 11:16:27 2018<br>
@@ -1,6 +1,6 @@<br>
-; REQUIRES: cxx-shared-library<br>
+; REQUIRES: cxx-shared-library, system-linux<br>
; RUN: %lli -relocation-model=pic -code-model=large %s<br>
-; XFAIL: cygwin, win32, mingw, mips-, mipsel-, i686, i386, aarch64, arm<br>
+; XFAIL: mips-, mipsel-, i686, i386, aarch64, arm<br>
declare i8* @__cxa_allocate_exception(i64)<br>
declare void @__cxa_throw(i8*, i8*, i8*)<br>
declare i32 @__gxx_personality_v0(...)<br>
@@ -15,8 +15,14 @@ define void @throwException() {<br>
unreachable<br>
}<br>
<br>
+; Make an internal function so we exercise R_X86_64_GOTOFF64 relocations.<br>
+define internal dso_local void @use_gotoff() {<br>
+ ret void<br>
+}<br>
+<br>
define i32 @main() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {<br>
entry:<br>
+ call void @use_gotoff()<br>
invoke void @throwException()<br>
to label %try.cont unwind label %lpad<br>
<br>
<br>
Modified: llvm/trunk/utils/UpdateTestChecks/asm.py<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/UpdateTestChecks/asm.py?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/UpdateTestChecks/asm.py?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/utils/UpdateTestChecks/asm.py (original)<br>
+++ llvm/trunk/utils/UpdateTestChecks/asm.py Mon Jun 25 11:16:27 2018<br>
@@ -110,8 +110,9 @@ def scrub_asm_x86(asm, args):<br>
asm = SCRUB_X86_SPILL_RELOAD_RE.sub(r'{{[-0-9]+}}(%\1{{[sb]}}p)\2', asm)<br>
# Generically match the stack offset of a memory operand.<br>
asm = SCRUB_X86_SP_RE.sub(r'{{[0-9]+}}(%\1)', asm)<br>
- # Generically match a RIP-relative memory operand.<br>
- asm = SCRUB_X86_RIP_RE.sub(r'{{.*}}(%rip)', asm)<br>
+ if getattr(args, 'x86_scrub_rip', False):<br>
+ # Generically match a RIP-relative memory operand.<br>
+ asm = SCRUB_X86_RIP_RE.sub(r'{{.*}}(%rip)', asm)<br>
# Generically match a LCP symbol.<br>
asm = SCRUB_X86_LCP_RE.sub(r'{{\.LCPI.*}}', asm)<br>
if getattr(args, 'extra_scrub', False):<br>
<br>
Modified: llvm/trunk/utils/update_llc_test_checks.py<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/update_llc_test_checks.py?rev=335508&r1=335507&r2=335508&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/update_llc_test_checks.py?rev=335508&r1=335507&r2=335508&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/utils/update_llc_test_checks.py (original)<br>
+++ llvm/trunk/utils/update_llc_test_checks.py Mon Jun 25 11:16:27 2018<br>
@@ -30,6 +30,11 @@ def main():<br>
parser.add_argument(<br>
'--extra_scrub', action='store_true',<br>
help='Always use additional regex to further reduce diffs between various subtargets')<br>
+ parser.add_argument(<br>
+ '--x86_scrub_rip', action='store_true', default=True,<br>
+ help='Use more regex for x86 matching to reduce diffs between various subtargets')<br>
+ parser.add_argument(<br>
+ '--no_x86_scrub_rip', action='store_false', dest='x86_scrub_rip')<br>
parser.add_argument('tests', nargs='+')<br>
args = parser.parse_args()<br>
<br>
<br>
<br>
_______________________________________________<br>
llvm-commits mailing list<br>
<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br>
<a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" rel="noreferrer" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br>
</blockquote></div>