<div dir="ltr"><div>Hi Peter,</div><div><br></div>This change broke the build for WebAssembly and RISCV targets:<div><br></div><div><div>llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp:47:58: error: non-virtual member function marked 'override' hides virtual member function</div><div>...</div><div><div>llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp:50:55: error: non-virtual member function marked 'override' hides virtual member function</div></div><div><br></div><div><br></div><div>Could you take a look please?</div><div><br></div><div><br></div></div></div><br><div class="gmail_quote"><div dir="ltr">On Wed, Jun 6, 2018 at 11:44 AM Peter Smith via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: psmith<br>
Date: Wed Jun 6 02:40:06 2018<br>
New Revision: 334078<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=334078&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=334078&view=rev</a><br>
Log:<br>
[MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixup<br>
<br>
On targets like Arm some relaxations may only be performed when certain<br>
architectural features are available. As functions can be compiled with<br>
differing levels of architectural support we must make a judgement on<br>
whether we can relax based on the MCSubtargetInfo for the function. This<br>
change passes through the MCSubtargetInfo for the function to<br>
fixupNeedsRelaxation so that the decision on whether to relax can be made<br>
per function. In this patch, only the ARM backend makes use of this<br>
information. We must also pass the MCSubtargetInfo to applyFixup because<br>
some fixups skip error checking on the assumption that relaxation has<br>
occurred, to prevent code-generation errors applyFixup must see the same<br>
MCSubtargetInfo as fixupNeedsRelaxation.<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D44928" rel="noreferrer" target="_blank">https://reviews.llvm.org/D44928</a><br>
<br>
<br>
Added:<br>
llvm/trunk/test/CodeGen/ARM/relax-per-target-feature.ll<br>
llvm/trunk/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s<br>
llvm/trunk/test/MC/ARM/AlignedBundling/subtarget-change.s<br>
llvm/trunk/test/MC/ARM/fixup-per-fragment.s<br>
llvm/trunk/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s<br>
Modified:<br>
llvm/trunk/include/llvm/MC/MCAsmBackend.h<br>
llvm/trunk/include/llvm/MC/MCFragment.h<br>
llvm/trunk/include/llvm/MC/MCObjectStreamer.h<br>
llvm/trunk/include/llvm/MC/MCStreamer.h<br>
llvm/trunk/lib/MC/MCAsmStreamer.cpp<br>
llvm/trunk/lib/MC/MCAssembler.cpp<br>
llvm/trunk/lib/MC/MCELFStreamer.cpp<br>
llvm/trunk/lib/MC/MCMachOStreamer.cpp<br>
llvm/trunk/lib/MC/MCObjectStreamer.cpp<br>
llvm/trunk/lib/MC/MCParser/AsmParser.cpp<br>
llvm/trunk/lib/MC/MCWasmStreamer.cpp<br>
llvm/trunk/lib/MC/MCWinCOFFStreamer.cpp<br>
llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp<br>
llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp<br>
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp<br>
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h<br>
llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp<br>
llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp<br>
llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp<br>
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp<br>
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h<br>
llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp<br>
llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp<br>
llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp<br>
llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp<br>
<br>
Modified: llvm/trunk/include/llvm/MC/MCAsmBackend.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAsmBackend.h?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAsmBackend.h?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/MC/MCAsmBackend.h (original)<br>
+++ llvm/trunk/include/llvm/MC/MCAsmBackend.h Wed Jun 6 02:40:06 2018<br>
@@ -92,9 +92,12 @@ public:<br>
/// the offset specified by the fixup and following the fixup kind as<br>
/// appropriate. Errors (such as an out of range fixup value) should be<br>
/// reported via \p Ctx.<br>
+ /// The \p STI is present only for fragments of type MCRelaxableFragment and<br>
+ /// MCDataFragment with hasInstructions() == true.<br>
virtual void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t Value, bool IsResolved) const = 0;<br>
+ uint64_t Value, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const = 0;<br>
<br>
/// Check whether the given target requires emitting differences of two<br>
/// symbols as a set of relocations.<br>
@@ -108,7 +111,10 @@ public:<br>
/// Check whether the given instruction may need relaxation.<br>
///<br>
/// \param Inst - The instruction to test.<br>
- virtual bool mayNeedRelaxation(const MCInst &Inst) const = 0;<br>
+ /// \param STI - The MCSubtargetInfo in effect when the instruction was<br>
+ /// encoded.<br>
+ virtual bool mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const = 0;<br>
<br>
/// Target specific predicate for whether a given fixup requires the<br>
/// associated instruction to be relaxed.<br>
<br>
Modified: llvm/trunk/include/llvm/MC/MCFragment.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCFragment.h?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCFragment.h?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/MC/MCFragment.h (original)<br>
+++ llvm/trunk/include/llvm/MC/MCFragment.h Wed Jun 6 02:40:06 2018<br>
@@ -201,7 +201,16 @@ protected:<br>
: MCEncodedFragmentWithContents<ContentsSize>(FType, HasInstructions,<br>
Sec) {}<br>
<br>
+ /// STI - The MCSubtargetInfo in effect when the instruction was encoded.<br>
+ /// must be non-null for instructions.<br>
+ const MCSubtargetInfo *STI = nullptr;<br>
+<br>
public:<br>
+<br>
+ /// Retrieve the MCSubTargetInfo in effect when the instruction was encoded.<br>
+ /// Guaranteed to be non-null if hasInstructions() == true<br>
+ const MCSubtargetInfo *getSubtargetInfo() const { return STI; }<br>
+<br>
using const_fixup_iterator = SmallVectorImpl<MCFixup>::const_iterator;<br>
using fixup_iterator = SmallVectorImpl<MCFixup>::iterator;<br>
<br>
@@ -228,7 +237,12 @@ public:<br>
MCDataFragment(MCSection *Sec = nullptr)<br>
: MCEncodedFragmentWithFixups<32, 4>(FT_Data, false, Sec) {}<br>
<br>
- void setHasInstructions(bool V) { HasInstructions = V; }<br>
+ /// Record that the fragment contains instructions with the MCSubtargetInfo in<br>
+ /// effect when the instruction was encoded.<br>
+ void setHasInstructions(const MCSubtargetInfo &STI) {<br>
+ HasInstructions = true;<br>
+ this->STI = &STI;<br>
+ }<br>
<br>
static bool classof(const MCFragment *F) {<br>
return F->getKind() == MCFragment::FT_Data;<br>
@@ -259,20 +273,15 @@ class MCRelaxableFragment : public MCEnc<br>
/// Inst - The instruction this is a fragment for.<br>
MCInst Inst;<br>
<br>
- /// STI - The MCSubtargetInfo in effect when the instruction was encoded.<br>
- const MCSubtargetInfo &STI;<br>
-<br>
public:<br>
MCRelaxableFragment(const MCInst &Inst, const MCSubtargetInfo &STI,<br>
MCSection *Sec = nullptr)<br>
: MCEncodedFragmentWithFixups(FT_Relaxable, true, Sec),<br>
- Inst(Inst), STI(STI) {}<br>
+ Inst(Inst) { this->STI = &STI; }<br>
<br>
const MCInst &getInst() const { return Inst; }<br>
void setInst(const MCInst &Value) { Inst = Value; }<br>
<br>
- const MCSubtargetInfo &getSubtargetInfo() { return STI; }<br>
-<br>
static bool classof(const MCFragment *F) {<br>
return F->getKind() == MCFragment::FT_Relaxable;<br>
}<br>
<br>
Modified: llvm/trunk/include/llvm/MC/MCObjectStreamer.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectStreamer.h?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectStreamer.h?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/MC/MCObjectStreamer.h (original)<br>
+++ llvm/trunk/include/llvm/MC/MCObjectStreamer.h Wed Jun 6 02:40:06 2018<br>
@@ -73,7 +73,9 @@ public:<br>
<br>
/// Get a data fragment to write into, creating a new one if the current<br>
/// fragment is not a data fragment.<br>
- MCDataFragment *getOrCreateDataFragment();<br>
+ /// Optionally a \p STI can be passed in so that a new fragment is created<br>
+ /// if the Subtarget differs from the current fragment.<br>
+ MCDataFragment *getOrCreateDataFragment(const MCSubtargetInfo* STI = nullptr);<br>
MCPaddingFragment *getOrCreatePaddingFragment();<br>
<br>
protected:<br>
@@ -158,7 +160,8 @@ public:<br>
void EmitGPRel32Value(const MCExpr *Value) override;<br>
void EmitGPRel64Value(const MCExpr *Value) override;<br>
bool EmitRelocDirective(const MCExpr &Offset, StringRef Name,<br>
- const MCExpr *Expr, SMLoc Loc) override;<br>
+ const MCExpr *Expr, SMLoc Loc,<br>
+ const MCSubtargetInfo &STI) override;<br>
using MCStreamer::emitFill;<br>
void emitFill(const MCExpr &NumBytes, uint64_t FillValue,<br>
SMLoc Loc = SMLoc()) override;<br>
<br>
Modified: llvm/trunk/include/llvm/MC/MCStreamer.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCStreamer.h?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCStreamer.h?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/MC/MCStreamer.h (original)<br>
+++ llvm/trunk/include/llvm/MC/MCStreamer.h Wed Jun 6 02:40:06 2018<br>
@@ -918,7 +918,8 @@ public:<br>
/// Returns true if the relocation could not be emitted because Name is not<br>
/// known.<br>
virtual bool EmitRelocDirective(const MCExpr &Offset, StringRef Name,<br>
- const MCExpr *Expr, SMLoc Loc) {<br>
+ const MCExpr *Expr, SMLoc Loc,<br>
+ const MCSubtargetInfo &STI) {<br>
return true;<br>
}<br>
<br>
<br>
Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MCAsmStreamer.cpp (original)<br>
+++ llvm/trunk/lib/MC/MCAsmStreamer.cpp Wed Jun 6 02:40:06 2018<br>
@@ -315,7 +315,8 @@ public:<br>
void EmitBundleUnlock() override;<br>
<br>
bool EmitRelocDirective(const MCExpr &Offset, StringRef Name,<br>
- const MCExpr *Expr, SMLoc Loc) override;<br>
+ const MCExpr *Expr, SMLoc Loc,<br>
+ const MCSubtargetInfo &STI) override;<br>
<br>
/// If this file is backed by an assembly streamer, this dumps the specified<br>
/// string in the output .s file. This capability is indicated by the<br>
@@ -1820,7 +1821,8 @@ void MCAsmStreamer::EmitBundleUnlock() {<br>
}<br>
<br>
bool MCAsmStreamer::EmitRelocDirective(const MCExpr &Offset, StringRef Name,<br>
- const MCExpr *Expr, SMLoc) {<br>
+ const MCExpr *Expr, SMLoc,<br>
+ const MCSubtargetInfo &STI) {<br>
OS << "\t.reloc ";<br>
Offset.print(OS, MAI);<br>
OS << ", " << Name;<br>
<br>
Modified: llvm/trunk/lib/MC/MCAssembler.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAssembler.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAssembler.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MCAssembler.cpp (original)<br>
+++ llvm/trunk/lib/MC/MCAssembler.cpp Wed Jun 6 02:40:06 2018<br>
@@ -805,12 +805,17 @@ void MCAssembler::layout(MCAsmLayout &La<br>
continue;<br>
ArrayRef<MCFixup> Fixups;<br>
MutableArrayRef<char> Contents;<br>
+ const MCSubtargetInfo *STI = nullptr;<br>
if (auto *FragWithFixups = dyn_cast<MCDataFragment>(&Frag)) {<br>
Fixups = FragWithFixups->getFixups();<br>
Contents = FragWithFixups->getContents();<br>
+ STI = FragWithFixups->getSubtargetInfo();<br>
+ assert(!FragWithFixups->hasInstructions() || STI != nullptr);<br>
} else if (auto *FragWithFixups = dyn_cast<MCRelaxableFragment>(&Frag)) {<br>
Fixups = FragWithFixups->getFixups();<br>
Contents = FragWithFixups->getContents();<br>
+ STI = FragWithFixups->getSubtargetInfo();<br>
+ assert(!FragWithFixups->hasInstructions() || STI != nullptr);<br>
} else if (auto *FragWithFixups = dyn_cast<MCCVDefRangeFragment>(&Frag)) {<br>
Fixups = FragWithFixups->getFixups();<br>
Contents = FragWithFixups->getContents();<br>
@@ -823,7 +828,7 @@ void MCAssembler::layout(MCAsmLayout &La<br>
std::tie(Target, FixedValue, IsResolved) =<br>
handleFixup(Layout, Frag, Fixup);<br>
getBackend().applyFixup(*this, Fixup, Target, Contents, FixedValue,<br>
- IsResolved);<br>
+ IsResolved, STI);<br>
}<br>
}<br>
}<br>
@@ -860,7 +865,7 @@ bool MCAssembler::fragmentNeedsRelaxatio<br>
// If this inst doesn't ever need relaxation, ignore it. This occurs when we<br>
// are intentionally pushing out inst fragments, or because we relaxed a<br>
// previous instruction to one that doesn't need relaxation.<br>
- if (!getBackend().mayNeedRelaxation(F->getInst()))<br>
+ if (!getBackend().mayNeedRelaxation(F->getInst(), *F->getSubtargetInfo()))<br>
return false;<br>
<br>
for (const MCFixup &Fixup : F->getFixups())<br>
@@ -885,7 +890,7 @@ bool MCAssembler::relaxInstruction(MCAsm<br>
// Relax the fragment.<br>
<br>
MCInst Relaxed;<br>
- getBackend().relaxInstruction(F.getInst(), F.getSubtargetInfo(), Relaxed);<br>
+ getBackend().relaxInstruction(F.getInst(), *F.getSubtargetInfo(), Relaxed);<br>
<br>
// Encode the new instruction.<br>
//<br>
@@ -894,7 +899,7 @@ bool MCAssembler::relaxInstruction(MCAsm<br>
SmallVector<MCFixup, 4> Fixups;<br>
SmallString<256> Code;<br>
raw_svector_ostream VecOS(Code);<br>
- getEmitter().encodeInstruction(Relaxed, VecOS, Fixups, F.getSubtargetInfo());<br>
+ getEmitter().encodeInstruction(Relaxed, VecOS, Fixups, *F.getSubtargetInfo());<br>
<br>
// Update the fragment.<br>
F.setInst(Relaxed);<br>
<br>
Modified: llvm/trunk/lib/MC/MCELFStreamer.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCELFStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCELFStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MCELFStreamer.cpp (original)<br>
+++ llvm/trunk/lib/MC/MCELFStreamer.cpp Wed Jun 6 02:40:06 2018<br>
@@ -83,7 +83,8 @@ void MCELFStreamer::mergeFragment(MCData<br>
DF->getContents().size());<br>
DF->getFixups().push_back(EF->getFixups()[i]);<br>
}<br>
- DF->setHasInstructions(true);<br>
+ if (DF->getSubtargetInfo() == nullptr && EF->getSubtargetInfo())<br>
+ DF->setHasInstructions(*EF->getSubtargetInfo());<br>
DF->getContents().append(EF->getContents().begin(), EF->getContents().end());<br>
}<br>
<br>
@@ -493,6 +494,15 @@ void MCELFStreamer::EmitInstToFragment(c<br>
fixSymbolsInTLSFixups(F.getFixups()[i].getValue());<br>
}<br>
<br>
+// A fragment can only have one Subtarget, and when bundling is enabled we<br>
+// sometimes need to use the same fragment. We give an error if there<br>
+// are conflicting Subtargets.<br>
+static void CheckBundleSubtargets(const MCSubtargetInfo *OldSTI,<br>
+ const MCSubtargetInfo *NewSTI) {<br>
+ if (OldSTI && NewSTI && OldSTI != NewSTI)<br>
+ report_fatal_error("A Bundle can only have one Subtarget.");<br>
+}<br>
+<br>
void MCELFStreamer::EmitInstToData(const MCInst &Inst,<br>
const MCSubtargetInfo &STI) {<br>
MCAssembler &Assembler = getAssembler();<br>
@@ -508,7 +518,7 @@ void MCELFStreamer::EmitInstToData(const<br>
//<br>
// If bundling is disabled, append the encoded instruction to the current data<br>
// fragment (or create a new such fragment if the current fragment is not a<br>
- // data fragment).<br>
+ // data fragment, or the Subtarget has changed).<br>
//<br>
// If bundling is enabled:<br>
// - If we're not in a bundle-locked group, emit the instruction into a<br>
@@ -523,19 +533,23 @@ void MCELFStreamer::EmitInstToData(const<br>
<br>
if (Assembler.isBundlingEnabled()) {<br>
MCSection &Sec = *getCurrentSectionOnly();<br>
- if (Assembler.getRelaxAll() && isBundleLocked())<br>
+ if (Assembler.getRelaxAll() && isBundleLocked()) {<br>
// If the -mc-relax-all flag is used and we are bundle-locked, we re-use<br>
// the current bundle group.<br>
DF = BundleGroups.back();<br>
+ CheckBundleSubtargets(DF->getSubtargetInfo(), &STI);<br>
+ }<br>
else if (Assembler.getRelaxAll() && !isBundleLocked())<br>
// When not in a bundle-locked group and the -mc-relax-all flag is used,<br>
// we create a new temporary fragment which will be later merged into<br>
// the current fragment.<br>
DF = new MCDataFragment();<br>
- else if (isBundleLocked() && !Sec.isBundleGroupBeforeFirstInst())<br>
+ else if (isBundleLocked() && !Sec.isBundleGroupBeforeFirstInst()) {<br>
// If we are bundle-locked, we re-use the current fragment.<br>
// The bundle-locking directive ensures this is a new data fragment.<br>
DF = cast<MCDataFragment>(getCurrentFragment());<br>
+ CheckBundleSubtargets(DF->getSubtargetInfo(), &STI);<br>
+ }<br>
else if (!isBundleLocked() && Fixups.size() == 0) {<br>
// Optimize memory usage by emitting the instruction to a<br>
// MCCompactEncodedInstFragment when not in a bundle-locked group and<br>
@@ -560,7 +574,7 @@ void MCELFStreamer::EmitInstToData(const<br>
// to be turned off.<br>
Sec.setBundleGroupBeforeFirstInst(false);<br>
} else {<br>
- DF = getOrCreateDataFragment();<br>
+ DF = getOrCreateDataFragment(&STI);<br>
}<br>
<br>
// Add the fixups and data.<br>
@@ -568,12 +582,12 @@ void MCELFStreamer::EmitInstToData(const<br>
Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size());<br>
DF->getFixups().push_back(Fixups[i]);<br>
}<br>
- DF->setHasInstructions(true);<br>
+ DF->setHasInstructions(STI);<br>
DF->getContents().append(Code.begin(), Code.end());<br>
<br>
if (Assembler.isBundlingEnabled() && Assembler.getRelaxAll()) {<br>
if (!isBundleLocked()) {<br>
- mergeFragment(getOrCreateDataFragment(), DF);<br>
+ mergeFragment(getOrCreateDataFragment(&STI), DF);<br>
delete DF;<br>
}<br>
}<br>
@@ -633,7 +647,7 @@ void MCELFStreamer::EmitBundleUnlock() {<br>
<br>
// FIXME: Use more separate fragments for nested groups.<br>
if (!isBundleLocked()) {<br>
- mergeFragment(getOrCreateDataFragment(), DF);<br>
+ mergeFragment(getOrCreateDataFragment(DF->getSubtargetInfo()), DF);<br>
BundleGroups.pop_back();<br>
delete DF;<br>
}<br>
<br>
Modified: llvm/trunk/lib/MC/MCMachOStreamer.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCMachOStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCMachOStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MCMachOStreamer.cpp (original)<br>
+++ llvm/trunk/lib/MC/MCMachOStreamer.cpp Wed Jun 6 02:40:06 2018<br>
@@ -450,6 +450,7 @@ void MCMachOStreamer::EmitInstToData(con<br>
Fixup.setOffset(Fixup.getOffset() + DF->getContents().size());<br>
DF->getFixups().push_back(Fixup);<br>
}<br>
+ DF->setHasInstructions(STI);<br>
DF->getContents().append(Code.begin(), Code.end());<br>
}<br>
<br>
<br>
Modified: llvm/trunk/lib/MC/MCObjectStreamer.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCObjectStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCObjectStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MCObjectStreamer.cpp (original)<br>
+++ llvm/trunk/lib/MC/MCObjectStreamer.cpp Wed Jun 6 02:40:06 2018<br>
@@ -146,12 +146,24 @@ MCFragment *MCObjectStreamer::getCurrent<br>
return nullptr;<br>
}<br>
<br>
-MCDataFragment *MCObjectStreamer::getOrCreateDataFragment() {<br>
- MCDataFragment *F = dyn_cast_or_null<MCDataFragment>(getCurrentFragment());<br>
+static bool CanReuseDataFragment(const MCDataFragment &F,<br>
+ const MCAssembler &Assembler,<br>
+ const MCSubtargetInfo *STI) {<br>
+ if (!F.hasInstructions())<br>
+ return true;<br>
// When bundling is enabled, we don't want to add data to a fragment that<br>
// already has instructions (see MCELFStreamer::EmitInstToData for details)<br>
- if (!F || (Assembler->isBundlingEnabled() && !Assembler->getRelaxAll() &&<br>
- F->hasInstructions())) {<br>
+ if (Assembler.isBundlingEnabled())<br>
+ return Assembler.getRelaxAll();<br>
+ // If the subtarget is changed mid fragment we start a new fragment to record<br>
+ // the new STI.<br>
+ return !STI || F.getSubtargetInfo() == STI;<br>
+}<br>
+<br>
+MCDataFragment *<br>
+MCObjectStreamer::getOrCreateDataFragment(const MCSubtargetInfo *STI) {<br>
+ MCDataFragment *F = dyn_cast_or_null<MCDataFragment>(getCurrentFragment());<br>
+ if (!F || !CanReuseDataFragment(*F, *Assembler, STI)) {<br>
F = new MCDataFragment();<br>
insert(F);<br>
}<br>
@@ -327,7 +339,7 @@ void MCObjectStreamer::EmitInstructionIm<br>
<br>
// If this instruction doesn't need relaxation, just emit it as data.<br>
MCAssembler &Assembler = getAssembler();<br>
- if (!Assembler.getBackend().mayNeedRelaxation(Inst)) {<br>
+ if (!Assembler.getBackend().mayNeedRelaxation(Inst, STI)) {<br>
EmitInstToData(Inst, STI);<br>
return;<br>
}<br>
@@ -341,7 +353,7 @@ void MCObjectStreamer::EmitInstructionIm<br>
(Assembler.isBundlingEnabled() && Sec->isBundleLocked())) {<br>
MCInst Relaxed;<br>
getAssembler().getBackend().relaxInstruction(Inst, STI, Relaxed);<br>
- while (getAssembler().getBackend().mayNeedRelaxation(Relaxed))<br>
+ while (getAssembler().getBackend().mayNeedRelaxation(Relaxed, STI))<br>
getAssembler().getBackend().relaxInstruction(Relaxed, STI, Relaxed);<br>
EmitInstToData(Relaxed, STI);<br>
return;<br>
@@ -606,7 +618,8 @@ void MCObjectStreamer::EmitGPRel64Value(<br>
}<br>
<br>
bool MCObjectStreamer::EmitRelocDirective(const MCExpr &Offset, StringRef Name,<br>
- const MCExpr *Expr, SMLoc Loc) {<br>
+ const MCExpr *Expr, SMLoc Loc,<br>
+ const MCSubtargetInfo &STI) {<br>
int64_t OffsetValue;<br>
if (!Offset.evaluateAsAbsolute(OffsetValue))<br>
llvm_unreachable("Offset is not absolute");<br>
@@ -614,7 +627,7 @@ bool MCObjectStreamer::EmitRelocDirectiv<br>
if (OffsetValue < 0)<br>
llvm_unreachable("Offset is negative");<br>
<br>
- MCDataFragment *DF = getOrCreateDataFragment();<br>
+ MCDataFragment *DF = getOrCreateDataFragment(&STI);<br>
flushPendingLabels(DF, DF->getContents().size());<br>
<br>
Optional<MCFixupKind> MaybeKind = Assembler->getBackend().getFixupKind(Name);<br>
<br>
Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original)<br>
+++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Wed Jun 6 02:40:06 2018<br>
@@ -2949,7 +2949,9 @@ bool AsmParser::parseDirectiveReloc(SMLo<br>
"unexpected token in .reloc directive"))<br>
return true;<br>
<br>
- if (getStreamer().EmitRelocDirective(*Offset, Name, Expr, DirectiveLoc))<br>
+ const MCTargetAsmParser &MCT = getTargetParser();<br>
+ const MCSubtargetInfo &STI = MCT.getSTI();<br>
+ if (getStreamer().EmitRelocDirective(*Offset, Name, Expr, DirectiveLoc, STI))<br>
return Error(NameLoc, "unknown relocation name");<br>
<br>
return false;<br>
<br>
Modified: llvm/trunk/lib/MC/MCWasmStreamer.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCWasmStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCWasmStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MCWasmStreamer.cpp (original)<br>
+++ llvm/trunk/lib/MC/MCWasmStreamer.cpp Wed Jun 6 02:40:06 2018<br>
@@ -45,7 +45,8 @@ void MCWasmStreamer::mergeFragment(MCDat<br>
DF->getContents().size());<br>
DF->getFixups().push_back(EF->getFixups()[i]);<br>
}<br>
- DF->setHasInstructions(true);<br>
+ if (DF->getSubtargetInfo() == nullptr && EF->getSubtargetInfo())<br>
+ DF->setHasInstructions(*EF->getSubtargetInfo());<br>
DF->getContents().append(EF->getContents().begin(), EF->getContents().end());<br>
}<br>
<br>
@@ -183,7 +184,7 @@ void MCWasmStreamer::EmitInstToData(cons<br>
Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size());<br>
DF->getFixups().push_back(Fixups[i]);<br>
}<br>
- DF->setHasInstructions(true);<br>
+ DF->setHasInstructions(STI);<br>
DF->getContents().append(Code.begin(), Code.end());<br>
}<br>
<br>
<br>
Modified: llvm/trunk/lib/MC/MCWinCOFFStreamer.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCWinCOFFStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCWinCOFFStreamer.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MCWinCOFFStreamer.cpp (original)<br>
+++ llvm/trunk/lib/MC/MCWinCOFFStreamer.cpp Wed Jun 6 02:40:06 2018<br>
@@ -63,7 +63,7 @@ void MCWinCOFFStreamer::EmitInstToData(c<br>
Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size());<br>
DF->getFixups().push_back(Fixups[i]);<br>
}<br>
-<br>
+ DF->setHasInstructions(STI);<br>
DF->getContents().append(Code.begin(), Code.end());<br>
}<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp Wed Jun 6 02:40:06 2018<br>
@@ -73,9 +73,11 @@ public:<br>
<br>
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t Value, bool IsResolved) const override;<br>
+ uint64_t Value, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const override;<br>
<br>
- bool mayNeedRelaxation(const MCInst &Inst) const override;<br>
+ bool mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const override;<br>
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,<br>
const MCRelaxableFragment *DF,<br>
const MCAsmLayout &Layout) const override;<br>
@@ -285,7 +287,8 @@ unsigned AArch64AsmBackend::getFixupKind<br>
void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target,<br>
MutableArrayRef<char> Data, uint64_t Value,<br>
- bool IsResolved) const {<br>
+ bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const {<br>
unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());<br>
if (!Value)<br>
return; // Doesn't change encoding.<br>
@@ -321,7 +324,8 @@ void AArch64AsmBackend::applyFixup(const<br>
}<br>
}<br>
<br>
-bool AArch64AsmBackend::mayNeedRelaxation(const MCInst &Inst) const {<br>
+bool AArch64AsmBackend::mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const {<br>
return false;<br>
}<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp Wed Jun 6 02:40:06 2018<br>
@@ -32,7 +32,8 @@ public:<br>
<br>
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t Value, bool IsResolved) const override;<br>
+ uint64_t Value, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const override;<br>
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,<br>
const MCRelaxableFragment *DF,<br>
const MCAsmLayout &Layout) const override {<br>
@@ -42,7 +43,10 @@ public:<br>
MCInst &Res) const override {<br>
llvm_unreachable("Not implemented");<br>
}<br>
- bool mayNeedRelaxation(const MCInst &Inst) const override { return false; }<br>
+ bool mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const override {<br>
+ return false;<br>
+ }<br>
<br>
unsigned getMinimumNopSize() const override;<br>
bool writeNopData(raw_ostream &OS, uint64_t Count) const override;<br>
@@ -102,7 +106,8 @@ static uint64_t adjustFixupValue(const M<br>
void AMDGPUAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target,<br>
MutableArrayRef<char> Data, uint64_t Value,<br>
- bool IsResolved) const {<br>
+ bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const {<br>
Value = adjustFixupValue(Fixup, Value, &Asm.getContext());<br>
if (!Value)<br>
return; // Doesn't change encoding.<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp Wed Jun 6 02:40:06 2018<br>
@@ -173,7 +173,8 @@ void ARMAsmBackend::handleAssemblerFlag(<br>
}<br>
}<br>
<br>
-unsigned ARMAsmBackend::getRelaxedOpcode(unsigned Op) const {<br>
+unsigned ARMAsmBackend::getRelaxedOpcode(unsigned Op,<br>
+ const MCSubtargetInfo &STI) const {<br>
bool HasThumb2 = STI.getFeatureBits()[ARM::FeatureThumb2];<br>
bool HasV8MBaselineOps = STI.getFeatureBits()[ARM::HasV8MBaselineOps];<br>
<br>
@@ -195,8 +196,9 @@ unsigned ARMAsmBackend::getRelaxedOpcode<br>
}<br>
}<br>
<br>
-bool ARMAsmBackend::mayNeedRelaxation(const MCInst &Inst) const {<br>
- if (getRelaxedOpcode(Inst.getOpcode()) != Inst.getOpcode())<br>
+bool ARMAsmBackend::mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const {<br>
+ if (getRelaxedOpcode(Inst.getOpcode(), STI) != Inst.getOpcode())<br>
return true;<br>
return false;<br>
}<br>
@@ -263,7 +265,7 @@ bool ARMAsmBackend::fixupNeedsRelaxation<br>
void ARMAsmBackend::relaxInstruction(const MCInst &Inst,<br>
const MCSubtargetInfo &STI,<br>
MCInst &Res) const {<br>
- unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode());<br>
+ unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode(), STI);<br>
<br>
// Sanity check w/ diagnostic if we get here w/ a bogus instruction.<br>
if (RelaxedOp == Inst.getOpcode()) {<br>
@@ -360,7 +362,8 @@ static uint32_t joinHalfWords(uint32_t F<br>
unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,<br>
const MCFixup &Fixup,<br>
const MCValue &Target, uint64_t Value,<br>
- bool IsResolved, MCContext &Ctx) const {<br>
+ bool IsResolved, MCContext &Ctx,<br>
+ const MCSubtargetInfo* STI) const {<br>
unsigned Kind = Fixup.getKind();<br>
<br>
// MachO tries to make .o files that look vaguely pre-linked, so for MOVW/MOVT<br>
@@ -389,7 +392,8 @@ unsigned ARMAsmBackend::adjustFixupValue<br>
case FK_SecRel_4:<br>
return Value;<br>
case ARM::fixup_arm_movt_hi16:<br>
- if (IsResolved || !STI.getTargetTriple().isOSBinFormatELF())<br>
+ assert(STI != nullptr);<br>
+ if (IsResolved || !STI->getTargetTriple().isOSBinFormatELF())<br>
Value >>= 16;<br>
LLVM_FALLTHROUGH;<br>
case ARM::fixup_arm_movw_lo16: {<br>
@@ -401,7 +405,8 @@ unsigned ARMAsmBackend::adjustFixupValue<br>
return Value;<br>
}<br>
case ARM::fixup_t2_movt_hi16:<br>
- if (IsResolved || !STI.getTargetTriple().isOSBinFormatELF())<br>
+ assert(STI != nullptr);<br>
+ if (IsResolved || !STI->getTargetTriple().isOSBinFormatELF())<br>
Value >>= 16;<br>
LLVM_FALLTHROUGH;<br>
case ARM::fixup_t2_movw_lo16: {<br>
@@ -529,9 +534,9 @@ unsigned ARMAsmBackend::adjustFixupValue<br>
}<br>
case ARM::fixup_arm_thumb_bl: {<br>
if (!isInt<25>(Value - 4) ||<br>
- (!STI.getFeatureBits()[ARM::FeatureThumb2] &&<br>
- !STI.getFeatureBits()[ARM::HasV8MBaselineOps] &&<br>
- !STI.getFeatureBits()[ARM::HasV6MOps] &&<br>
+ (!STI->getFeatureBits()[ARM::FeatureThumb2] &&<br>
+ !STI->getFeatureBits()[ARM::HasV8MBaselineOps] &&<br>
+ !STI->getFeatureBits()[ARM::HasV6MOps] &&<br>
!isInt<23>(Value - 4))) {<br>
Ctx.reportError(Fixup.getLoc(), "Relocation out of range");<br>
return 0;<br>
@@ -603,7 +608,8 @@ unsigned ARMAsmBackend::adjustFixupValue<br>
case ARM::fixup_arm_thumb_cp:<br>
// On CPUs supporting Thumb2, this will be relaxed to an ldr.w, otherwise we<br>
// could have an error on our hands.<br>
- if (!STI.getFeatureBits()[ARM::FeatureThumb2] && IsResolved) {<br>
+ assert(STI != nullptr);<br>
+ if (!STI->getFeatureBits()[ARM::FeatureThumb2] && IsResolved) {<br>
const char *FixupDiagnostic = reasonForFixupRelaxation(Fixup, Value);<br>
if (FixupDiagnostic) {<br>
Ctx.reportError(Fixup.getLoc(), FixupDiagnostic);<br>
@@ -627,8 +633,9 @@ unsigned ARMAsmBackend::adjustFixupValue<br>
}<br>
case ARM::fixup_arm_thumb_br:<br>
// Offset by 4 and don't encode the lower bit, which is always 0.<br>
- if (!STI.getFeatureBits()[ARM::FeatureThumb2] &&<br>
- !STI.getFeatureBits()[ARM::HasV8MBaselineOps]) {<br>
+ assert(STI != nullptr);<br>
+ if (!STI->getFeatureBits()[ARM::FeatureThumb2] &&<br>
+ !STI->getFeatureBits()[ARM::HasV8MBaselineOps]) {<br>
const char *FixupDiagnostic = reasonForFixupRelaxation(Fixup, Value);<br>
if (FixupDiagnostic) {<br>
Ctx.reportError(Fixup.getLoc(), FixupDiagnostic);<br>
@@ -638,7 +645,8 @@ unsigned ARMAsmBackend::adjustFixupValue<br>
return ((Value - 4) >> 1) & 0x7ff;<br>
case ARM::fixup_arm_thumb_bcc:<br>
// Offset by 4 and don't encode the lower bit, which is always 0.<br>
- if (!STI.getFeatureBits()[ARM::FeatureThumb2]) {<br>
+ assert(STI != nullptr);<br>
+ if (!STI->getFeatureBits()[ARM::FeatureThumb2]) {<br>
const char *FixupDiagnostic = reasonForFixupRelaxation(Fixup, Value);<br>
if (FixupDiagnostic) {<br>
Ctx.reportError(Fixup.getLoc(), FixupDiagnostic);<br>
@@ -894,10 +902,11 @@ static unsigned getFixupKindContainerSiz<br>
void ARMAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target,<br>
MutableArrayRef<char> Data, uint64_t Value,<br>
- bool IsResolved) const {<br>
+ bool IsResolved,<br>
+ const MCSubtargetInfo* STI) const {<br>
unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());<br>
MCContext &Ctx = Asm.getContext();<br>
- Value = adjustFixupValue(Asm, Fixup, Target, Value, IsResolved, Ctx);<br>
+ Value = adjustFixupValue(Asm, Fixup, Target, Value, IsResolved, Ctx, STI);<br>
if (!Value)<br>
return; // Doesn't change encoding.<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h (original)<br>
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h Wed Jun 6 02:40:06 2018<br>
@@ -19,6 +19,9 @@<br>
namespace llvm {<br>
<br>
class ARMAsmBackend : public MCAsmBackend {<br>
+ // The STI from the target triple the MCAsmBackend was instantiated with<br>
+ // note that MCFragments may have a different local STI that should be<br>
+ // used in preference.<br>
const MCSubtargetInfo &STI;<br>
bool isThumbMode; // Currently emitting Thumb code.<br>
public:<br>
@@ -31,6 +34,8 @@ public:<br>
return ARM::NumTargetFixupKinds;<br>
}<br>
<br>
+ // FIXME: this should be calculated per fragment as the STI may be<br>
+ // different.<br>
bool hasNOP() const { return STI.getFeatureBits()[ARM::HasV6T2Ops]; }<br>
<br>
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;<br>
@@ -40,15 +45,18 @@ public:<br>
<br>
unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, uint64_t Value,<br>
- bool IsResolved, MCContext &Ctx) const;<br>
+ bool IsResolved, MCContext &Ctx,<br>
+ const MCSubtargetInfo *STI) const;<br>
<br>
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t Value, bool IsResolved) const override;<br>
+ uint64_t Value, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const override;<br>
<br>
- unsigned getRelaxedOpcode(unsigned Op) const;<br>
+ unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const;<br>
<br>
- bool mayNeedRelaxation(const MCInst &Inst) const override;<br>
+ bool mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const override;<br>
<br>
const char *reasonForFixupRelaxation(const MCFixup &Fixup,<br>
uint64_t Value) const;<br>
<br>
Modified: llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp Wed Jun 6 02:40:06 2018<br>
@@ -27,7 +27,8 @@ public:<br>
<br>
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t Value, bool IsResolved) const override;<br>
+ uint64_t Value, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const override;<br>
<br>
std::unique_ptr<MCObjectTargetWriter><br>
createObjectTargetWriter() const override;<br>
@@ -41,7 +42,10 @@ public:<br>
<br>
unsigned getNumFixupKinds() const override { return 1; }<br>
<br>
- bool mayNeedRelaxation(const MCInst &Inst) const override { return false; }<br>
+ bool mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const override {<br>
+ return false;<br>
+ }<br>
<br>
void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,<br>
MCInst &Res) const override {}<br>
@@ -64,7 +68,8 @@ bool BPFAsmBackend::writeNopData(raw_ost<br>
void BPFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target,<br>
MutableArrayRef<char> Data, uint64_t Value,<br>
- bool IsResolved) const {<br>
+ bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const {<br>
if (Fixup.getKind() == FK_SecRel_4 || Fixup.getKind() == FK_SecRel_8) {<br>
assert(Value == 0);<br>
} else if (Fixup.getKind() == FK_Data_4) {<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp Wed Jun 6 02:40:06 2018<br>
@@ -51,7 +51,7 @@ class HexagonAsmBackend : public MCAsmBa<br>
SmallVector<MCFixup, 4> Fixups;<br>
SmallString<256> Code;<br>
raw_svector_ostream VecOS(Code);<br>
- E.encodeInstruction(HMB, VecOS, Fixups, RF.getSubtargetInfo());<br>
+ E.encodeInstruction(HMB, VecOS, Fixups, *RF.getSubtargetInfo());<br>
<br>
// Update the fragment.<br>
RF.setInst(HMB);<br>
@@ -414,7 +414,8 @@ public:<br>
/// fixup kind as appropriate.<br>
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t FixupValue, bool IsResolved) const override {<br>
+ uint64_t FixupValue, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const override {<br>
<br>
// When FixupValue is 0 the relocation is external and there<br>
// is nothing for us to do.<br>
@@ -561,7 +562,8 @@ public:<br>
/// relaxation.<br>
///<br>
/// \param Inst - The instruction to test.<br>
- bool mayNeedRelaxation(MCInst const &Inst) const override {<br>
+ bool mayNeedRelaxation(MCInst const &Inst,<br>
+ const MCSubtargetInfo &STI) const override {<br>
return true;<br>
}<br>
<br>
@@ -736,7 +738,7 @@ public:<br>
Inst.addOperand(MCOperand::createInst(Nop));<br>
Size -= 4;<br>
if (!HexagonMCChecker(<br>
- Context, *MCII, RF.getSubtargetInfo(), Inst,<br>
+ Context, *MCII, *RF.getSubtargetInfo(), Inst,<br>
*Context.getRegisterInfo(), false)<br>
.check()) {<br>
Inst.erase(Inst.end() - 1);<br>
@@ -744,7 +746,7 @@ public:<br>
}<br>
}<br>
bool Error = HexagonMCShuffle(Context, true, *MCII,<br>
- RF.getSubtargetInfo(), Inst);<br>
+ *RF.getSubtargetInfo(), Inst);<br>
//assert(!Error);<br>
(void)Error;<br>
ReplaceInstruction(Asm.getEmitter(), RF, Inst);<br>
<br>
Modified: llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp Wed Jun 6 02:40:06 2018<br>
@@ -51,7 +51,8 @@ public:<br>
<br>
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t Value, bool IsResolved) const override;<br>
+ uint64_t Value, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const override;<br>
<br>
std::unique_ptr<MCObjectTargetWriter><br>
createObjectTargetWriter() const override;<br>
@@ -69,7 +70,8 @@ public:<br>
return Lanai::NumTargetFixupKinds;<br>
}<br>
<br>
- bool mayNeedRelaxation(const MCInst & /*Inst*/) const override {<br>
+ bool mayNeedRelaxation(const MCInst & /*Inst*/,<br>
+ const MCSubtargetInfo &STI) const override {<br>
return false;<br>
}<br>
<br>
@@ -93,7 +95,8 @@ bool LanaiAsmBackend::writeNopData(raw_o<br>
void LanaiAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target,<br>
MutableArrayRef<char> Data, uint64_t Value,<br>
- bool /*IsResolved*/) const {<br>
+ bool /*IsResolved*/,<br>
+ const MCSubtargetInfo */*STI*/) const {<br>
MCFixupKind Kind = Fixup.getKind();<br>
Value = adjustFixupValue(static_cast<unsigned>(Kind), Value);<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp Wed Jun 6 02:40:06 2018<br>
@@ -243,7 +243,8 @@ static unsigned calculateMMLEIndex(unsig<br>
void MipsAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target,<br>
MutableArrayRef<char> Data, uint64_t Value,<br>
- bool IsResolved) const {<br>
+ bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const {<br>
MCFixupKind Kind = Fixup.getKind();<br>
MCContext &Ctx = Asm.getContext();<br>
Value = adjustFixupValue(Fixup, Value, Ctx);<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h (original)<br>
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h Wed Jun 6 02:40:06 2018<br>
@@ -42,7 +42,8 @@ public:<br>
<br>
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t Value, bool IsResolved) const override;<br>
+ uint64_t Value, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const override;<br>
<br>
Optional<MCFixupKind> getFixupKind(StringRef Name) const override;<br>
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;<br>
@@ -58,7 +59,8 @@ public:<br>
/// relaxation.<br>
///<br>
/// \param Inst - The instruction to test.<br>
- bool mayNeedRelaxation(const MCInst &Inst) const override {<br>
+ bool mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const override {<br>
return false;<br>
}<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp Wed Jun 6 02:40:06 2018<br>
@@ -117,7 +117,8 @@ public:<br>
<br>
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t Value, bool IsResolved) const override {<br>
+ uint64_t Value, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const override {<br>
Value = adjustFixupValue(Fixup.getKind(), Value);<br>
if (!Value) return; // Doesn't change encoding.<br>
<br>
@@ -157,7 +158,8 @@ public:<br>
}<br>
}<br>
<br>
- bool mayNeedRelaxation(const MCInst &Inst) const override {<br>
+ bool mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const override {<br>
// FIXME.<br>
return false;<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp Wed Jun 6 02:40:06 2018<br>
@@ -233,7 +233,8 @@ namespace {<br>
}<br>
}<br>
<br>
- bool mayNeedRelaxation(const MCInst &Inst) const override {<br>
+ bool mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const override {<br>
// FIXME.<br>
return false;<br>
}<br>
@@ -275,7 +276,8 @@ namespace {<br>
<br>
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t Value, bool IsResolved) const override {<br>
+ uint64_t Value, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const override {<br>
<br>
Value = adjustFixupValue(Fixup.getKind(), Value);<br>
if (!Value) return; // Doesn't change encoding.<br>
<br>
Modified: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp Wed Jun 6 02:40:06 2018<br>
@@ -53,8 +53,10 @@ public:<br>
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;<br>
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t Value, bool IsResolved) const override;<br>
- bool mayNeedRelaxation(const MCInst &Inst) const override {<br>
+ uint64_t Value, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const override;<br>
+ bool mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const override {<br>
return false;<br>
}<br>
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,<br>
@@ -96,7 +98,8 @@ void SystemZMCAsmBackend::applyFixup(con<br>
const MCFixup &Fixup,<br>
const MCValue &Target,<br>
MutableArrayRef<char> Data, uint64_t Value,<br>
- bool IsResolved) const {<br>
+ bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const {<br>
MCFixupKind Kind = Fixup.getKind();<br>
unsigned Offset = Fixup.getOffset();<br>
unsigned BitSize = getFixupKindInfo(Kind).TargetSize;<br>
<br>
Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp?rev=334078&r1=334077&r2=334078&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp Wed Jun 6 02:40:06 2018<br>
@@ -101,7 +101,8 @@ public:<br>
<br>
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,<br>
const MCValue &Target, MutableArrayRef<char> Data,<br>
- uint64_t Value, bool IsResolved) const override {<br>
+ uint64_t Value, bool IsResolved,<br>
+ const MCSubtargetInfo *STI) const override {<br>
unsigned Size = 1 << getFixupKindLog2Size(Fixup.getKind());<br>
<br>
assert(Fixup.getOffset() + Size <= Data.size() && "Invalid fixup offset!");<br>
@@ -117,7 +118,8 @@ public:<br>
Data[Fixup.getOffset() + i] = uint8_t(Value >> (i * 8));<br>
}<br>
<br>
- bool mayNeedRelaxation(const MCInst &Inst) const override;<br>
+ bool mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const override;<br>
<br>
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,<br>
const MCRelaxableFragment *DF,<br>
@@ -264,7 +266,8 @@ static unsigned getRelaxedOpcode(const M<br>
return getRelaxedOpcodeBranch(Inst, is16BitMode);<br>
}<br>
<br>
-bool X86AsmBackend::mayNeedRelaxation(const MCInst &Inst) const {<br>
+bool X86AsmBackend::mayNeedRelaxation(const MCInst &Inst,<br>
+ const MCSubtargetInfo &STI) const {<br>
// Branches can always be relaxed in either mode.<br>
if (getRelaxedOpcodeBranch(Inst, false) != Inst.getOpcode())<br>
return true;<br>
<br>
Added: llvm/trunk/test/CodeGen/ARM/relax-per-target-feature.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/relax-per-target-feature.ll?rev=334078&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/relax-per-target-feature.ll?rev=334078&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/ARM/relax-per-target-feature.ll (added)<br>
+++ llvm/trunk/test/CodeGen/ARM/relax-per-target-feature.ll Wed Jun 6 02:40:06 2018<br>
@@ -0,0 +1,34 @@<br>
+; RUN: llc -mtriple=thumbv4t-linux-gnueabi -o - %s | FileCheck %s<br>
+<br>
+; Functions may have more features than the base triple; code generation and<br>
+; instruction selection may be performed based on this information. This test<br>
+; makes sure that the MC layer performs instruction relaxation based on the<br>
+; target-features of the function. The relaxation for tail call is particularly<br>
+; important on Thumb2 as the 16-bit Thumb branch instruction has an extremely<br>
+; short range.<br>
+<br>
+declare dso_local void @g(...) local_unnamed_addr #2<br>
+<br>
+define dso_local void @f() local_unnamed_addr #0 {<br>
+entry:<br>
+ tail call void bitcast (void (...)* @g to void ()*)() #3<br>
+ ret void<br>
+}<br>
+; Function has thumb2 target-feature, tail call is allowed and must be widened.<br>
+; CHECK: f:<br>
+; CHECK: b g<br>
+<br>
+define dso_local void @h() local_unnamed_addr #2 {<br>
+entry:<br>
+ tail call void bitcast (void (...)* @g to void ()*)() #3<br>
+ ret void<br>
+}<br>
+; Function does not have thumb2 target-feature, tail call should not be<br>
+; generated as it cannot be widened.<br>
+; CHECK: h:<br>
+; CHECK: bl g<br>
+<br>
+attributes #0 = { nounwind "disable-tail-calls"="false" "target-cpu"="cortex-a53" "target-features"="+crypto,+fp-armv8,+neon,+soft-float-abi,+strict-align,+thumb-mode,-crc,-dotprod,-dsp,-hwdiv,-hwdiv-arm,-ras" "use-soft-float"="true" }<br>
+<br>
+attributes #2 = { nounwind "disable-tail-calls"="false" "target-cpu"="arm7tdmi" "target-features"="+strict-align,+thumb-mode,-crc,-dotprod,-dsp,-hwdiv,-hwdiv-arm,-ras" "unsafe-fp-math"="false" "use-soft-float"="true" }<br>
+attributes #3 = { nounwind }<br>
<br>
Added: llvm/trunk/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s?rev=334078&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s?rev=334078&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s (added)<br>
+++ llvm/trunk/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s Wed Jun 6 02:40:06 2018<br>
@@ -0,0 +1,16 @@<br>
+# RUN: not llvm-mc -filetype=obj -triple armv7-linux-gnueabi %s -o - 2>&1 | FileCheck %s<br>
+<br>
+ # We cannot switch subtargets mid-bundle<br>
+ .syntax unified<br>
+ .text<br>
+ .bundle_align_mode 4<br>
+ .arch armv4t<br>
+ bx lr<br>
+ .bundle_lock<br>
+ bx lr<br>
+ .arch armv7a<br>
+ movt r0, #0xffff<br>
+ movw r0, #0xffff<br>
+ .bundle_unlock<br>
+ bx lr<br>
+# CHECK: LLVM ERROR: A Bundle can only have one Subtarget.<br>
<br>
Added: llvm/trunk/test/MC/ARM/AlignedBundling/subtarget-change.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/AlignedBundling/subtarget-change.s?rev=334078&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/AlignedBundling/subtarget-change.s?rev=334078&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/AlignedBundling/subtarget-change.s (added)<br>
+++ llvm/trunk/test/MC/ARM/AlignedBundling/subtarget-change.s Wed Jun 6 02:40:06 2018<br>
@@ -0,0 +1,33 @@<br>
+# RUN: llvm-mc -filetype=obj -triple armv7-linux-gnueabi %s -o - \<br>
+# RUN: | llvm-objdump -no-show-raw-insn -triple armv7 -disassemble - | FileCheck %s<br>
+<br>
+ # We can switch subtargets with .arch outside of a bundle<br>
+ .syntax unified<br>
+ .text<br>
+ .bundle_align_mode 4<br>
+ .arch armv4t<br>
+ bx lr<br>
+ .bundle_lock<br>
+ and r1, r1, r1<br>
+ and r1, r1, r1<br>
+ .bundle_unlock<br>
+ bx lr<br>
+<br>
+ # We can switch subtargets at the start of a bundle<br>
+ bx lr<br>
+ .bundle_lock align_to_end<br>
+ .arch armv7a<br>
+ movt r0, #0xffff<br>
+ movw r0, #0xffff<br>
+ .bundle_unlock<br>
+ bx lr<br>
+<br>
+# CHECK: 0: bx lr<br>
+# CHECK-NEXT: 4: and r1, r1, r1<br>
+# CHECK-NEXT: 8: and r1, r1, r1<br>
+# CHECK-NEXT: c: bx lr<br>
+# CHECK-NEXT: 10: bx lr<br>
+# CHECK-NEXT: 14: nop<br>
+# CHECK-NEXT: 18: movt r0, #65535<br>
+# CHECK-NEXT: 1c: movw r0, #65535<br>
+# CHECK-NEXT: 20: bx lr<br>
<br>
Added: llvm/trunk/test/MC/ARM/fixup-per-fragment.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/fixup-per-fragment.s?rev=334078&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/fixup-per-fragment.s?rev=334078&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/fixup-per-fragment.s (added)<br>
+++ llvm/trunk/test/MC/ARM/fixup-per-fragment.s Wed Jun 6 02:40:06 2018<br>
@@ -0,0 +1,20 @@<br>
+@ RUN: not llvm-mc -triple armv7a-linux-gnueabihf %s -filetype=obj -o %s.o 2>&1 | FileCheck %s<br>
+<br>
+@ The relaxations should be applied using the subtarget from the fragment<br>
+@ containing the fixup and not the per module subtarget.<br>
+<br>
+ .syntax unified<br>
+ .thumb<br>
+ @ Place a literal pool out of range of the 16-bit ldr but within<br>
+ @ range of the 32-bit ldr.w<br>
+ .text<br>
+ @ Relaxation to ldr.w as target triple supports Thumb2<br>
+ ldr r0,=0x12345678<br>
+ .arch armv4t<br>
+ @ No relaxation as v4t does not support Thumb<br>
+ @ expect out of range error message<br>
+ ldr r0,=0x87654321<br>
+ .space 1024<br>
+<br>
+@ CHECK: error: out of range pc-relative fixup value<br>
+@ CHECK-NEXT: ldr r0,=0x87654321<br>
<br>
Added: llvm/trunk/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s?rev=334078&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s?rev=334078&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s (added)<br>
+++ llvm/trunk/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s Wed Jun 6 02:40:06 2018<br>
@@ -0,0 +1,16 @@<br>
+# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro %s -o - 2>&1 | FileCheck %s<br>
+# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro -mc-relax-all %s -o - 2>&1 | FileCheck %s<br>
+<br>
+# Switching mode will change subtarget, which we can't do within a bundle<br>
+ .text<br>
+ .code64<br>
+ .bundle_align_mode 4<br>
+foo:<br>
+ pushq %rbp<br>
+ .bundle_lock<br>
+ addl %ebp, %eax<br>
+ .code32<br>
+ movb $0x0, (%si)<br>
+ .bundle_unlock<br>
+<br>
+CHECK: LLVM ERROR: A Bundle can only have one Subtarget.<br>
<br>
<br>
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</blockquote></div><br clear="all"><div><br></div>-- <br><div dir="ltr" class="gmail_signature" data-smartmail="gmail_signature"><div dir="ltr"><div><div dir="ltr"><div>Regards,</div><div>Ilya Biryukov</div></div></div></div></div>