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<p style="margin-top:0;margin-bottom:0">The commit fixes a problem with the amdgpu backend.</p>
<br>
<p></p>
<p style="margin-top:0;margin-bottom:0">I didn't see any build failure on my machine, and I don't plan to build clang because it's not in the LLVM tree nor is it required for amdgpu.<br>
</p>
<p style="margin-top:0;margin-bottom:0"><br>
</p>
Thanks,
<p style="margin-top:0;margin-bottom:0">Marek<br>
</p>
<p style="margin-top:0;margin-bottom:0"><br>
<br>
</p>
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<hr style="display:inline-block;width:98%" tabindex="-1">
<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Aleksey Shlyapnikov <alekseys@google.com><br>
<b>Sent:</b> Monday, April 9, 2018 3:51:32 PM<br>
<b>To:</b> Sean Fertile<br>
<b>Cc:</b> Olsak, Marek; llvm-commits<br>
<b>Subject:</b> Re: [llvm] r329591 - AMDGPU: enable 128-bit for local addr space under an option</font>
<div> </div>
</div>
<div>
<div dir="ltr">Reverted, r329610<br>
</div>
<div class="x_gmail_extra"><br>
<div class="x_gmail_quote">On Mon, Apr 9, 2018 at 12:10 PM, Sean Fertile <span dir="ltr">
<<a href="mailto:sfertile@ca.ibm.com" target="_blank">sfertile@ca.ibm.com</a>></span> wrote:<br>
<blockquote class="x_gmail_quote" style="margin:0 0 0 .8ex; border-left:1px #ccc solid; padding-left:1ex">
<div class="x_m_-7587742234498310362socmaildefaultfont" dir="ltr" style="font-family:Arial,Helvetica,sans-serif; font-size:10.5pt">
<div dir="ltr">Seeing the same failures on a number of the PowerPC build bots as well:</div>
<div dir="ltr"> </div>
<div dir="ltr"><a href="http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/17374" target="_blank">http://lab.llvm.org:8011/<wbr>builders/clang-ppc64be-linux/<wbr>builds/17374</a></div>
<div dir="ltr"><a href="http://lab.llvm.org:8011/builders/clang-ppc64le-linux/builds/15992" target="_blank">http://lab.llvm.org:8011/<wbr>builders/clang-ppc64le-linux/<wbr>builds/15992</a></div>
<div dir="ltr"><a href="http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt" target="_blank">http://lab.llvm.org:8011/<wbr>builders/clang-ppc64be-linux-<wbr>lnt</a></div>
<div dir="ltr"><a href="http://lab.llvm.org:8011/builders/clang-ppc64le-linux-lnt/builds/11251" target="_blank">http://lab.llvm.org:8011/<wbr>builders/clang-ppc64le-linux-<wbr>lnt/builds/11251</a></div>
<div dir="ltr"> </div>
<blockquote dir="ltr" style="border-left:solid #aaaaaa 2px; margin-left:5px; padding-left:5px; direction:ltr; margin-right:0px">
<div>
<div class="x_h5">----- Original message -----<br>
From: Aleksey Shlyapnikov via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>><br>
Sent by: "llvm-commits" <<a href="mailto:llvm-commits-bounces@lists.llvm.org" target="_blank">llvm-commits-bounces@lists.<wbr>llvm.org</a>><br>
To: Marek Olsak <<a href="mailto:marek.olsak@amd.com" target="_blank">marek.olsak@amd.com</a>><br>
Cc: llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>><br>
Subject: Re: [llvm] r329591 - AMDGPU: enable 128-bit for local addr space under an option<br>
Date: Mon, Apr 9, 2018 2:10 PM<br>
<div dir="ltr">Here's another one: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__lab.llvm.org-3A8011_builders_clang-2Dx86-5F64-2Ddebian-2Dfast_builds_9495&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=1YnPtk3HtYEpDZk-vTlsNPq5471jOT5AdFe_XQowYAM&e=" target="_blank">http://lab.llvm.org:8011/<wbr>builders/clang-x86_64-debian-<wbr>fast/builds/9495</a></div>
<div>
<div>On Mon, Apr 9, 2018 at 10:37 AM, Aleksey Shlyapnikov <span dir="ltr"><<a href="mailto:alekseys@google.com" target="_blank">alekseys@google.com</a>></span> wrote:
<blockquote style="margin:0 0 0 .8ex; border-left:1px #ccc solid; padding-left:1ex">
<div dir="ltr">It seems that at least one bot is unhappy about this change: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__lab.llvm.org-3A8011_builders_sanitizer-2Dx86-5F64-2Dlinux-2Dfast_builds_16516&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=d0BxYvhHJkBlpHbgMyWBQPj77AKVTbrZApOJARfAqxk&e=" target="_blank">http://lab.llvm.org:80<wbr>11/builders/sanitizer-x86_64-<wbr>linux-fast/builds/16516</a></div>
<div>
<div>
<div>
<div>On Mon, Apr 9, 2018 at 9:56 AM, Marek Olsak via llvm-commits <span dir="ltr">
<<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:
<blockquote style="margin:0 0 0 .8ex; border-left:1px #ccc solid; padding-left:1ex">
Author: mareko<br>
Date: Mon Apr 9 09:56:32 2018<br>
New Revision: 329591<br>
<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject-3Frev-3D329591-26view-3Drev&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=uppnpLNtlwsKDBTw2srbs-HGnUOp98M03kzNG0my3I8&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject?rev=329591&view=rev</a><br>
Log:<br>
AMDGPU: enable 128-bit for local addr space under an option<br>
<br>
Author: Samuel Pitoiset<br>
<br>
ds_read_b128 and ds_write_b128 have been recently enabled<br>
under the amdgpu-ds128 option because the performance benefit<br>
is unclear.<br>
<br>
Though, using 128-bit loads/stores for the local address space<br>
appears to introduce regressions in tessellation shaders. Not<br>
sure what is broken, but as ds_read_b128/ds_write_b128 are not<br>
enabled by default, just introduce a global option and enable<br>
128-bit only if requested (until it's fixed/used correctly).<br>
<br>
Bugzilla: <a href="https://urldefense.proofpoint.com/v2/url?u=https-3A__bugs.freedesktop.org_show-5Fbug.cgi-3Fid-3D105464&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=mWOcLWQ37HSNF5Xjm9hQnnMnFjPwQvUKuduKD7v_iaI&e=" rel="noreferrer" target="_blank">
https://bugs.freedesktop.org/s<wbr>how_bug.cgi?id=105464</a><br>
<br>
Modified:<br>
llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPU.td<br>
llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.cpp<br>
llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.h<br>
llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUTargetTransformInfo.cpp<br>
llvm/trunk/lib/Target/AMDGPU/S<wbr>IISelLowering.cpp<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f32.ll<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f64.ll<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i16.ll<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i32.ll<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i64.ll<br>
llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i8.ll<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPU.td<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_AMDGPU_AMDGPU.td-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=S1yx_Z2TyfECvqNqy5E6-yY7yb4tpzaDEL708DOP70o&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/AM<wbr>DGPU/AMDGPU.td?rev=329591&r1=3<wbr>29590&r2=329591&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPU.td (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPU.td Mon Apr 9 09:56:32 2018<br>
@@ -426,6 +426,12 @@ def FeatureEnableSIScheduler : Subtarget<br>
"Enable SI Machine Scheduler"<br>
>;<br>
<br>
+def FeatureEnableDS128 : SubtargetFeature<"enable-ds128<wbr>",<br>
+ "EnableDS128",<br>
+ "true",<br>
+ "Use ds_{read|write}_b128"<br>
+>;<br>
+<br>
// Unless +-flat-for-global is specified, turn on FlatForGlobal for<br>
// all OS-es on VI and newer hardware to avoid assertion failures due<br>
// to missing ADDR64 variants of MUBUF instructions.<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.cpp<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_AMDGPU_AMDGPUSubtarget.cpp-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=glXA2WN4zyRXLoDB9YvkGQIVw1mGq4ZCOTCkZtocpCg&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/AM<wbr>DGPU/AMDGPUSubtarget.cpp?rev=3<wbr>29591&r1=329590&r2=329591&view<wbr>=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.cpp (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.cpp Mon Apr 9 09:56:32 2018<br>
@@ -132,6 +132,7 @@ AMDGPUSubtarget::AMDGPUSubtarg<wbr>et(const T<br>
EnableLoadStoreOpt(false),<br>
EnableUnsafeDSOffsetFolding(f<wbr>alse),<br>
EnableSIScheduler(false),<br>
+ EnableDS128(false),<br>
DumpCode(false),<br>
<br>
FP64(false),<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.h<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_AMDGPU_AMDGPUSubtarget.h-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=cT3BKoDCAjbWwDP6hoT8CPFvJ-pK5XFfO52nGKwKCpM&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/AM<wbr>DGPU/AMDGPUSubtarget.h?rev=329<wbr>591&r1=329590&r2=329591&view=d<wbr>iff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.h (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUSubtarget.h Mon Apr 9 09:56:32 2018<br>
@@ -133,6 +133,7 @@ protected:<br>
bool EnableLoadStoreOpt;<br>
bool EnableUnsafeDSOffsetFolding;<br>
bool EnableSIScheduler;<br>
+ bool EnableDS128;<br>
bool DumpCode;<br>
<br>
// Subtarget statically properties set by tablegen<br>
@@ -412,8 +413,8 @@ public:<br>
<br>
/// \returns If target supports ds_read/write_b128 and user enables generation<br>
/// of ds_read/write_b128.<br>
- bool useDS128(bool UserEnable) const {<br>
- return CIInsts && UserEnable;<br>
+ bool useDS128() const {<br>
+ return CIInsts && EnableDS128;<br>
}<br>
<br>
/// \returns If MUBUF instructions always perform range checking, even for<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUTargetTransformInfo.cpp<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_AMDGPU_AMDGPUTargetTransformInfo.cpp-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=hAdbzwHqVxbsrCfLd5tOp-WSamczYGs2vZwcsJLbPPs&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/AM<wbr>DGPU/AMDGPUTargetTransformInfo<wbr>.cpp?rev=329591&r1=329590&r2=3<wbr>29591&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUTargetTransformInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/A<wbr>MDGPUTargetTransformInfo.cpp Mon Apr 9 09:56:32 2018<br>
@@ -265,11 +265,13 @@ unsigned AMDGPUTTIImpl::getLoadStoreVec<wbr>R<br>
return 512;<br>
}<br>
<br>
- if (AddrSpace == AS.FLAT_ADDRESS ||<br>
- AddrSpace == AS.LOCAL_ADDRESS ||<br>
- AddrSpace == AS.REGION_ADDRESS)<br>
+ if (AddrSpace == AS.FLAT_ADDRESS)<br>
return 128;<br>
<br>
+ if (AddrSpace == AS.LOCAL_ADDRESS ||<br>
+ AddrSpace == AS.REGION_ADDRESS)<br>
+ return ST->useDS128() ? 128 : 64;<br>
+<br>
if (AddrSpace == AS.PRIVATE_ADDRESS)<br>
return 8 * ST->getMaxPrivateElementSize()<wbr>;<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/S<wbr>IISelLowering.cpp<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_AMDGPU_SIISelLowering.cpp-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=evY3u2DvGCjraWUyb-B7CsrXDeSIo7KtBbSZFbuwCsc&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/AM<wbr>DGPU/SIISelLowering.cpp?rev=32<wbr>9591&r1=329590&r2=329591&view=<wbr>diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/S<wbr>IISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/S<wbr>IISelLowering.cpp Mon Apr 9 09:56:32 2018<br>
@@ -94,11 +94,6 @@ static cl::opt<bool> EnableVGPRIndexMode<br>
cl::desc("Use GPR indexing mode instead of movrel for vector indexing"),<br>
cl::init(false));<br>
<br>
-static cl::opt<bool> EnableDS128(<br>
- "amdgpu-ds128",<br>
- cl::desc("Use DS_read/write_b128"),<br>
- cl::init(false));<br>
-<br>
static cl::opt<unsigned> AssumeFrameIndexHighZeroBits(<br>
"amdgpu-frame-index-zero-bits<wbr>",<br>
cl::desc("High bits of frame index assumed to be zero"),<br>
@@ -5300,7 +5295,7 @@ SDValue SITargetLowering::LowerLOAD(SD<wbr>Va<br>
}<br>
} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {<br>
// Use ds_read_b128 if possible.<br>
- if (Subtarget->useDS128(EnableDS1<wbr>28) && Load->getAlignment() >= 16 &&<br>
+ if (Subtarget->useDS128() && Load->getAlignment() >= 16 &&<br>
MemVT.getStoreSize() == 16)<br>
return SDValue();<br>
<br>
@@ -5703,7 +5698,7 @@ SDValue SITargetLowering::LowerSTORE(S<wbr>DV<br>
}<br>
} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {<br>
// Use ds_write_b128 if possible.<br>
- if (Subtarget->useDS128(EnableDS1<wbr>28) && Store->getAlignment() >= 16 &&<br>
+ if (Subtarget->useDS128() && Store->getAlignment() >= 16 &&<br>
VT.getStoreSize() == 16)<br>
return SDValue();<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f32.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Df32.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=b6eEQFv_AOJXWAXNPkeFOfOaw4U2-GZwLcb7XCOPGL0&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-f32.ll?rev=3<wbr>29591&r1=329590&r2=329591&view<wbr>=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f32.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f32.ll Mon Apr 9 09:56:32 2018<br>
@@ -3,9 +3,9 @@<br>
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s<br>
<br>
; Testing for ds_read/write_128<br>
-; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}load_f32_local:<br>
; SICIVI: s_mov_b32 m0<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f64.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Df64.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=nv-eRBhJ92Mc2j-Nzcy1oqtUqZ98S21G53BOioVefno&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-f64.ll?rev=3<wbr>29591&r1=329590&r2=329591&view<wbr>=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f64.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-f64.ll Mon Apr 9 09:56:32 2018<br>
@@ -5,8 +5,8 @@<br>
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s<br>
<br>
; Testing for ds_read_b128<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}local_load_f64:<br>
; SICIV: s_mov_b32 m0<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i16.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Di16.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=NoJhnssC9Ub6oCzFgJPBMp1UByUnVZML6bpPIeI4iys&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-i16.ll?rev=3<wbr>29591&r1=329590&r2=329591&view<wbr>=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i16.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i16.ll Mon Apr 9 09:56:32 2018<br>
@@ -4,8 +4,8 @@<br>
; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s<br>
<br>
; Testing for ds_read/write_b128<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}local_load_i16:<br>
; GFX9-NOT: m0<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i32.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Di32.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=Ft1bPglUP6igofQXmSCW1ik6x_JMy26WFmBuE-Tm-II&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-i32.ll?rev=3<wbr>29591&r1=329590&r2=329591&view<wbr>=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i32.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i32.ll Mon Apr 9 09:56:32 2018<br>
@@ -4,9 +4,9 @@<br>
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s<br>
<br>
; Testing for ds_read/write_128<br>
-; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}local_load_i32:<br>
; GCN-NOT: s_wqm_b64<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i64.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Di64.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=GCb8UEh1OZqAVn1paqsnzTMDBn-sDqWVLM3zVH3-B5g&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-i64.ll?rev=3<wbr>29591&r1=329590&r2=329591&view<wbr>=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i64.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i64.ll Mon Apr 9 09:56:32 2018<br>
@@ -5,8 +5,8 @@<br>
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s<br>
<br>
; Testing for ds_read/write_b128<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}local_load_i64:<br>
; SICIVI: s_mov_b32 m0<br>
<br>
Modified: llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i8.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Di8.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=YWjWjWFunygvvcG9TTz4rPZnoAMx4ehscSTeZ-Kz5gw&e=" rel="noreferrer" target="_blank">
http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>AMDGPU/load-local-i8.ll?rev=32<wbr>9591&r1=329590&r2=329591&view=<wbr>diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i8.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AMDGPU<wbr>/load-local-i8.ll Mon Apr 9 09:56:32 2018<br>
@@ -4,8 +4,8 @@<br>
; RUN: llc -march=r600 -mtriple=r600---amdgiz -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s<br>
<br>
; Testing for ds_read/write_b128<br>
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s<br>
<br>
; FUNC-LABEL: {{^}}local_load_i8:<br>
; GCN-NOT: s_wqm_b64<br>
<br>
<br>
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