<div dir="ltr"><div>[This time to everyone.]</div><div><br></div>This revision added the SecurePLT field, but missed initializing it. I have committed r328667 to fix, as below.<div><br></div><div><div style="color:rgb(34,34,34);font-family:arial,sans-serif;font-size:12.8px;font-style:normal;font-variant-ligatures:normal;font-variant-caps:normal;font-weight:400;letter-spacing:normal;text-align:start;text-indent:0px;text-transform:none;white-space:normal;word-spacing:0px;background-color:rgb(255,255,255);text-decoration-style:initial;text-decoration-color:initial"><div>Index: lib/Target/PowerPC/PPCSubtarge<wbr>t.cpp</div><div>==============================<wbr>==============================<wbr>=======</div><div>--- lib/Target/PowerPC/PPCSubtarge<wbr>t.cpp<span style="white-space:pre-wrap"> </span>(revision 328666)</div><div>+++ lib/Target/PowerPC/PPCSubtarge<wbr>t.cpp<span style="white-space:pre-wrap"> </span>(revision 328667)</div><div>@@ -106,6 +106,7 @@</div><div> HasFloat128 = false;</div><div> IsISA3_0 = false;</div><div> UseLongCalls = false;</div><div>+ SecurePlt = false;</div><div> </div><div> HasPOPCNTD = POPCNTD_Unavailable;</div><div> }</div></div><div class="gmail-yj6qo" style="color:rgb(34,34,34);font-family:arial,sans-serif;font-size:12.8px;font-style:normal;font-variant-ligatures:normal;font-variant-caps:normal;font-weight:400;letter-spacing:normal;text-align:start;text-indent:0px;text-transform:none;white-space:normal;word-spacing:0px;background-color:rgb(255,255,255);text-decoration-style:initial;text-decoration-color:initial"></div><br class="gmail-Apple-interchange-newline"></div><br></div><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Mar 27, 2018 at 11:55 AM, Galina Kistanova via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hello Strahinja,<br><br>This commit broke tests at one of our builders:<br><br><a href="http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/8693" target="_blank">http://lab.llvm.org:8011/<wbr>builders/llvm-clang-x86_64-<wbr>expensive-checks-win/builds/<wbr>8693</a><br><br>. . .<br>Failing Tests (7):<br> LLVM :: CodeGen/PowerPC/2008-10-28-<wbr>f128-i32.ll<br> LLVM :: CodeGen/PowerPC/big-endian-<wbr>formal-args.ll<br> LLVM :: CodeGen/PowerPC/calls.ll<br> LLVM :: CodeGen/PowerPC/crsave.ll<br> LLVM :: CodeGen/PowerPC/debuginfo-<wbr>split-int.ll<br> LLVM :: CodeGen/PowerPC/ppc32-pic-<wbr>large.ll<br> LLVM :: CodeGen/PowerPC/stack-realign.<wbr>ll<br><br>Please have a look?<br><br>Thanks<br><br>Galina<br></div><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Mar 27, 2018 at 4:23 AM, Strahinja Petrovic via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: spetrovic<br>
Date: Tue Mar 27 04:23:53 2018<br>
New Revision: 328617<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=328617&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject?rev=328617&view=rev</a><br>
Log:<br>
[PowerPC] Secure PLT support<br>
<br>
This patch supports secure PLT mode for PowerPC 32 architecture.<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D42112" rel="noreferrer" target="_blank">https://reviews.llvm.org/D4211<wbr>2</a><br>
<br>
Modified:<br>
llvm/trunk/lib/Target/PowerPC/<wbr>PPC.td<br>
llvm/trunk/lib/Target/PowerPC/<wbr>PPCAsmPrinter.cpp<br>
llvm/trunk/lib/Target/PowerPC/<wbr>PPCISelDAGToDAG.cpp<br>
llvm/trunk/lib/Target/PowerPC/<wbr>PPCMCInstLower.cpp<br>
llvm/trunk/lib/Target/PowerPC/<wbr>PPCSubtarget.h<br>
llvm/trunk/test/CodeGen/PowerP<wbr>C/ppc32-pic-large.ll<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/<wbr>PPC.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPC.td?rev=328617&r1=328616&r2=328617&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/Po<wbr>werPC/PPC.td?rev=328617&r1=328<wbr>616&r2=328617&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/PowerPC/<wbr>PPC.td (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/<wbr>PPC.td Tue Mar 27 04:23:53 2018<br>
@@ -119,6 +119,8 @@ def FeatureMSYNC : SubtargetFeature<<br>
[FeatureBookE]>;<br>
def FeatureE500 : SubtargetFeature<"e500", "IsE500", "true",<br>
"Enable E500/E500mc instructions">;<br>
+def FeatureSecurePlt : SubtargetFeature<"secure-plt",<wbr>"SecurePlt", "true",<br>
+ "Enable secure plt mode">;<br>
def FeaturePPC4xx : SubtargetFeature<"ppc4xx", "IsPPC4xx", "true",<br>
"Enable PPC 4xx instructions">;<br>
def FeaturePPC6xx : SubtargetFeature<"ppc6xx", "IsPPC6xx", "true",<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/<wbr>PPCAsmPrinter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=328617&r1=328616&r2=328617&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/Po<wbr>werPC/PPCAsmPrinter.cpp?rev=32<wbr>8617&r1=328616&r2=328617&view=<wbr>diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/PowerPC/<wbr>PPCAsmPrinter.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/<wbr>PPCAsmPrinter.cpp Tue Mar 27 04:23:53 2018<br>
@@ -563,33 +563,63 @@ void PPCAsmPrinter::EmitInstruction<wbr>(cons<br>
// Transform %rd = UpdateGBR(%rt, %ri)<br>
// Into: lwz %rt, .L0$poff - .L0$pb(%ri)<br>
// add %rd, %rt, %ri<br>
+ // or into (if secure plt mode is on):<br>
+ // addis r30, r30, .LTOC - .L0$pb@ha<br>
+ // addi r30, r30, .LTOC - .L0$pb@l<br>
// Get the offset from the GOT Base Register to the GOT<br>
LowerPPCMachineInstrToMCInst(<wbr>MI, TmpInst, *this, isDarwin);<br>
- MCSymbol *PICOffset =<br>
- MF->getInfo<PPCFunctionInfo>()<wbr>->getPICOffsetSymbol();<br>
- TmpInst.setOpcode(PPC::LWZ);<br>
- const MCExpr *Exp =<br>
- MCSymbolRefExpr::create(PICOff<wbr>set, MCSymbolRefExpr::VK_None, OutContext);<br>
- const MCExpr *PB =<br>
- MCSymbolRefExpr::create(MF->ge<wbr>tPICBaseSymbol(),<br>
- MCSymbolRefExpr::VK_None,<br>
- OutContext);<br>
- const MCOperand TR = TmpInst.getOperand(1);<br>
- const MCOperand PICR = TmpInst.getOperand(0);<br>
+ if (Subtarget->isSecurePlt() && isPositionIndependent() ) {<br>
+ unsigned PICR = TmpInst.getOperand(0).getReg()<wbr>;<br>
+ MCSymbol *LTOCSymbol = OutContext.getOrCreateSymbol(S<wbr>tringRef(".LTOC"));<br>
+ const MCExpr *PB =<br>
+ MCSymbolRefExpr::create(MF->ge<wbr>tPICBaseSymbol(),<br>
+ OutContext);<br>
<br>
- // Step 1: lwz %rt, .L$poff - .L$pb(%ri)<br>
- TmpInst.getOperand(1) =<br>
- MCOperand::createExpr(MCBinary<wbr>Expr::createSub(Exp, PB, OutContext));<br>
- TmpInst.getOperand(0) = TR;<br>
- TmpInst.getOperand(2) = PICR;<br>
- EmitToStreamer(*OutStreamer, TmpInst);<br>
+ const MCExpr *LTOCDeltaExpr =<br>
+ MCBinaryExpr::createSub(MCSymb<wbr>olRefExpr::create(LTOCSymbol, OutContext),<br>
+ PB, OutContext);<br>
+<br>
+ const MCExpr *LTOCDeltaHi =<br>
+ PPCMCExpr::createHa(LTOCDeltaE<wbr>xpr, false, OutContext);<br>
+ EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)<br>
+ .addReg(PICR)<br>
+ .addReg(PICR)<br>
+ .addExpr(LTOCDeltaHi));<br>
+<br>
+ const MCExpr *LTOCDeltaLo =<br>
+ PPCMCExpr::createLo(LTOCDeltaE<wbr>xpr, false, OutContext);<br>
+ EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI)<br>
+ .addReg(PICR)<br>
+ .addReg(PICR)<br>
+ .addExpr(LTOCDeltaLo));<br>
+ return;<br>
+ } else {<br>
+ MCSymbol *PICOffset =<br>
+ MF->getInfo<PPCFunctionInfo>()<wbr>->getPICOffsetSymbol();<br>
+ TmpInst.setOpcode(PPC::LWZ);<br>
+ const MCExpr *Exp =<br>
+ MCSymbolRefExpr::create(PICOff<wbr>set, MCSymbolRefExpr::VK_None, OutContext);<br>
+ const MCExpr *PB =<br>
+ MCSymbolRefExpr::create(MF->ge<wbr>tPICBaseSymbol(),<br>
+ MCSymbolRefExpr::VK_None,<br>
+ OutContext);<br>
+ const MCOperand TR = TmpInst.getOperand(1);<br>
+ const MCOperand PICR = TmpInst.getOperand(0);<br>
<br>
- TmpInst.setOpcode(PPC::ADD4);<br>
- TmpInst.getOperand(0) = PICR;<br>
- TmpInst.getOperand(1) = TR;<br>
- TmpInst.getOperand(2) = PICR;<br>
- EmitToStreamer(*OutStreamer, TmpInst);<br>
- return;<br>
+ // Step 1: lwz %rt, .L$poff - .L$pb(%ri)<br>
+ TmpInst.getOperand(1) =<br>
+ MCOperand::createExpr(MCBinary<wbr>Expr::createSub(Exp, PB, OutContext));<br>
+ TmpInst.getOperand(0) = TR;<br>
+ TmpInst.getOperand(2) = PICR;<br>
+ EmitToStreamer(*OutStreamer, TmpInst);<br>
+<br>
+ TmpInst.setOpcode(PPC::ADD4);<br>
+ TmpInst.getOperand(0) = PICR;<br>
+ TmpInst.getOperand(1) = TR;<br>
+ TmpInst.getOperand(2) = PICR;<br>
+ EmitToStreamer(*OutStreamer, TmpInst);<br>
+ return;<br>
+ }<br>
}<br>
case PPC::LWZtoc: {<br>
// Transform %r3 = LWZtoc @min1, %r2<br>
@@ -1233,7 +1263,7 @@ void PPCLinuxAsmPrinter::EmitFuncti<wbr>onEnt<br>
<br>
if (!Subtarget->isPPC64()) {<br>
const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>()<wbr>;<br>
- if (PPCFI->usesPICBase()) {<br>
+ if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) {<br>
MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol();<br>
MCSymbol *PICBase = MF->getPICBaseSymbol();<br>
OutStreamer->EmitLabel(RelocS<wbr>ymbol);<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/<wbr>PPCISelDAGToDAG.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=328617&r1=328616&r2=328617&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/Po<wbr>werPC/PPCISelDAGToDAG.cpp?rev=<wbr>328617&r1=328616&r2=328617&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/PowerPC/<wbr>PPCISelDAGToDAG.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/<wbr>PPCISelDAGToDAG.cpp Tue Mar 27 04:23:53 2018<br>
@@ -4001,6 +4001,27 @@ void PPCDAGToDAGISel::Select(SDNode *N)<br>
return;<br>
break;<br>
<br>
+ case PPCISD::CALL: {<br>
+ const Module *M = MF->getFunction().getParent();<br>
+<br>
+ if (PPCLowering->getPointerTy(Cur<wbr>DAG->getDataLayout()) != MVT::i32 ||<br>
+ !PPCSubTarget->isSecurePlt() || !PPCSubTarget->isTargetELF() ||<br>
+ M->getPICLevel() == PICLevel::SmallPIC)<br>
+ break;<br>
+<br>
+ SDValue Op = N->getOperand(1);<br>
+<br>
+ if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(<wbr>Op)) {<br>
+ if (GA->getTargetFlags() == PPCII::MO_PLT)<br>
+ getGlobalBaseReg();<br>
+ }<br>
+ else if (ExternalSymbolSDNode *ES = dyn_cast<ExternalSymbolSDNode><wbr>(Op)) {<br>
+ if (ES->getTargetFlags() == PPCII::MO_PLT)<br>
+ getGlobalBaseReg();<br>
+ }<br>
+ }<br>
+ break;<br>
+<br>
case PPCISD::GlobalBaseReg:<br>
ReplaceNode(N, getGlobalBaseReg());<br>
return;<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/<wbr>PPCMCInstLower.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMCInstLower.cpp?rev=328617&r1=328616&r2=328617&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/Po<wbr>werPC/PPCMCInstLower.cpp?rev=<wbr>328617&r1=328616&r2=328617&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/PowerPC/<wbr>PPCMCInstLower.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/<wbr>PPCMCInstLower.cpp Tue Mar 27 04:23:53 2018<br>
@@ -107,10 +107,20 @@ static MCOperand GetSymbolRef(const Mach<br>
break;<br>
}<br>
<br>
- if (MO.getTargetFlags() == PPCII::MO_PLT)<br>
+ if (MO.getTargetFlags() == PPCII::MO_PLT)<br>
RefKind = MCSymbolRefExpr::VK_PLT;<br>
<br>
+ const MachineFunction *MF = MO.getParent()->getParent()->g<wbr>etParent();<br>
+ const PPCSubtarget *Subtarget = &(MF->getSubtarget<PPCSubtarge<wbr>t>());<br>
+ const TargetMachine &TM = Printer.TM;<br>
const MCExpr *Expr = MCSymbolRefExpr::create(Symbol<wbr>, RefKind, Ctx);<br>
+ // -msecure-plt option works only in PIC mode. If secure plt mode<br>
+ // is on add 32768 to symbol.<br>
+ if (Subtarget->isSecurePlt() && TM.isPositionIndependent() &&<br>
+ MO.getTargetFlags() == PPCII::MO_PLT)<br>
+ Expr = MCBinaryExpr::createAdd(Expr,<br>
+ MCConstantExpr::create(32768, Ctx),<br>
+ Ctx);<br>
<br>
if (!MO.isJTI() && MO.getOffset())<br>
Expr = MCBinaryExpr::createAdd(Expr,<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/<wbr>PPCSubtarget.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h?rev=328617&r1=328616&r2=328617&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/Po<wbr>werPC/PPCSubtarget.h?rev=32861<wbr>7&r1=328616&r2=328617&view=<wbr>diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/PowerPC/<wbr>PPCSubtarget.h (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/<wbr>PPCSubtarget.h Tue Mar 27 04:23:53 2018<br>
@@ -133,6 +133,7 @@ protected:<br>
bool HasFloat128;<br>
bool IsISA3_0;<br>
bool UseLongCalls;<br>
+ bool SecurePlt;<br>
<br>
POPCNTDKind HasPOPCNTD;<br>
<br>
@@ -255,6 +256,7 @@ public:<br>
bool hasOnlyMSYNC() const { return HasOnlyMSYNC; }<br>
bool isPPC4xx() const { return IsPPC4xx; }<br>
bool isPPC6xx() const { return IsPPC6xx; }<br>
+ bool isSecurePlt() const {return SecurePlt; }<br>
bool isE500() const { return IsE500; }<br>
bool isFeatureMFTB() const { return FeatureMFTB; }<br>
bool isDeprecatedDST() const { return DeprecatedDST; }<br>
<br>
Modified: llvm/trunk/test/CodeGen/PowerP<wbr>C/ppc32-pic-large.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ppc32-pic-large.ll?rev=328617&r1=328616&r2=328617&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>PowerPC/ppc32-pic-large.ll?<wbr>rev=328617&r1=328616&r2=<wbr>328617&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/PowerP<wbr>C/ppc32-pic-large.ll (original)<br>
+++ llvm/trunk/test/CodeGen/PowerP<wbr>C/ppc32-pic-large.ll Tue Mar 27 04:23:53 2018<br>
@@ -1,4 +1,5 @@<br>
; RUN: llc < %s -mtriple=powerpc-unknown-linux<wbr>-gnu -relocation-model=pic | FileCheck -check-prefix=LARGE-BSS %s<br>
+; RUN: llc < %s -mtriple=powerpc-unknown-linux<wbr>-gnu -mattr=+secure-plt -relocation-model=pic | FileCheck -check-prefix=LARGE-SECUREPLT %s<br>
@bar = common global i32 0, align 4<br>
<br>
declare i32 @call_foo(i32, ...)<br>
@@ -29,3 +30,6 @@ entry:<br>
; LARGE-BSS: [[VREF]]:<br>
; LARGE-BSS-NEXT: .p2align 2<br>
; LARGE-BSS-NEXT: .long bar<br>
+; LARGE-SECUREPLT: addis 30, 30, .LTOC-.L0$pb@ha<br>
+; LARGE-SECUREPLT: addi 30, 30, .LTOC-.L0$pb@l<br>
+; LARGE-SECUREPLT: bl call_foo@PLT+32768<br>
<br>
<br>
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