<div dir="ltr"><div><div>Thanks,<br><br></div>Sorry for the inconvenience.<br><br></div>Amaury Séchet<br></div><div class="gmail_extra"><br><div class="gmail_quote">2018-01-30 15:16 GMT+01:00 Eric Liu <span dir="ltr"><<a href="mailto:ioeric@google.com" target="_blank">ioeric@google.com</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hi Amaury,<div><br></div><div>I am seeing crash in llc caused by this commit. A repro is attached. Please run llc (with assertion on) to reproduce the crash. I'll revert the commit for now. Let me know if you need more information from me.</div><div><br></div><div>```</div><div>./bin/llc repro.ll<br></div><div><div>/home/ioeric/llvm/lib/CodeGen/<wbr>SelectionDAG/InstrEmitter.cpp:<wbr>469: unsigned int llvm::InstrEmitter::<wbr>ConstrainForSubReg(unsigned int, unsigned int, llvm::MVT, const llvm::DebugLoc &): Assertion `RC && "No legal register class for VT supports that SubIdx"' failed.</div><div>#0 0x0000000002fc9134 PrintStackTraceSignalHandler(<wbr>void*) (./bin/llc+0x2fc9134)</div><div>#1 0x0000000002fc9496 SignalHandler(int) (./bin/llc+0x2fc9496)</div><div>#2 0x00007fa2af1690c0 __restore_rt (/lib/x86_64-linux-gnu/<wbr>libpthread.so.0+0x110c0)</div><div>#3 0x00007fa2adcfefcf gsignal (/lib/x86_64-linux-gnu/libc.<wbr>so.6+0x32fcf)</div><div>#4 0x00007fa2add003fa abort (/lib/x86_64-linux-gnu/libc.<wbr>so.6+0x343fa)</div><div>#5 0x00007fa2adcf7e37 (/lib/x86_64-linux-gnu/libc.<wbr>so.6+0x2be37)</div><div>#6 0x00007fa2adcf7ee2 (/lib/x86_64-linux-gnu/libc.<wbr>so.6+0x2bee2)</div><div>#7 0x0000000002dc3883 llvm::InstrEmitter::<wbr>ConstrainForSubReg(unsigned int, unsigned int, llvm::MVT, llvm::DebugLoc const&) (./bin/llc+0x2dc3883)</div><div>#8 0x0000000002dc3ebe llvm::InstrEmitter::<wbr>EmitSubregNode(llvm::SDNode*, llvm::DenseMap<llvm::SDValue, unsigned int, llvm::DenseMapInfo<llvm::<wbr>SDValue>, llvm::detail::DenseMapPair<<wbr>llvm::SDValue, unsigned int> >&, bool, bool) (./bin/llc+0x2dc3ebe)</div><div>#9 0x0000000002dd7c29 llvm::ScheduleDAGSDNodes::<wbr>EmitSchedule(llvm::<wbr>MachineInstrBundleIterator<<wbr>llvm::MachineInstr, false>&) (./bin/llc+0x2dd7c29)</div><div>#10 0x0000000002e81fe2 llvm::SelectionDAGISel::<wbr>CodeGenAndEmitDAG() (./bin/llc+0x2e81fe2)</div><div>#11 0x0000000002e7ecd8 llvm::SelectionDAGISel::<wbr>SelectAllBasicBlocks(llvm::<wbr>Function const&) (./bin/llc+0x2e7ecd8)</div><div>#12 0x0000000002e7adc4 llvm::SelectionDAGISel::<wbr>runOnMachineFunction(llvm::<wbr>MachineFunction&) (./bin/llc+0x2e7adc4)</div><div>#13 0x00000000022f69b1 (anonymous namespace)::X86DAGToDAGISel::<wbr>runOnMachineFunction(llvm::<wbr>MachineFunction&) (./bin/llc+0x22f69b1)</div><div>#14 0x000000000268b5e8 llvm::MachineFunctionPass::<wbr>runOnFunction(llvm::Function&) (./bin/llc+0x268b5e8)</div><div>#15 0x00000000029a775f llvm::FPPassManager::<wbr>runOnFunction(llvm::Function&) (./bin/llc+0x29a775f)</div><div>#16 0x00000000029a7a23 llvm::FPPassManager::<wbr>runOnModule(llvm::Module&) (./bin/llc+0x29a7a23)</div><div>#17 0x00000000029a7f49 llvm::legacy::PassManagerImpl:<wbr>:run(llvm::Module&) (./bin/llc+0x29a7f49)</div><div>#18 0x00000000017f18d1 compileModule(char**, llvm::LLVMContext&) (./bin/llc+0x17f18d1)</div><div>#19 0x00000000017ef0eb main (./bin/llc+0x17ef0eb)</div><div>#20 0x00007fa2adcec2b1 __libc_start_main (/lib/x86_64-linux-gnu/libc.<wbr>so.6+0x202b1)</div><div>#21 0x00000000017ee02a _start (./bin/llc+0x17ee02a)</div><div>Stack dump:</div><div>0. Program arguments: ./bin/llc repro.ll</div><div>1. Running pass 'Function Pass Manager' on module 'repro.ll'.</div><div>2. Running pass 'X86 DAG->DAG Instruction Selection' on function '@str_copy'</div><div>Aborted</div></div><div>```</div><div><br></div><div>Regards,</div><div>Eric</div><div><div class="h5"><br><div class="gmail_quote"><div dir="ltr">On Mon, Jan 29, 2018 at 9:56 PM Amaury Sechet via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: deadalnix<br>
Date: Mon Jan 29 12:54:33 2018<br>
New Revision: 323690<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=323690&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project?rev=323690&view=rev</a><br>
Log:<br>
[X86] Avoid using high register trick for test instruction<br>
<br>
Summary:<br>
It seems it's main effect is to create addition copies when values are inr register that do not support this trick, which increase register pressure and makes the code bigger.<br>
<br>
The main noteworthy regression I was able to observe was pattern of the type (setcc (trunc (and X, C)), 0) where C is such as it would benefit from the hi register trick. To prevent this, a new pattern is added to materialize such pattern using a 32 bits test. This has the added benefit of working with any constant that is materializable as a 32bits immediate, not just the ones that can leverage the high register trick, as demonstrated by the test case in test-shrink.ll using the constant 2049 .<br>
<br>
Reviewers: craig.topper, niravd, spatel, hfinkel<br>
<br>
Subscribers: llvm-commits<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D42646" rel="noreferrer" target="_blank">https://reviews.llvm.org/<wbr>D42646</a><br>
<br>
Modified:<br>
llvm/trunk/lib/Target/X86/<wbr>X86ISelDAGToDAG.cpp<br>
llvm/trunk/lib/Target/X86/<wbr>X86InstrArithmetic.td<br>
llvm/trunk/lib/Target/X86/<wbr>X86InstrInfo.cpp<br>
llvm/trunk/lib/Target/X86/<wbr>X86MacroFusion.cpp<br>
llvm/trunk/test/CodeGen/X86/<wbr>test-shrink.ll<br>
llvm/trunk/test/CodeGen/X86/<wbr>testb-je-fusion.ll<br>
llvm/trunk/test/CodeGen/X86/<wbr>vastart-defs-eflags.ll<br>
<br>
Modified: llvm/trunk/lib/Target/X86/<wbr>X86ISelDAGToDAG.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=323690&r1=323689&r2=323690&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/X86ISelDAGToDAG.cpp?rev=<wbr>323690&r1=323689&r2=323690&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/<wbr>X86ISelDAGToDAG.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/<wbr>X86ISelDAGToDAG.cpp Mon Jan 29 12:54:33 2018<br>
@@ -3073,67 +3073,33 @@ void X86DAGToDAGISel::Select(SDNode *Nod<br>
return;<br>
}<br>
<br>
- // For example, "testl %eax, $2048" to "testb %ah, $8".<br>
- if (isShiftedUInt<8, 8>(Mask) &&<br>
- (!(Mask & 0x8000) || hasNoSignedComparisonUses(<wbr>Node))) {<br>
- // Shift the immediate right by 8 bits.<br>
- SDValue ShiftedImm = CurDAG->getTargetConstant(Mask >> 8, dl, MVT::i8);<br>
- SDValue Reg = N0.getOperand(0);<br>
-<br>
- // Extract the h-register.<br>
- SDValue Subreg = CurDAG-><wbr>getTargetExtractSubreg(X86::<wbr>sub_8bit_hi, dl,<br>
- MVT::i8, Reg);<br>
-<br>
- // Emit a testb. The EXTRACT_SUBREG becomes a COPY that can only<br>
- // target GR8_NOREX registers, so make sure the register class is<br>
- // forced.<br>
- SDNode *NewNode = CurDAG->getMachineNode(X86::<wbr>TEST8ri_NOREX, dl,<br>
- MVT::i32, Subreg, ShiftedImm);<br>
- // Replace SUB|CMP with TEST, since SUB has two outputs while TEST has<br>
- // one, do not call ReplaceAllUsesWith.<br>
- ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),<br>
- SDValue(NewNode, 0));<br>
- CurDAG->RemoveDeadNode(Node);<br>
- return;<br>
- }<br>
-<br>
- // For example, "testl %eax, $32776" to "testw %ax, $32776".<br>
- // NOTE: We only want to form TESTW instructions if optimizing for<br>
- // min size. Otherwise we only save one byte and possibly get a length<br>
- // changing prefix penalty in the decoders.<br>
- if (OptForMinSize && isUInt<16>(Mask) && N0.getValueType() != MVT::i16 &&<br>
- (!(Mask & 0x8000) || hasNoSignedComparisonUses(<wbr>Node))) {<br>
- SDValue Imm = CurDAG->getTargetConstant(<wbr>Mask, dl, MVT::i16);<br>
- SDValue Reg = N0.getOperand(0);<br>
-<br>
- // Extract the 16-bit subregister.<br>
- SDValue Subreg = CurDAG-><wbr>getTargetExtractSubreg(X86::<wbr>sub_16bit, dl,<br>
- MVT::i16, Reg);<br>
-<br>
- // Emit a testw.<br>
- SDNode *NewNode = CurDAG->getMachineNode(X86::<wbr>TEST16ri, dl, MVT::i32,<br>
- Subreg, Imm);<br>
- // Replace SUB|CMP with TEST, since SUB has two outputs while TEST has<br>
- // one, do not call ReplaceAllUsesWith.<br>
- ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),<br>
- SDValue(NewNode, 0));<br>
- CurDAG->RemoveDeadNode(Node);<br>
- return;<br>
- }<br>
-<br>
// For example, "testq %rax, $268468232" to "testl %eax, $268468232".<br>
- if (isUInt<32>(Mask) && N0.getValueType() == MVT::i64 &&<br>
+ if (isUInt<32>(Mask) &&<br>
(!(Mask & 0x80000000) || hasNoSignedComparisonUses(<wbr>Node))) {<br>
- SDValue Imm = CurDAG->getTargetConstant(<wbr>Mask, dl, MVT::i32);<br>
+ MVT VT = MVT::i32;<br>
+ int SubRegOp = X86::sub_32bit;<br>
+ unsigned Op = X86::TEST32ri;<br>
+<br>
+ // For example, "testl %eax, $32776" to "testw %ax, $32776".<br>
+ // NOTE: We only want to form TESTW instructions if optimizing for<br>
+ // min size. Otherwise we only save one byte and possibly get a length<br>
+ // changing prefix penalty in the decoders.<br>
+ if (OptForMinSize && isUInt<16>(Mask) &&<br>
+ (!(Mask & 0x8000) || hasNoSignedComparisonUses(<wbr>Node))) {<br>
+ VT = MVT::i16;<br>
+ SubRegOp = X86::sub_16bit;<br>
+ Op = X86::TEST16ri;<br>
+ }<br>
+<br>
+ SDValue Imm = CurDAG->getTargetConstant(<wbr>Mask, dl, VT);<br>
SDValue Reg = N0.getOperand(0);<br>
<br>
- // Extract the 32-bit subregister.<br>
- SDValue Subreg = CurDAG-><wbr>getTargetExtractSubreg(X86::<wbr>sub_32bit, dl,<br>
- MVT::i32, Reg);<br>
+ // Extract the subregister if necessary.<br>
+ if (N0.getValueType() != VT)<br>
+ Reg = CurDAG-><wbr>getTargetExtractSubreg(<wbr>SubRegOp, dl, VT, Reg);<br>
<br>
- // Emit a testl.<br>
- SDNode *NewNode = CurDAG->getMachineNode(X86::<wbr>TEST32ri, dl, MVT::i32,<br>
- Subreg, Imm);<br>
+ // Emit a testl or testw.<br>
+ SDNode *NewNode = CurDAG->getMachineNode(Op, dl, MVT::i32, Reg, Imm);<br>
// Replace SUB|CMP with TEST, since SUB has two outputs while TEST has<br>
// one, do not call ReplaceAllUsesWith.<br>
ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),<br>
<br>
Modified: llvm/trunk/lib/Target/X86/<wbr>X86InstrArithmetic.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrArithmetic.td?rev=323690&r1=323689&r2=323690&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/X86InstrArithmetic.td?rev=<wbr>323690&r1=323689&r2=323690&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/<wbr>X86InstrArithmetic.td (original)<br>
+++ llvm/trunk/lib/Target/X86/<wbr>X86InstrArithmetic.td Mon Jan 29 12:54:33 2018<br>
@@ -1257,14 +1257,6 @@ let isCompare = 1 in {<br>
def TEST32mi : BinOpMI_F<0xF6, "test", Xi32, X86testpat, MRM0m>;<br>
let Predicates = [In64BitMode] in<br>
def TEST64mi32 : BinOpMI_F<0xF6, "test", Xi64, X86testpat, MRM0m>;<br>
-<br>
- // When testing the result of EXTRACT_SUBREG sub_8bit_hi, make sure the<br>
- // register class is constrained to GR8_NOREX. This pseudo is explicitly<br>
- // marked side-effect free, since it doesn't have an isel pattern like<br>
- // other test instructions.<br>
- let isPseudo = 1, hasSideEffects = 0 in<br>
- def TEST8ri_NOREX : I<0, Pseudo, (outs), (ins GR8_NOREX:$src, i8imm:$mask),<br>
- "", [], IIC_BIN_NONMEM>, Sched<[WriteALU]>;<br>
} // Defs = [EFLAGS]<br>
<br>
def TEST8i8 : BinOpAI_F<0xA8, "test", Xi8 , AL,<br>
<br>
Modified: llvm/trunk/lib/Target/X86/<wbr>X86InstrInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=323690&r1=323689&r2=323690&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/X86InstrInfo.cpp?rev=<wbr>323690&r1=323689&r2=323690&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/<wbr>X86InstrInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/<wbr>X86InstrInfo.cpp Mon Jan 29 12:54:33 2018<br>
@@ -8018,9 +8018,6 @@ bool X86InstrInfo::<wbr>expandPostRAPseudo(Ma<br>
case X86::VMOVUPSZ256mr_NOVLX:<br>
return expandNOVLXStore(MIB, &getRegisterInfo(), get(X86::VMOVUPSYmr),<br>
get(X86::VEXTRACTF64x4Zmr), X86::sub_ymm);<br>
- case X86::TEST8ri_NOREX:<br>
- MI.setDesc(get(X86::TEST8ri));<br>
- return true;<br>
case X86::MOV32ri64:<br>
MI.setDesc(get(X86::MOV32ri))<wbr>;<br>
return true;<br>
<br>
Modified: llvm/trunk/lib/Target/X86/<wbr>X86MacroFusion.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MacroFusion.cpp?rev=323690&r1=323689&r2=323690&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/X86MacroFusion.cpp?rev=<wbr>323690&r1=323689&r2=323690&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/<wbr>X86MacroFusion.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/<wbr>X86MacroFusion.cpp Mon Jan 29 12:54:33 2018<br>
@@ -86,7 +86,6 @@ static bool shouldScheduleAdjacent(const<br>
case X86::TEST16mr:<br>
case X86::TEST32mr:<br>
case X86::TEST64mr:<br>
- case X86::TEST8ri_NOREX:<br>
case X86::AND16i16:<br>
case X86::AND16ri:<br>
case X86::AND16ri8:<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/<wbr>test-shrink.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-shrink.ll?rev=323690&r1=323689&r2=323690&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>CodeGen/X86/test-shrink.ll?<wbr>rev=323690&r1=323689&r2=<wbr>323690&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/X86/<wbr>test-shrink.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/<wbr>test-shrink.ll Mon Jan 29 12:54:33 2018<br>
@@ -484,8 +484,7 @@ no:<br>
define void @truncand32(i16 inreg %x) nounwind {<br>
; CHECK-LINUX64-LABEL: truncand32:<br>
; CHECK-LINUX64: # %bb.0:<br>
-; CHECK-LINUX64-NEXT: andl $2049, %edi # imm = 0x801<br>
-; CHECK-LINUX64-NEXT: testw %di, %di<br>
+; CHECK-LINUX64-NEXT: testl $2049, %edi # imm = 0x801<br>
; CHECK-LINUX64-NEXT: je .LBB11_1<br>
; CHECK-LINUX64-NEXT: # %bb.2: # %no<br>
; CHECK-LINUX64-NEXT: retq<br>
@@ -498,8 +497,7 @@ define void @truncand32(i16 inreg %x) no<br>
; CHECK-WIN32-64-LABEL: truncand32:<br>
; CHECK-WIN32-64: # %bb.0:<br>
; CHECK-WIN32-64-NEXT: subq $40, %rsp<br>
-; CHECK-WIN32-64-NEXT: andl $2049, %ecx # imm = 0x801<br>
-; CHECK-WIN32-64-NEXT: testw %cx, %cx<br>
+; CHECK-WIN32-64-NEXT: testl $2049, %ecx # imm = 0x801<br>
; CHECK-WIN32-64-NEXT: je .LBB11_1<br>
; CHECK-WIN32-64-NEXT: # %bb.2: # %no<br>
; CHECK-WIN32-64-NEXT: addq $40, %rsp<br>
@@ -511,8 +509,7 @@ define void @truncand32(i16 inreg %x) no<br>
;<br>
; CHECK-X86-LABEL: truncand32:<br>
; CHECK-X86: # %bb.0:<br>
-; CHECK-X86-NEXT: andl $2049, %eax # imm = 0x801<br>
-; CHECK-X86-NEXT: testw %ax, %ax<br>
+; CHECK-X86-NEXT: testl $2049, %eax # imm = 0x801<br>
; CHECK-X86-NEXT: je .LBB11_1<br>
; CHECK-X86-NEXT: # %bb.2: # %no<br>
; CHECK-X86-NEXT: retl<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/<wbr>testb-je-fusion.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/testb-je-fusion.ll?rev=323690&r1=323689&r2=323690&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>CodeGen/X86/testb-je-fusion.<wbr>ll?rev=323690&r1=323689&r2=<wbr>323690&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/X86/<wbr>testb-je-fusion.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/<wbr>testb-je-fusion.ll Mon Jan 29 12:54:33 2018<br>
@@ -6,9 +6,8 @@<br>
define i32 @check_flag(i32 %flags, ...) nounwind {<br>
; CHECK-LABEL: check_flag:<br>
; CHECK: # %bb.0: # %entry<br>
-; CHECK-NEXT: movl %edi, %ecx<br>
; CHECK-NEXT: xorl %eax, %eax<br>
-; CHECK-NEXT: testb $2, %ch<br>
+; CHECK-NEXT: testl $512, %edi # imm = 0x200<br>
; CHECK-NEXT: je .LBB0_2<br>
; CHECK-NEXT: # %bb.1: # %if.then<br>
; CHECK-NEXT: movl $1, %eax<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/<wbr>vastart-defs-eflags.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vastart-defs-eflags.ll?rev=323690&r1=323689&r2=323690&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>CodeGen/X86/vastart-defs-<wbr>eflags.ll?rev=323690&r1=<wbr>323689&r2=323690&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/X86/<wbr>vastart-defs-eflags.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/<wbr>vastart-defs-eflags.ll Mon Jan 29 12:54:33 2018<br>
@@ -8,9 +8,7 @@ target triple = "x86_64-apple-macosx10.1<br>
define i32 @check_flag(i32 %flags, ...) nounwind {<br>
; CHECK-LABEL: check_flag:<br>
; CHECK: ## %bb.0: ## %entry<br>
-; CHECK-NEXT: pushq %rbx<br>
-; CHECK-NEXT: subq $48, %rsp<br>
-; CHECK-NEXT: movl %edi, %ebx<br>
+; CHECK-NEXT: subq $56, %rsp<br>
; CHECK-NEXT: testb %al, %al<br>
; CHECK-NEXT: je LBB0_2<br>
; CHECK-NEXT: ## %bb.1: ## %entry<br>
@@ -29,7 +27,7 @@ define i32 @check_flag(i32 %flags, ...)<br>
; CHECK-NEXT: movq %rdx, -{{[0-9]+}}(%rsp)<br>
; CHECK-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)<br>
; CHECK-NEXT: xorl %eax, %eax<br>
-; CHECK-NEXT: testb $2, %bh<br>
+; CHECK-NEXT: testl $512, %edi ## imm = 0x200<br>
; CHECK-NEXT: je LBB0_4<br>
; CHECK-NEXT: ## %bb.3: ## %if.then<br>
; CHECK-NEXT: leaq -{{[0-9]+}}(%rsp), %rax<br>
@@ -40,8 +38,7 @@ define i32 @check_flag(i32 %flags, ...)<br>
; CHECK-NEXT: movl $8, 0<br>
; CHECK-NEXT: movl $1, %eax<br>
; CHECK-NEXT: LBB0_4: ## %if.end<br>
-; CHECK-NEXT: addq $48, %rsp<br>
-; CHECK-NEXT: popq %rbx<br>
+; CHECK-NEXT: addq $56, %rsp<br>
; CHECK-NEXT: retq<br>
entry:<br>
%and = and i32 %flags, 512<br>
<br>
<br>
______________________________<wbr>_________________<br>
llvm-commits mailing list<br>
<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br>
<a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" rel="noreferrer" target="_blank">http://lists.llvm.org/cgi-bin/<wbr>mailman/listinfo/llvm-commits</a><br>
</blockquote></div></div></div></div>
</blockquote></div><br></div>