<div dir="ltr">Please do to revert it till the fix gets approved.<br>It is not good to keep the bot red for too long. This hides new problem which later hard to track down.<br><br>Thanks<br><br>Galina<br></div><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Jan 30, 2018 at 11:51 AM, Friedman, Eli <span dir="ltr"><<a href="mailto:efriedma@codeaurora.org" target="_blank">efriedma@codeaurora.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
  
    
  
  <div text="#000000" bgcolor="#FFFFFF">
    <div class="m_-679428887874725126moz-cite-prefix"><a class="m_-679428887874725126moz-txt-link-freetext" href="https://reviews.llvm.org/D42655" target="_blank">https://reviews.llvm.org/<wbr>D42655</a> is up
      for review.<br>
      <br>
      I was hoping the fix would be reviewed quickly, but I can revert
      in the meantime if it's blocking you.<br>
      <br>
      -Eli<div><div class="h5"><br>
      <br>
      On 1/30/2018 10:55 AM, Galina Kistanova wrote:<br>
    </div></div></div><div><div class="h5">
    <blockquote type="cite">
      <div dir="ltr">Hello Eli,<br>
        <br>
        This commit broke the test LLVM :: CodeGen/ARM/pr25838.ll on one
        of our builders:<br>
        r323559<br>
        <a href="http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/7546" target="_blank">http://lab.llvm.org:8011/<wbr>builders/llvm-clang-x86_64-<wbr>expensive-checks-win/builds/<wbr>7546</a><br>
        <br>
        . . .<br>
        Failing Tests (2):<br>
            LLVM :: CodeGen/ARM/pr25838.ll<br>
            LLVM :: DebugInfo/Generic/string-<wbr>offsets-multiple-cus.ll<br>
        <br>
        Previous revision:<br>
        <a href="http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/7610" target="_blank">http://lab.llvm.org:8011/<wbr>builders/llvm-clang-x86_64-<wbr>expensive-checks-win/builds/<wbr>7610</a><br>
        <br>
        Please have a look?<br>
        <br>
        Thanks<br>
        <br>
        Galina<br>
        <br>
        <div class="gmail_extra"><br>
          <div class="gmail_quote">On Fri, Jan 26, 2018 at 12:23 PM, Eli
            Friedman via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span>
            wrote:<br>
            <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author:
              efriedma<br>
              Date: Fri Jan 26 12:23:00 2018<br>
              New Revision: 323559<br>
              <br>
              URL: <a href="http://llvm.org/viewvc/llvm-project?rev=323559&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject?rev=323559&view=rev</a><br>
              Log:<br>
              [LivePhysRegs] Preserve pristine regs in blocks with no
              successors.<br>
              <br>
              One common source of blocks with no successors is calls to
              noreturn<br>
              functions; we want to preserve pristine registers in case
              they throw an<br>
              exception.<br>
              <br>
              The whole pristine register thing is messy (we should
              really prefer to<br>
              explicitly model registers), but this fills a hole in the
              model for now.<br>
              <br>
              Fixes <a href="https://bugs.llvm.org/show_bug.cgi?id=36073" rel="noreferrer" target="_blank">https://bugs.llvm.org/show_bug<wbr>.cgi?id=36073</a>.<br>
              <br>
              Differential Revision: <a href="https://reviews.llvm.org/D42509" rel="noreferrer" target="_blank">https://reviews.llvm.org/D4250<wbr>9</a><br>
              <br>
              <br>
              Added:<br>
                  llvm/trunk/test/CodeGen/Thumb/<wbr>stm-scavenging.ll<br>
              Modified:<br>
                  llvm/trunk/lib/CodeGen/LivePhy<wbr>sRegs.cpp<br>
              <br>
              Modified: llvm/trunk/lib/CodeGen/LivePhy<wbr>sRegs.cpp<br>
              URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LivePhysRegs.cpp?rev=323559&r1=323558&r2=323559&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/CodeGen/<wbr>LivePhysRegs.cpp?rev=323559&<wbr>r1=323558&r2=323559&view=diff</a><br>
              ==============================<wbr>==============================<wbr>==================<br>
              --- llvm/trunk/lib/CodeGen/LivePhy<wbr>sRegs.cpp
              (original)<br>
              +++ llvm/trunk/lib/CodeGen/LivePhy<wbr>sRegs.cpp Fri Jan
              26 12:23:00 2018<br>
              @@ -225,10 +225,10 @@ void LivePhysRegs::addLiveOutsNoPri<wbr>stine<br>
              <br>
               void LivePhysRegs::addLiveOuts(cons<wbr>t
              MachineBasicBlock &MBB) {<br>
                 const MachineFunction &MF = *MBB.getParent();<br>
              -  if (!MBB.succ_empty()) {<br>
              +  if (!MBB.isReturnBlock()) {<br>
                   addPristines(MF);<br>
                   addLiveOutsNoPristines(MBB);<br>
              -  } else if (MBB.isReturnBlock()) {<br>
              +  } else {<br>
                   // For the return block: Add all callee saved
              registers.<br>
                   const MachineFrameInfo &MFI = MF.getFrameInfo();<br>
                   if (MFI.isCalleeSavedInfoValid())<br>
              <br>
              Added: llvm/trunk/test/CodeGen/Thumb/<wbr>stm-scavenging.ll<br>
              URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/stm-scavenging.ll?rev=323559&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>Thumb/stm-scavenging.ll?rev=<wbr>323559&view=auto</a><br>
              ==============================<wbr>==============================<wbr>==================<br>
              --- llvm/trunk/test/CodeGen/Thumb/<wbr>stm-scavenging.ll
              (added)<br>
              +++ llvm/trunk/test/CodeGen/Thumb/<wbr>stm-scavenging.ll
              Fri Jan 26 12:23:00 2018<br>
              @@ -0,0 +1,47 @@<br>
              +; RUN: llc < %s | FileCheck %s<br>
              +target triple = "thumbv6---gnueabi"<br>
              +<br>
              +; Use STM to save the three registers<br>
              +; CHECK-LABEL: use_stm:<br>
              +; CHECK: .save   {r7, lr}<br>
              +; CHECK: .setfp  r7, sp<br>
              +; CHECK: stm r3!, {r0, r1, r2}<br>
              +; CHECK: bl throws_1<br>
              +define void @use_stm(i32 %a, i32 %b, i32 %c, i32* %d)
              local_unnamed_addr noreturn "no-frame-pointer-elim"="true"
              {<br>
              +entry:<br>
              +  %arrayidx = getelementptr inbounds i32, i32* %d, i32 2<br>
              +  store i32 %a, i32* %arrayidx, align 4<br>
              +  %arrayidx1 = getelementptr inbounds i32, i32* %d, i32 3<br>
              +  store i32 %b, i32* %arrayidx1, align 4<br>
              +  %arrayidx2 = getelementptr inbounds i32, i32* %d, i32 4<br>
              +  store i32 %c, i32* %arrayidx2, align 4<br>
              +  tail call void @throws_1(i32 %a, i32 %b, i32 %c)
              noreturn<br>
              +  unreachable<br>
              +}<br>
              +<br>
              +; Don't use STM: there is no available register to store<br>
              +; the address. We could transform this with some extra
              math, but<br>
              +; that currently isn't implemented.<br>
              +; CHECK-LABEL: no_stm:<br>
              +; CHECK: .save   {r7, lr}<br>
              +; CHECK: .setfp  r7, sp<br>
              +; CHECK: str r0,<br>
              +; CHECK: str r1,<br>
              +; CHECK: str r2,<br>
              +; CHECK: bl throws_2<br>
              +define void @no_stm(i32 %a, i32 %b, i32 %c, i32* %d)
              local_unnamed_addr noreturn "no-frame-pointer-elim"="true"
              {<br>
              +entry:<br>
              +  %arrayidx = getelementptr inbounds i32, i32* %d, i32 2<br>
              +  store i32 %a, i32* %arrayidx, align 4<br>
              +  %arrayidx1 = getelementptr inbounds i32, i32* %d, i32 3<br>
              +  store i32 %b, i32* %arrayidx1, align 4<br>
              +  %arrayidx2 = getelementptr inbounds i32, i32* %d, i32 4<br>
              +  store i32 %c, i32* %arrayidx2, align 4<br>
              +  tail call void @throws_2(i32 %a, i32 %b, i32 %c, i32*
              %d) noreturn<br>
              +  unreachable<br>
              +}<br>
              +<br>
              +<br>
              +declare void @throws_1(i32, i32, i32) noreturn<br>
              +declare void @throws_2(i32, i32, i32, i32*) noreturn<br>
              +<br>
              <br>
              <br>
              ______________________________<wbr>_________________<br>
              llvm-commits mailing list<br>
              <a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br>
              <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" rel="noreferrer" target="_blank">http://lists.llvm.org/cgi-bin/<wbr>mailman/listinfo/llvm-commits</a><br>
            </blockquote>
          </div>
          <br>
        </div>
      </div>
    </blockquote>
    <p><br>
    </p>
    </div></div><span class="HOEnZb"><font color="#888888"><pre class="m_-679428887874725126moz-signature" cols="72">-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project</pre>
  </font></span></div>

</blockquote></div><br></div>